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nix-config/packages/edk2/patches/platforms/0008-Platform-RPi5-Add-initial-ACPI-support.patch
mjallen18 ca17f0fe18 uefi stuff
2026-01-07 21:28:20 -06:00

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From 0f5d150305d726ec55de7ee53490ed2b63c15a23 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?=
<mariobalanica02@gmail.com>
Date: Fri, 29 Dec 2023 23:04:03 +0200
Subject: [PATCH 08/16] Platform/RPi5: Add initial ACPI support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Peripherals supported: PL011 debug UART, RP1 USB and Broadcom SDHCI (SD
card + Wi-Fi).
RP1 is exposed as a generic "module device". The BAR is preprogrammed by
the VPU firmware and all child devices share one level interrupt - INTA#
of the parent PCIe bus.
XHCI appears to work okay, but there's some subtle corruption happening
under Windows, slowly rendering the boot drive unusable. My guess is
either interrupts getting lost along the way or missing DWC3 core
configuration.
SDHCI works in Windows, Linux and FreeBSD. Speed mode depends on the OS
and user settings. See the comments left in Dsdt.asl for more details.
Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com>
---
.../RaspberryPi/RPi5/AcpiTables/AcpiTables.h | 62 +++
.../RPi5/AcpiTables/AcpiTables.inf | 55 +++
.../RaspberryPi/RPi5/AcpiTables/Dbg2.aslc | 85 ++++
Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl | 368 ++++++++++++++++++
.../RaspberryPi/RPi5/AcpiTables/Fadt.aslc | 85 ++++
.../RaspberryPi/RPi5/AcpiTables/Gtdt.aslc | 58 +++
.../RaspberryPi/RPi5/AcpiTables/Madt.aslc | 71 ++++
.../RaspberryPi/RPi5/AcpiTables/Pptt.aslc | 219 +++++++++++
.../RaspberryPi/RPi5/AcpiTables/Spcr.aslc | 74 ++++
.../RPi5/Drivers/RpiPlatformDxe/ConfigTable.c | 162 ++++++++
.../RPi5/Drivers/RpiPlatformDxe/ConfigTable.h | 31 ++
.../Drivers/RpiPlatformDxe/RpiPlatformDxe.c | 102 +++++
.../Drivers/RpiPlatformDxe/RpiPlatformDxe.inf | 16 +-
.../RpiPlatformDxe/RpiPlatformDxeHii.uni | 44 +++
.../RpiPlatformDxe/RpiPlatformDxeHii.vfr | 67 ++++
.../Include/Guid/RpiPlatformFormSetGuid.h | 17 +
.../RPi5/Include/RpiPlatformVarStoreData.h | 22 ++
Platform/RaspberryPi/RPi5/RPi5.dec | 19 +
Platform/RaspberryPi/RPi5/RPi5.dsc | 3 +-
Platform/RaspberryPi/RPi5/RPi5.fdf | 2 +-
.../Include/IndustryStandard/Bcm2712.h | 9 +
21 files changed, 1568 insertions(+), 3 deletions(-)
create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h
create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf
create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Dbg2.aslc
create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl
create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Fadt.aslc
create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Gtdt.aslc
create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Madt.aslc
create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Pptt.aslc
create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Spcr.aslc
create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c
create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h
create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni
create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr
create mode 100644 Platform/RaspberryPi/RPi5/Include/Guid/RpiPlatformFormSetGuid.h
create mode 100644 Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h
create mode 100644 Platform/RaspberryPi/RPi5/RPi5.dec
diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h
new file mode 100644
index 00000000..0b965d39
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h
@@ -0,0 +1,62 @@
+/** @file
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#ifndef __ACPITABLES_H__
+#define __ACPITABLES_H__
+
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/Bcm2712.h>
+#include <Library/PcdLib.h>
+
+#define EFI_ACPI_OEM_ID {'R','P','I','F','D','N'}
+#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64 ('R','P','I','5',' ',' ',' ',' ')
+#define EFI_ACPI_OEM_REVISION 0x00000200
+#define EFI_ACPI_CREATOR_ID SIGNATURE_32 ('E','D','K','2')
+#define EFI_ACPI_CREATOR_REVISION 0x00000300
+
+//
+// A macro to initialise the common header part of EFI ACPI tables as defined by
+// EFI_ACPI_DESCRIPTION_HEADER structure.
+//
+#define ACPI_HEADER(Signature, Type, Revision) { \
+ Signature, /* UINT32 Signature */ \
+ sizeof (Type), /* UINT32 Length */ \
+ Revision, /* UINT8 Revision */ \
+ 0, /* UINT8 Checksum */ \
+ EFI_ACPI_OEM_ID, /* UINT8 OemId[6] */ \
+ EFI_ACPI_OEM_TABLE_ID, /* UINT64 OemTableId */ \
+ EFI_ACPI_OEM_REVISION, /* UINT32 OemRevision */ \
+ EFI_ACPI_CREATOR_ID, /* UINT32 CreatorId */ \
+ EFI_ACPI_CREATOR_REVISION /* UINT32 CreatorRevision */ \
+ }
+
+//
+// Device resource helpers
+//
+#define QWORDMEMORY_BUF(Index, ResourceType) \
+ QWordMemory (ResourceType,, \
+ MinFixed, MaxFixed, NonCacheable, ReadWrite, \
+ 0x0, 0x0, 0x0, 0x0, 0x1,,, RB ## Index)
+
+#define QWORDMEMORY_SET(Index, Minimum, Length) \
+ CreateQwordField (RBUF, RB ## Index._MIN, MI ## Index) \
+ CreateQwordField (RBUF, RB ## Index._MAX, MA ## Index) \
+ CreateQwordField (RBUF, RB ## Index._LEN, LE ## Index) \
+ LE ## Index = Length \
+ MI ## Index = Minimum \
+ MA ## Index = MI ## Index + LE ## Index - 1
+
+//
+// PL011 Debug UART Port
+//
+#define PL011_DEBUG_BASE_ADDRESS FixedPcdGet64 (PcdSerialRegisterBase)
+#define PL011_DEBUG_INTERRUPT FixedPcdGet32 (PL011UartInterrupt)
+#define PL011_DEBUG_LENGTH BCM2712_PL011_LENGTH
+#define PL011_DEBUG_CLOCK_FREQUENCY FixedPcdGet32 (PL011UartClkInHz)
+
+#endif // __ACPITABLES_H__
diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf
new file mode 100644
index 00000000..8eef5805
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf
@@ -0,0 +1,55 @@
+#/** @file
+#
+# ACPI table data and ASL sources required to boot the platform.
+#
+# Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = AcpiTables
+ FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Dbg2.aslc
+ Dsdt.asl
+ Fadt.aslc
+ Gtdt.aslc
+ Madt.aslc
+ Pptt.aslc
+ Spcr.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/RaspberryPi/RaspberryPi.dec
+ Platform/RaspberryPi/RPi5/RPi5.dec
+ Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec
+ Silicon/Broadcom/Bcm27xx/Bcm27xx.dec
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
+ gRaspberryPiTokenSpaceGuid.PcdGicInterruptInterfaceHBase
+ gRaspberryPiTokenSpaceGuid.PcdGicInterruptInterfaceVBase
+ gRaspberryPiTokenSpaceGuid.PcdGicGsivId
+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq0
+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq1
+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq2
+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq3
+ gRpiSiliconTokenSpaceGuid.Rp1PciPeripheralsBar
diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Dbg2.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Dbg2.aslc
new file mode 100644
index 00000000..4f6d3fc6
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Dbg2.aslc
@@ -0,0 +1,85 @@
+/** @file
+ *
+ * Debug Port Table (DBG2)
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ * Copyright (c) 2012-2021, ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/DebugPort2Table.h>
+#include <Library/AcpiLib.h>
+
+#include "AcpiTables.h"
+
+#define DBG2_NUM_DEBUG_PORTS 1
+#define DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
+#define DBG2_NAMESPACESTRING_FIELD_SIZE 15
+#define PL011_DEBUG_STR { '\\', '_', 'S', 'B', '.', 'S', 'O', 'C', 'B', '.', 'U', 'R', 'T', '0', 0x00 }
+
+#pragma pack(1)
+typedef struct {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+ EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
+ UINT32 AddressSize;
+ UINT8 NameSpaceString[DBG2_NAMESPACESTRING_FIELD_SIZE];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo[DBG2_NUM_DEBUG_PORTS];
+} DBG2_TABLE;
+#pragma pack()
+
+#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \
+ { \
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /* UINT8 Revision */ \
+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length */ \
+ NumReg, /* UINT8 NumberofGenericAddressRegisters */ \
+ DBG2_NAMESPACESTRING_FIELD_SIZE, /* UINT16 NameSpaceStringLength */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /* UINT16 NameSpaceStringOffset */ \
+ 0, /* UINT16 OemDataLength */ \
+ 0, /* UINT16 OemDataOffset */ \
+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type */ \
+ SubType, /* UINT16 Port Subtype */ \
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* UINT8 Reserved[2] */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* UINT16 AddressSize Offset */ \
+ }, \
+ ARM_GAS32 (UartBase), /* EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
+ UartAddrLen, /* UINT32 AddressSize */ \
+ UartNameStr /* UINT8 NameSpaceString[MAX_DBG2_NAME_LEN] */ \
+}
+
+STATIC DBG2_TABLE Dbg2 = {
+ {
+ ACPI_HEADER (
+ EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
+ DBG2_TABLE,
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+ ),
+ OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+ DBG2_NUM_DEBUG_PORTS /* UINT32 NumberDbgDeviceInfo */
+ },
+ {
+ /*
+ * Kernel Debug Port
+ */
+ DBG2_DEBUG_PORT_DDI (
+ DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS,
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART,
+ PL011_DEBUG_BASE_ADDRESS,
+ PL011_DEBUG_LENGTH,
+ PL011_DEBUG_STR
+ )
+ }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Dbg2;
diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl
new file mode 100644
index 00000000..62cacf7c
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl
@@ -0,0 +1,368 @@
+/** @file
+ *
+ * Differentiated System Definition Table (DSDT)
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Bcm2712.h>
+#include <RpiPlatformVarStoreData.h>
+
+#include "AcpiTables.h"
+
+DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI5 ", 2)
+{
+ Scope (\_SB_)
+ {
+ Device (CPU0) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0x0)
+ Name (_STA, 0xf)
+ }
+
+ Device (CPU1) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0x1)
+ Name (_STA, 0xf)
+ }
+
+ Device (CPU2) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0x2)
+ Name (_STA, 0xf)
+ }
+
+ Device (CPU3) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0x3)
+ Name (_STA, 0xf)
+ }
+
+ //
+ // Legacy SOC bus
+ //
+ Device (SOCB) {
+ Name (_HID, "ACPI0004")
+ Name (_UID, 0x0)
+ Name (_CCA, 0x0)
+
+ Method (_CRS, 0, Serialized) {
+ //
+ // Container devices with _DMA must have _CRS.
+ // TO-DO: Is describing the entire MMIO range in a single resource
+ // enough, or do we need to list each individual resource consumed
+ // by the child devices?
+ //
+ Name (RBUF, ResourceTemplate () {
+ QWORDMEMORY_BUF (00, ResourceProducer)
+ })
+ QWORDMEMORY_SET (00, BCM2712_LEGACY_BUS_BASE, BCM2712_LEGACY_BUS_LENGTH)
+ Return (RBUF)
+ }
+
+ Name (_DMA, ResourceTemplate () {
+ //
+ // Only the first GB is available.
+ // Bus 0xC0000000 -> CPU 0x00000000.
+ //
+ QWordMemory (ResourceProducer,
+ PosDecode,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ 0x00000000C0000000, // MIN
+ 0x00000000FFFFFFFF, // MAX
+ 0xFFFFFFFF40000000, // TRA
+ 0x0000000040000000, // LEN
+ ,
+ ,
+ )
+ })
+
+ //
+ // PL011 Debug UART Port
+ //
+ Device (URT0) {
+ Name (_HID, "ARMH0011")
+ Name (_UID, 0x0)
+ Name (_CCA, 0x0)
+
+ Method (_CRS, 0x0, Serialized) {
+ Name (RBUF, ResourceTemplate () {
+ QWORDMEMORY_BUF (00, ResourceConsumer)
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { PL011_DEBUG_INTERRUPT }
+ })
+ QWORDMEMORY_SET (00, PL011_DEBUG_BASE_ADDRESS, PL011_DEBUG_LENGTH)
+ Return (RBUF)
+ }
+
+ Name (_DSD, Package () {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", PL011_DEBUG_CLOCK_FREQUENCY }
+ }
+ })
+ }
+ } // Device (SOCB)
+
+ Device (RP1B) {
+ Name (_HID, "ACPI0004")
+ Name (_UID, 0x1)
+
+ // Parent bus is non-coherent
+ Name (_CCA, 0x0)
+
+ // Firmware mapped BAR
+ Name (PBAR, FixedPcdGet64 (Rp1PciPeripheralsBar))
+
+ // Shared level interrupt - PCIE2 INTA# SPI
+ Name (PINT, 261)
+
+ Include ("Rp1.asi")
+ }
+
+ //
+ // Broadcom STB SDHCI controllers (Arasan IP)
+ //
+ // There are 2 notable quirks with these controllers:
+ // 1) Broken 1.8v signaling switch: instead it's changed via an external
+ // regulator. Thankfully, Intel Bay Trail had the same issue, so we
+ // can pretend to be one of their affected HCs and reuse the _DSM
+ // workaround.
+ //
+ // 2) Capability claims hardware retuning is supported, but it causes issues.
+ // Windows will crash when switching to SDR50/SDR104. Linux does not appear
+ // to care, but we still override the "sdhci-caps-mask" property just in case.
+ //
+ // Supposedly there's a 32-bit bus access limitation too (inherited from BCM283x),
+ // but no issues have actually been observed under stress test in both Windows
+ // and Linux. Chances are this was fixed in the production BCM2712C0 stepping.
+ //
+ // We provide two compatibility modes:
+ // 1) BRCMSTB _HID + Bay Trail _CID:
+ // - Windows binds to "VEN_8086&DEV_0F14" and has DDR50 with _DSM working.
+ // SDR104/50 modes can be enabled by a sdbus driver override.
+ //
+ // - Linux recognizes "80860F16" but treats the controller as plain SDHCI and
+ // no _DSM, we limit the speed to HS via "sdhci-caps-mask".
+ //
+ // - FreeBSD binds to "80860F16" but does not implement the _DSM nor the _DSD
+ // for caps override, fortunately it just falls back to HS.
+ //
+ // 2) Full Bay Trail _HID: this enables Linux to see the device as proper Bay Trail
+ // and use the _DSM. DDR50 is also enabled by relaxing the caps mask.
+ //
+ // The "Limit UHS-I" option is enabled by default in case OSes are not aware of
+ // the broken retuning (i.e. Windows does not parse _DSD). It disables SDR104/50
+ // since these modes depend on tuning.
+ //
+ // These will be patched in by the platform driver.
+ //
+ Name (SDCM, 0x0) // Compatibility Mode
+ Name (SDLU, 0x0) // Limit UHS-I
+
+ Device (SDC0) {
+ Method (_HID) {
+ If (SDCM == ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL) {
+ Return ("80860F16")
+ } Else {
+ Return ("BRCM5D12")
+ }
+ }
+ Name (_CID, Package () { "80860F16", "VEN_8086&DEV_0F14" })
+ Name (_UID, 0x0)
+ Name (_CCA, 0x0)
+
+ Method (_CRS, 0x0, Serialized) {
+ Name (RBUF, ResourceTemplate () {
+ QWORDMEMORY_BUF (00, ResourceConsumer)
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 305 }
+ })
+ QWORDMEMORY_SET (00, BCM2712_BRCMSTB_SDIO1_HOST_BASE, BCM2712_BRCMSTB_SDIO_HOST_LENGTH)
+ Return (RBUF)
+ }
+
+ OperationRegion (GPIO, SystemMemory, BCM2712_BRCMSTB_GIO_AON_BASE, BCM2712_BRCMSTB_GIO_AON_LENGTH)
+ Field (GPIO, DWordAcc, NoLock, Preserve) {
+ Offset (0x4),
+ DATA, 32, // BIT3 = GPIO 3, 1.8v switch
+ }
+
+ Method (_INI, 0, Serialized) {
+ DATA &= ~(1 << 3)
+ }
+
+ Method (_DSM, 4, Serialized) {
+ // Check the UUID
+ If (Arg0 == ToUUID ("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61")) {
+ // Check the revision
+ If (Arg1 >= 0) {
+ // Check the function index
+ Switch (ToInteger (Arg2)) {
+ //
+ // Supported functions:
+ // Bit 0 - Indicates support for functions other than 0
+ // Bit 3 - Indicates support to set 1.8V signalling
+ // Bit 4 - Indicates support to set 3.3V signalling
+ // Bit 8 - Indicates support for UHS-I modes
+ //
+ Case (0) {
+ Return (Buffer () { 0x19, 0x01 }) // 0x119
+ }
+
+ // Function Index 3: Set 1.8v signalling
+ Case (3) {
+ DATA |= (1 << 3)
+ Return (Buffer () { 0x00 })
+ }
+
+ // Function Index 4: Set 3.3v signalling
+ Case (4) {
+ DATA &= ~(1 << 3)
+ Return (Buffer () { 0x00 })
+ }
+
+ //
+ // Function Index 8: Supported UHS-I modes
+ // Bit 0 - SDR25
+ // Bit 1 - DDR50
+ // Bit 2 - SDR50
+ // Bit 3 - SDR104
+ //
+ Case (8) {
+ // Limit UHS-I modes?
+ If (SDLU == 1) {
+ Return (Buffer () { 0x02 }) // DDR50
+ } Else {
+ Return (Buffer () { 0x0F }) // All
+ }
+ }
+ } // Function index check
+ } // Revision check
+ } // UUID check
+ Return (Buffer () { 0x0 })
+ } // _DSM
+
+ Method (_DSD, 0, Serialized) {
+ // Capabilities mask
+ Name (CAPM, 0x0000000000000000)
+
+ // Start by disabling hardware retuning
+ CAPM |= (1 << 47) | (1 << 46)
+
+ // Limit UHS-I modes?
+ If (SDLU == 1) {
+ // Disable SDR104, SDR50
+ CAPM |= (1 << 33) | (1 << 32)
+
+ If (SDCM != ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL) {
+ // Additionally disable DDR50, Linux can't use
+ // the _DSM for changing voltage in this case.
+ CAPM |= (1 << 34)
+ }
+ }
+
+ Return (Package () {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "sdhci-caps-mask", CAPM }
+ }
+ })
+ } // _DSD
+
+ //
+ // Removable SD card
+ //
+ Device (SDMM) {
+ Name (_ADR, 0x0)
+
+ Method (_RMV) {
+ Return (1)
+ }
+ }
+ } // Device (SDC0)
+
+ //
+ // This controller drives the SDIO Wi-Fi.
+ // It can only run at DDR50 with fixed signaling voltage, so there's no
+ // need to apply most of the workarounds above.
+ //
+ Device (SDC1) {
+ Name (_HID, "BRCM5D12")
+ Name (_CID, Package () { "80860F16", "VEN_8086&DEV_0F14" })
+ Name (_UID, 0x1)
+ Name (_CCA, 0x0)
+
+ Method (_CRS, 0x0, Serialized) {
+ Name (RBUF, ResourceTemplate () {
+ QWORDMEMORY_BUF (00, ResourceConsumer)
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 306 }
+ })
+ QWORDMEMORY_SET (00, BCM2712_BRCMSTB_SDIO2_HOST_BASE, BCM2712_BRCMSTB_SDIO_HOST_LENGTH)
+ Return (RBUF)
+ }
+
+ //
+ // Only needed by Windows.
+ //
+ Method (_DSM, 4, Serialized) {
+ // Check the UUID
+ If (Arg0 == ToUUID ("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61")) {
+ // Check the revision
+ If (Arg1 >= 0) {
+ // Check the function index
+ Switch (ToInteger (Arg2)) {
+ //
+ // Supported functions:
+ // Bit 0 - Indicates support for functions other than 0
+ // Bit 8 - Indicates support for UHS-I modes
+ //
+ Case (0) {
+ Return (Buffer () { 0x01, 0x01 }) // 0x101
+ }
+
+ //
+ // Function Index 8: Supported UHS-I modes
+ // Bit 0 - SDR25
+ // Bit 1 - DDR50
+ // Bit 2 - SDR50
+ // Bit 3 - SDR104
+ //
+ Case (8) {
+ Return (Buffer () { 0x02 }) // DDR50
+ }
+ } // Function index check
+ } // Revision check
+ } // UUID check
+ Return (Buffer () { 0x0 })
+ } // _DSM
+
+ Method (_DSD, 0x0, Serialized) {
+ Return (Package () {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ // Disable hardware retuning, SDR104, SDR50.
+ Package () { "sdhci-caps-mask", (1 << 47) | (1 << 46) | (1 << 33) | (1 << 32) },
+ }
+ })
+ } // _DSD
+
+ //
+ // Fixed CYW43455 SDIO Wi-Fi
+ //
+ Device (WLAN) {
+ Name (_ADR, 0x1)
+
+ Method (_RMV) {
+ Return (0)
+ }
+ }
+ } // Device (SDC1)
+
+ } // Scope (\_SB_)
+} // DefinitionBlock
diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Fadt.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Fadt.aslc
new file mode 100644
index 00000000..9e0a2efc
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Fadt.aslc
@@ -0,0 +1,85 @@
+/** @file
+ *
+ * Fixed ACPI Description Table (FADT)
+ *
+ * Copyright (c) 2019, Pete Batard <pete@akeo.ie>
+ * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
+ * Copyright (c) Microsoft Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+
+#include "AcpiTables.h"
+
+EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
+ ACPI_HEADER (
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE,
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
+ ),
+ 0, // UINT32 FirmwareCtrl
+ 0, // UINT32 Dsdt
+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0
+ EFI_ACPI_6_3_PM_PROFILE_APPLIANCE_PC, // UINT8 PreferredPmProfile
+ 0, // UINT16 SciInt
+ 0, // UINT32 SmiCmd
+ 0, // UINT8 AcpiEnable
+ 0, // UINT8 AcpiDisable
+ 0, // UINT8 S4BiosReq
+ 0, // UINT8 PstateCnt
+ 0, // UINT32 Pm1aEvtBlk
+ 0, // UINT32 Pm1bEvtBlk
+ 0, // UINT32 Pm1aCntBlk
+ 0, // UINT32 Pm1bCntBlk
+ 0, // UINT32 Pm2CntBlk
+ 0, // UINT32 PmTmrBlk
+ 0, // UINT32 Gpe0Blk
+ 0, // UINT32 Gpe1Blk
+ 0, // UINT8 Pm1EvtLen
+ 0, // UINT8 Pm1CntLen
+ 0, // UINT8 Pm2CntLen
+ 0, // UINT8 PmTmrLen
+ 0, // UINT8 Gpe0BlkLen
+ 0, // UINT8 Gpe1BlkLen
+ 0, // UINT8 Gpe1Base
+ 0, // UINT8 CstCnt
+ 0, // UINT16 PLvl2Lat
+ 0, // UINT16 PLvl3Lat
+ 0, // UINT16 FlushSize
+ 0, // UINT16 FlushStride
+ 0, // UINT8 DutyOffset
+ 0, // UINT8 DutyWidth
+ 0, // UINT8 DayAlrm
+ 0, // UINT8 MonAlrm
+ 0, // UINT8 Century
+ EFI_ACPI_RESERVED_WORD, // UINT16 IaPcBootArch (Reserved on ARM)
+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1
+ EFI_ACPI_6_3_WBINVD | EFI_ACPI_6_3_SLP_BUTTON | // UINT32 Flags
+ EFI_ACPI_6_3_HW_REDUCED_ACPI,
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ResetReg
+ 0, // UINT8 ResetValue
+ EFI_ACPI_6_3_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision
+ 0, // UINT64 XFirmwareCtrl
+ 0, // UINT64 XDsdt
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepControlReg
+ NULL_GAS // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Fadt;
diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Gtdt.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Gtdt.aslc
new file mode 100644
index 00000000..679fc947
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Gtdt.aslc
@@ -0,0 +1,58 @@
+/** @file
+ *
+ * Generic Timer Description Table (GTDT)
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ * Copyright (c) 2016 Linaro Ltd. All rights reserved.
+ * Copyright (c) 2012 - 2016, ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+
+#include "AcpiTables.h"
+
+#define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
+#define TDT_GLOBAL_FLAGS 0
+#define GTDT_GTIMER_FLAGS EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
+} EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLES;
+
+#pragma pack ()
+
+EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
+ {
+ ACPI_HEADER(
+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLES,
+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
+ ),
+ SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
+ 0, // UINT32 Reserved
+ FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
+ FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
+ FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
+ FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
+ 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
+ 0, // UINT32 PlatformTimerCount
+ 0 // UINT32 PlatfromTimerOffset
+ },
+};
+
+//
+// Reference the table being generated to prevent the optimizer
+// from removing the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Gtdt;
diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Madt.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Madt.aslc
new file mode 100644
index 00000000..8fa96326
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Madt.aslc
@@ -0,0 +1,71 @@
+/** @file
+ *
+ * Multiple APIC Description Table (MADT)
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ * Copyright (c) 2016 Linaro Ltd. All rights reserved.
+ * Copyright (c) 2012 - 2015, ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+
+#include "AcpiTables.h"
+
+//
+// Multiple APIC Description Table
+//
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_6_3_GIC_STRUCTURE GicInterfaces[4];
+ EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+} PI_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+PI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+ {
+ ACPI_HEADER (
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ PI_MULTIPLE_APIC_DESCRIPTION_TABLE,
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+ ),
+ //
+ // MADT specific fields
+ //
+ 0, // LocalApicAddress
+ 0, // Flags
+ },
+ {
+ EFI_ACPI_6_3_GICC_STRUCTURE_INIT (
+ 0, 0, GET_MPID(0, 0x000), EFI_ACPI_6_0_GIC_ENABLED, FixedPcdGet32 (PcdGicPmuIrq0),
+ FixedPcdGet64 (PcdGicInterruptInterfaceBase), FixedPcdGet64 (PcdGicInterruptInterfaceVBase),
+ FixedPcdGet64 (PcdGicInterruptInterfaceHBase), FixedPcdGet32 (PcdGicGsivId), 0, 0, 0),
+ EFI_ACPI_6_3_GICC_STRUCTURE_INIT (
+ 1, 1, GET_MPID(0, 0x100), EFI_ACPI_6_0_GIC_ENABLED, FixedPcdGet32 (PcdGicPmuIrq1),
+ FixedPcdGet64 (PcdGicInterruptInterfaceBase), FixedPcdGet64 (PcdGicInterruptInterfaceVBase),
+ FixedPcdGet64 (PcdGicInterruptInterfaceHBase), FixedPcdGet32 (PcdGicGsivId), 0, 0, 0),
+ EFI_ACPI_6_3_GICC_STRUCTURE_INIT (
+ 2, 2, GET_MPID(0, 0x200), EFI_ACPI_6_0_GIC_ENABLED, FixedPcdGet32 (PcdGicPmuIrq2),
+ FixedPcdGet64 (PcdGicInterruptInterfaceBase), FixedPcdGet64 (PcdGicInterruptInterfaceVBase),
+ FixedPcdGet64 (PcdGicInterruptInterfaceHBase), FixedPcdGet32 (PcdGicGsivId), 0, 0, 0),
+ EFI_ACPI_6_3_GICC_STRUCTURE_INIT (
+ 3, 3, GET_MPID(0, 0x300), EFI_ACPI_6_0_GIC_ENABLED, FixedPcdGet32 (PcdGicPmuIrq3),
+ FixedPcdGet64 (PcdGicInterruptInterfaceBase), FixedPcdGet64 (PcdGicInterruptInterfaceVBase),
+ FixedPcdGet64 (PcdGicInterruptInterfaceHBase), FixedPcdGet32 (PcdGicGsivId), 0, 0, 0),
+ },
+ EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT (0, FixedPcdGet64 (PcdGicDistributorBase), 0, 2)
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Pptt.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Pptt.aslc
new file mode 100644
index 00000000..467bf1a7
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Pptt.aslc
@@ -0,0 +1,219 @@
+/** @file
+ *
+ * BCM2712 Processor Properties Topology Table
+ *
+ * This table is based on the ACPI 6.3 spec because Windows
+ * (tested with build 22621.1992) is not able to properly parse
+ * newer revisions:
+ * - ACPI 6.4 (rev 3) leads to a 0x7E bug check due to the new
+ * Cache ID field in the Cache Type Structure (see Table 5.140).
+ *
+ * It also entirely ignores cache sizes described here, relying on
+ * CCSIDR instead. Fortunately the info there is correct.
+ *
+ * Linux parses and displays all this data correctly.
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include "AcpiTables.h"
+
+#pragma pack(1)
+typedef struct {
+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package;
+ UINT32 L3CacheRef;
+} BCM2712_PPTT_PACKAGE_NODE;
+
+typedef struct {
+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster;
+} BCM2712_PPTT_CLUSTER_NODE;
+
+typedef struct {
+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core;
+ UINT32 L1DCacheRef;
+ UINT32 L1ICacheRef;
+ UINT32 L2CacheRef;
+} BCM2712_PPTT_CORE_NODE;
+
+typedef struct {
+ EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header;
+ BCM2712_PPTT_PACKAGE_NODE Package;
+ BCM2712_PPTT_CLUSTER_NODE Clusters[1];
+ BCM2712_PPTT_CORE_NODE Cores[4];
+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE PackageL3Cache;
+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE A76L1DCache;
+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE A76L1ICache;
+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE A76L2Cache;
+} BCM2712_PPTT;
+#pragma pack()
+
+#define PPTT_DATA_CACHE_ATTRIBUTES \
+ { \
+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \
+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, \
+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK \
+ }
+
+#define PPTT_INST_CACHE_ATTRIBUTES \
+ { \
+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ, \
+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, \
+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK \
+ }
+
+#define PPTT_UNIFIED_CACHE_ATTRIBUTES \
+ { \
+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \
+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, \
+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK \
+ }
+
+#define BCM2712_PPTT_CLUSTER_NODE_INIT(ClusterUid) { \
+ { /* Cluster */ \
+ EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type */ \
+ sizeof (BCM2712_PPTT_CLUSTER_NODE), /* Length */ \
+ { /* Reserved[2] */ \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ { /* Flags */ \
+ EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, \
+ EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, \
+ EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, \
+ EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, \
+ EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, \
+ }, \
+ OFFSET_OF (BCM2712_PPTT, Package), /* Parent */ \
+ ClusterUid, /* AcpiProcessorId */ \
+ 0 /* NumberOfPrivateResources */ \
+ } \
+}
+
+#define BCM2712_PPTT_CORE_NODE_INIT(ClusterIndex, CoreUid, \
+ L1DCacheField, L1ICacheField, L2CacheField) { \
+ { /* Core */ \
+ EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type */ \
+ sizeof (BCM2712_PPTT_CORE_NODE), /* Length */ \
+ { /* Reserved[2] */ \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ { /* Flags */ \
+ EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, \
+ EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, \
+ EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, \
+ EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, \
+ EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, \
+ }, \
+ OFFSET_OF (BCM2712_PPTT, \
+ Clusters[ClusterIndex]), /* Parent */ \
+ CoreUid, /* AcpiProcessorId */ \
+ 3 /* NumberOfPrivateResources */ \
+ }, \
+ OFFSET_OF (BCM2712_PPTT, L1DCacheField), /* L1DCacheRef */ \
+ OFFSET_OF (BCM2712_PPTT, L1ICacheField), /* L1ICacheRef */ \
+ OFFSET_OF (BCM2712_PPTT, L2CacheField) /* L2CacheRef */ \
+}
+#define BCM2712_PPTT_A76_CORE_NODE_INIT(ClusterIndex, CoreUid) \
+ BCM2712_PPTT_CORE_NODE_INIT ( \
+ ClusterIndex, CoreUid, \
+ A76L1DCache, A76L1ICache, A76L2Cache \
+ )
+
+#define BCM2712_PPTT_CACHE_NODE_INIT(NextLevelOfCache, Size, \
+ NumberOfSets, Attributes) { \
+ EFI_ACPI_6_3_PPTT_TYPE_CACHE, /* Type */ \
+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), /* Length */ \
+ { /* Reserved[2] */ \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ { /* Flags */ \
+ EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID, \
+ EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID, \
+ EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID, \
+ EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID, \
+ EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID, \
+ EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID, \
+ EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID \
+ }, \
+ NextLevelOfCache, /* NextLevelOfCache */ \
+ Size, /* Size */ \
+ NumberOfSets, /* NumberOfSets */ \
+ Size / NumberOfSets / 64, /* Associativity */ \
+ Attributes, /* Attributes */ \
+ 64 /* LineSize */ \
+}
+
+STATIC BCM2712_PPTT Pptt = {
+ {
+ ACPI_HEADER (
+ EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE,
+ BCM2712_PPTT,
+ EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
+ ),
+ },
+ {
+ { /* Package */
+ EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type */
+ sizeof (BCM2712_PPTT_PACKAGE_NODE), /* Length */
+ { /* Reserved[2] */
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ { /* Flags */
+ EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL,
+ EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID,
+ EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD,
+ EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF,
+ EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL,
+ },
+ 0, /* Parent */
+ 0, /* AcpiProcessorId */
+ 1 /* NumberOfPrivateResources */
+ },
+ OFFSET_OF (BCM2712_PPTT, PackageL3Cache)
+ },
+ { /* Clusters */
+ BCM2712_PPTT_CLUSTER_NODE_INIT (0), /* Big cluster */
+ },
+ { /* Cores */
+ BCM2712_PPTT_A76_CORE_NODE_INIT (0, 0x0), /* 4x Cortex-A76 (Big cluster) */
+ BCM2712_PPTT_A76_CORE_NODE_INIT (0, 0x1),
+ BCM2712_PPTT_A76_CORE_NODE_INIT (0, 0x2),
+ BCM2712_PPTT_A76_CORE_NODE_INIT (0, 0x3)
+ },
+
+ //
+ // Number of sets is likely wrong, but no datasheet to check.
+ //
+ BCM2712_PPTT_CACHE_NODE_INIT ( /* PackageL3Cache */
+ 0, /* NextLevelOfCache */
+ SIZE_2MB, /* Size */
+ 4096, /* NumberOfSets */
+ PPTT_UNIFIED_CACHE_ATTRIBUTES /* Attributes */
+ ),
+ BCM2712_PPTT_CACHE_NODE_INIT ( /* A76L1DCache */
+ OFFSET_OF (BCM2712_PPTT, A76L2Cache), /* NextLevelOfCache */
+ SIZE_64KB, /* Size */
+ 256, /* NumberOfSets */
+ PPTT_DATA_CACHE_ATTRIBUTES /* Attributes */
+ ),
+ BCM2712_PPTT_CACHE_NODE_INIT ( /* A76L1ICache */
+ OFFSET_OF (BCM2712_PPTT, A76L2Cache), /* NextLevelOfCache */
+ SIZE_64KB, /* Size */
+ 256, /* NumberOfSets */
+ PPTT_INST_CACHE_ATTRIBUTES /* Attributes */
+ ),
+ BCM2712_PPTT_CACHE_NODE_INIT ( /* A76L2Cache */
+ 0, /* NextLevelOfCache */
+ SIZE_512KB, /* Size */
+ 1024, /* NumberOfSets */
+ PPTT_UNIFIED_CACHE_ATTRIBUTES /* Attributes */
+ )
+};
+
+VOID* CONST ReferenceAcpiTable = &Pptt;
diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Spcr.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Spcr.aslc
new file mode 100644
index 00000000..873d18c8
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Spcr.aslc
@@ -0,0 +1,74 @@
+/** @file
+ *
+ * Serial Port Console Redirection Table (SPCR)
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ * Copyright (c) 2012-2021, ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
+#include <Library/AcpiLib.h>
+
+#include "AcpiTables.h"
+
+STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
+ ACPI_HEADER (
+ EFI_ACPI_6_3_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
+ ),
+ // UINT8 InterfaceType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART,
+ // UINT8 Reserved1[3];
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddress;
+ ARM_GAS32 (PL011_DEBUG_BASE_ADDRESS),
+ // UINT8 InterruptType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
+ // UINT8 Irq;
+ 0, // Not used on ARM
+ // UINT32 GlobalSystemInterrupt;
+ PL011_DEBUG_INTERRUPT,
+ // UINT8 BaudRate;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
+ // UINT8 Parity;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
+ // UINT8 StopBits;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
+ // UINT8 FlowControl;
+ 0,
+ // UINT8 TerminalType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT_UTF8,
+ // UINT8 Reserved2;
+ EFI_ACPI_RESERVED_BYTE,
+ // UINT16 PciDeviceId;
+ 0xFFFF,
+ // UINT16 PciVendorId;
+ 0xFFFF,
+ // UINT8 PciBusNumber;
+ 0x00,
+ // UINT8 PciDeviceNumber;
+ 0x00,
+ // UINT8 PciFunctionNumber;
+ 0x00,
+ // UINT32 PciFlags;
+ 0x00000000,
+ // UINT8 PciSegment;
+ 0x00,
+ // UINT32 Reserved3;
+ EFI_ACPI_RESERVED_DWORD
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Spcr;
diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c
new file mode 100644
index 00000000..da86e2e0
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c
@@ -0,0 +1,162 @@
+/** @file
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <Guid/RpiPlatformFormSetGuid.h>
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Protocol/AcpiSystemDescriptionTable.h>
+#include <RpiPlatformVarStoreData.h>
+
+#include "ConfigTable.h"
+
+//
+// AcpiTables.inf
+//
+STATIC CONST EFI_GUID mAcpiTableFile = {
+ 0x7E374E25, 0x8E01, 0x4FEE, { 0x87, 0xf2, 0x39, 0x0C, 0x23, 0xC6, 0x06, 0xCD }
+};
+
+STATIC ACPI_SD_COMPAT_MODE_VARSTORE_DATA AcpiSdCompatMode;
+STATIC ACPI_SD_LIMIT_UHS_VARSTORE_DATA AcpiSdLimitUhs;
+
+STATIC
+VOID
+EFIAPI
+DsdtFixupSd (
+ IN EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol,
+ IN EFI_ACPI_HANDLE TableHandle
+ )
+{
+ EFI_STATUS Status;
+
+ Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle,
+ "\\_SB.SDCM", AcpiSdCompatMode.Value);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Failed to patch AcpiSdCompatMode.\n", __func__));
+ }
+
+ Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle,
+ "\\_SB.SDLU", AcpiSdLimitUhs.Value);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Failed to patch AcpiSdLimitUhs.\n", __func__));
+ }
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+ApplyDsdtFixups (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol;
+ EFI_ACPI_DESCRIPTION_HEADER *Table;
+ UINTN TableKey;
+ UINTN TableIndex;
+ EFI_ACPI_HANDLE TableHandle;
+
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiSdtProtocolGuid,
+ NULL,
+ (VOID **)&AcpiSdtProtocol);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Couldn't locate gEfiAcpiSdtProtocolGuid!\n", __func__));
+ return Status;
+ }
+
+ TableIndex = 0;
+ Status = AcpiLocateTableBySignature (
+ AcpiSdtProtocol,
+ EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ &TableIndex,
+ &Table,
+ &TableKey);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Couldn't locate ACPI DSDT table!\n", __func__));
+ return Status;
+ }
+
+ Status = AcpiSdtProtocol->OpenSdt (TableKey, &TableHandle);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Couldn't open ACPI DSDT table!\n", __func__));
+ AcpiSdtProtocol->Close (TableHandle);
+ return Status;
+ }
+
+ DsdtFixupSd (AcpiSdtProtocol, TableHandle);
+
+ AcpiSdtProtocol->Close (TableHandle);
+ AcpiUpdateChecksum ((UINT8 *)Table, Table->Length);
+
+ return EFI_SUCCESS;
+}
+
+VOID
+EFIAPI
+ApplyConfigTableVariables (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+
+ Status = LocateAndInstallAcpiFromFvConditional (&mAcpiTableFile, NULL);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables!\n"));
+ return;
+ }
+
+ Status = ApplyDsdtFixups ();
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Failed to apply ACPI DSDT fixups!\n"));
+ }
+}
+
+VOID
+EFIAPI
+SetupConfigTableVariables (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINTN Size;
+
+ AcpiSdCompatMode.Value = ACPI_SD_COMPAT_MODE_DEFAULT;
+ AcpiSdLimitUhs.Value = ACPI_SD_LIMIT_UHS_DEFAULT;
+
+ Size = sizeof (ACPI_SD_COMPAT_MODE_VARSTORE_DATA);
+ Status = gRT->GetVariable (L"AcpiSdCompatMode",
+ &gRpiPlatformFormSetGuid,
+ NULL, &Size, &AcpiSdCompatMode);
+ if (EFI_ERROR (Status)) {
+ Status = gRT->SetVariable (
+ L"AcpiSdCompatMode",
+ &gRpiPlatformFormSetGuid,
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
+ Size,
+ &AcpiSdCompatMode);
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ Size = sizeof (ACPI_SD_LIMIT_UHS_VARSTORE_DATA);
+ Status = gRT->GetVariable (L"AcpiSdLimitUhs",
+ &gRpiPlatformFormSetGuid,
+ NULL, &Size, &AcpiSdLimitUhs);
+ if (EFI_ERROR (Status)) {
+ Status = gRT->SetVariable (
+ L"AcpiSdLimitUhs",
+ &gRpiPlatformFormSetGuid,
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
+ Size,
+ &AcpiSdLimitUhs);
+ ASSERT_EFI_ERROR (Status);
+ }
+}
diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h
new file mode 100644
index 00000000..8dadc409
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h
@@ -0,0 +1,31 @@
+/** @file
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#ifndef __RPI_PLATFORM_CONFIG_TABLE_H__
+#define __RPI_PLATFORM_CONFIG_TABLE_H__
+
+#include <RpiPlatformVarStoreData.h>
+
+#define ACPI_SD_COMPAT_MODE_DEFAULT ACPI_SD_COMPAT_MODE_BRCMSTB_BAYTRAIL
+#define ACPI_SD_LIMIT_UHS_DEFAULT TRUE
+
+#ifndef VFRCOMPILE
+VOID
+EFIAPI
+ApplyConfigTableVariables (
+ VOID
+ );
+
+VOID
+EFIAPI
+SetupConfigTableVariables (
+ VOID
+ );
+#endif // VFRCOMPILE
+
+#endif // __RPI_PLATFORM_CONFIG_TABLE_H__
diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c
index 5d993266..c0601b39 100644
--- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c
+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c
@@ -7,9 +7,101 @@
**/
#include <Uefi.h>
+#include <Guid/RpiPlatformFormSetGuid.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HiiLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include "ConfigTable.h"
#include "Peripherals.h"
+extern UINT8 RpiPlatformDxeHiiBin[];
+extern UINT8 RpiPlatformDxeStrings[];
+
+typedef struct {
+ VENDOR_DEVICE_PATH VendorDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} HII_VENDOR_DEVICE_PATH;
+
+STATIC HII_VENDOR_DEVICE_PATH mVendorDevicePath = {
+ {
+ {
+ HARDWARE_DEVICE_PATH,
+ HW_VENDOR_DP,
+ {
+ (UINT8)(sizeof (VENDOR_DEVICE_PATH)),
+ (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)
+ }
+ },
+ RPI_PLATFORM_FORMSET_GUID
+ },
+ {
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ {
+ (UINT8)(END_DEVICE_PATH_LENGTH),
+ (UINT8)((END_DEVICE_PATH_LENGTH) >> 8)
+ }
+ }
+};
+
+STATIC
+EFI_STATUS
+EFIAPI
+InstallHiiPages (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_HII_HANDLE HiiHandle;
+ EFI_HANDLE DriverHandle;
+
+ DriverHandle = NULL;
+ Status = gBS->InstallMultipleProtocolInterfaces (&DriverHandle,
+ &gEfiDevicePathProtocolGuid,
+ &mVendorDevicePath,
+ NULL);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ HiiHandle = HiiAddPackages (&gRpiPlatformFormSetGuid,
+ DriverHandle,
+ RpiPlatformDxeStrings,
+ RpiPlatformDxeHiiBin,
+ NULL);
+
+ if (HiiHandle == NULL) {
+ gBS->UninstallMultipleProtocolInterfaces (DriverHandle,
+ &gEfiDevicePathProtocolGuid,
+ &mVendorDevicePath,
+ NULL);
+ return EFI_OUT_OF_RESOURCES;
+ }
+ return EFI_SUCCESS;
+}
+
+STATIC
+VOID
+EFIAPI
+SetupVariables (
+ VOID
+ )
+{
+ SetupConfigTableVariables ();
+}
+
+STATIC
+VOID
+EFIAPI
+ApplyVariables (
+ VOID
+ )
+{
+ ApplyConfigTableVariables ();
+}
+
EFI_STATUS
EFIAPI
RpiPlatformDxeEntryPoint (
@@ -17,7 +109,17 @@ RpiPlatformDxeEntryPoint (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
+ EFI_STATUS Status;
+
+ SetupVariables ();
+ ApplyVariables ();
+
SetupPeripherals ();
+ Status = InstallHiiPages ();
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Couldn't install HII pages. Status=%r\n", __func__, Status));
+ }
+
return EFI_SUCCESS;
}
diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf
index 7292ca30..b1cb4303 100644
--- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf
+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf
@@ -16,6 +16,9 @@
[Sources]
RpiPlatformDxe.c
+ RpiPlatformDxeHii.uni
+ RpiPlatformDxeHii.vfr
+ ConfigTable.c
Peripherals.c
[Packages]
@@ -23,18 +26,29 @@
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
Platform/RaspberryPi/RaspberryPi.dec
+ Platform/RaspberryPi/RPi5/RPi5.dec
Silicon/Broadcom/BroadcomPkg.dec
Silicon/Broadcom/Bcm27xx/Bcm27xx.dec
[LibraryClasses]
+ AcpiLib
DebugLib
+ DevicePathLib
+ HiiLib
UefiLib
UefiBootServicesTableLib
+ UefiRuntimeServicesTableLib
UefiDriverEntryPoint
Bcm2712GpioLib
+[Guids]
+ gRpiPlatformFormSetGuid
+
[Protocols]
+ gEfiAcpiSdtProtocolGuid ## CONSUMES
gBrcmStbSdhciDeviceProtocolGuid ## PRODUCES
[Depex]
- TRUE
+ gEfiVariableArchProtocolGuid
+ AND gEfiVariableWriteArchProtocolGuid
+ AND gEfiAcpiSdtProtocolGuid
diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni
new file mode 100644
index 00000000..7f362922
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni
@@ -0,0 +1,44 @@
+/** @file
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#langdef en-US "English"
+
+#string STR_NULL_STRING #language en-US ""
+
+#string STR_FORM_SET_TITLE #language en-US "Raspberry Pi Configuration"
+#string STR_FORM_SET_TITLE_HELP #language en-US "Configure various platform settings."
+#string STR_FORM_SET_TITLE_SUBTITLE #language en-US "Configuration Options"
+
+/*
+ * ACPI / Device Tree configuration
+ */
+#string STR_CONFIG_TABLE_FORM_TITLE #language en-US "ACPI / Device Tree"
+#string STR_CONFIG_TABLE_FORM_HELP #language en-US "Configure the ACPI and Device Tree system tables support."
+
+#string STR_CONFIG_TABLE_ACPI_SUBTITLE #language en-US "ACPI Configuration"
+
+#string STR_ACPI_SD_SUBTITLE #language en-US "Broadcom SD Host Controller"
+
+#string STR_ACPI_SD_COMPAT_MODE_PROMPT #language en-US "Compatibility Mode"
+#string STR_ACPI_SD_COMPAT_MODE_HELP #language en-US "Configure how the device presents to the OS.\n\n"
+ "This SD controller shares some quirks with the Intel Bay Trail series and can reuse its existing OS driver support.\n"
+ "The modes available are:\n"
+ " - BRCMSTB + Bay Trail: the device is exposed primarily as a Broadcom controller but compatible with Bay Trail. Provides maximum compatibility at reduced speed, while allowing OSes to provide tailored driver support in the future. Validated with Windows, Linux and FreeBSD.\n"
+ " - Full Bay Trail: the device is exposed as fully compliant to Bay Trail. This is only necessary for Linux to use the appropriate workarounds and unlock higher speeds (DDR50). However, it will prevent drivers from identifying the device as Broadcom and potentially offering more specific support."
+
+#string STR_ACPI_SD_COMPAT_BRCMSTB_BAYTRAIL #language en-US "BRCMSTB + Bay Trail"
+#string STR_ACPI_SD_COMPAT_FULL_BAYTRAIL #language en-US "Full Bay Trail"
+
+#string STR_ACPI_SD_LIMIT_UHS_PROMPT #language en-US "Limit UHS-I Modes"
+#string STR_ACPI_SD_LIMIT_UHS_HELP #language en-US "Limit UHS-I modes to the maximum supported default.\n\n"
+ "Due to another bug in the SD controller, modes that require tuning (SDR104/50) need hardware retuning to be disabled by the host driver.\n\n"
+ "For Windows: speed is limited to DDR50. Disabling this limit is not safe and will crash the system when an UHS-I SDR card is connected. A 3rd party driver is required instead.\n\n"
+ "For Linux:\n"
+ "- in 'BRCMSTB + Bay Trail' mode, speed is limited to HS. Disabling this limit is not possible.\n"
+ "- in 'Full Bay Trail' mode, speed is increased to DDR50. It also becomes possible to disable all other UHS-I limitations.\n\n"
+ "For FreeBSD: speed falls back to HS. This option has no effect."
diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr
new file mode 100644
index 00000000..65163f10
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr
@@ -0,0 +1,67 @@
+/** @file
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <Uefi/UefiMultiPhase.h>
+#include <Guid/HiiPlatformSetupFormset.h>
+#include <Guid/RpiPlatformFormSetGuid.h>
+#include <RpiPlatformVarStoreData.h>
+
+#include "ConfigTable.h"
+
+formset
+ guid = RPI_PLATFORM_FORMSET_GUID,
+ title = STRING_TOKEN(STR_FORM_SET_TITLE),
+ help = STRING_TOKEN(STR_FORM_SET_TITLE_HELP),
+ classguid = EFI_HII_PLATFORM_SETUP_FORMSET_GUID,
+
+ efivarstore ACPI_SD_COMPAT_MODE_VARSTORE_DATA,
+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+ name = AcpiSdCompatMode,
+ guid = RPI_PLATFORM_FORMSET_GUID;
+
+ efivarstore ACPI_SD_LIMIT_UHS_VARSTORE_DATA,
+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+ name = AcpiSdLimitUhs,
+ guid = RPI_PLATFORM_FORMSET_GUID;
+
+ form formid = 1,
+ title = STRING_TOKEN(STR_FORM_SET_TITLE);
+
+ subtitle text = STRING_TOKEN(STR_FORM_SET_TITLE_SUBTITLE);
+ subtitle text = STRING_TOKEN(STR_NULL_STRING);
+
+ goto 0x1000,
+ prompt = STRING_TOKEN(STR_CONFIG_TABLE_FORM_TITLE),
+ help = STRING_TOKEN(STR_CONFIG_TABLE_FORM_HELP);
+ endform;
+
+ form formid = 0x1000,
+ title = STRING_TOKEN(STR_CONFIG_TABLE_FORM_TITLE);
+
+ subtitle text = STRING_TOKEN(STR_CONFIG_TABLE_ACPI_SUBTITLE);
+
+ subtitle text = STRING_TOKEN(STR_NULL_STRING);
+ subtitle text = STRING_TOKEN(STR_ACPI_SD_SUBTITLE);
+
+ oneof varid = AcpiSdCompatMode.Value,
+ prompt = STRING_TOKEN(STR_ACPI_SD_COMPAT_MODE_PROMPT),
+ help = STRING_TOKEN(STR_ACPI_SD_COMPAT_MODE_HELP),
+ flags = NUMERIC_SIZE_1 | INTERACTIVE | RESET_REQUIRED,
+ default = ACPI_SD_COMPAT_MODE_DEFAULT,
+ option text = STRING_TOKEN(STR_ACPI_SD_COMPAT_BRCMSTB_BAYTRAIL), value = ACPI_SD_COMPAT_MODE_BRCMSTB_BAYTRAIL, flags = 0;
+ option text = STRING_TOKEN(STR_ACPI_SD_COMPAT_FULL_BAYTRAIL), value = ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL, flags = 0;
+ endoneof;
+
+ checkbox varid = AcpiSdLimitUhs.Value,
+ prompt = STRING_TOKEN(STR_ACPI_SD_LIMIT_UHS_PROMPT),
+ help = STRING_TOKEN(STR_ACPI_SD_LIMIT_UHS_HELP),
+ flags = CHECKBOX_DEFAULT | CHECKBOX_DEFAULT_MFG | RESET_REQUIRED,
+ default = ACPI_SD_LIMIT_UHS_DEFAULT,
+ endcheckbox;
+ endform;
+endformset;
diff --git a/Platform/RaspberryPi/RPi5/Include/Guid/RpiPlatformFormSetGuid.h b/Platform/RaspberryPi/RPi5/Include/Guid/RpiPlatformFormSetGuid.h
new file mode 100644
index 00000000..72953798
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/Include/Guid/RpiPlatformFormSetGuid.h
@@ -0,0 +1,17 @@
+/** @file
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#ifndef __RPI_PLATFORM_FORMSET_GUID_H__
+#define __RPI_PLATFORM_FORMSET_GUID_H__
+
+#define RPI_PLATFORM_FORMSET_GUID \
+ { 0x677a7ac5, 0x7d92, 0x4288, { 0x8b, 0xf0, 0x97, 0x04, 0x81, 0x02, 0xd1, 0x1c } }
+
+extern EFI_GUID gRpiPlatformFormSetGuid;
+
+#endif // __RPI_PLATFORM_FORMSET_GUID_H__
diff --git a/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h b/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h
new file mode 100644
index 00000000..374ecb09
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h
@@ -0,0 +1,22 @@
+/** @file
+ *
+ * Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#ifndef __RPI_PLATFORM_VARSTORE_DATA_H__
+#define __RPI_PLATFORM_VARSTORE_DATA_H__
+
+#define ACPI_SD_COMPAT_MODE_BRCMSTB_BAYTRAIL 0
+#define ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL 1
+typedef struct {
+ UINT8 Value;
+} ACPI_SD_COMPAT_MODE_VARSTORE_DATA;
+
+typedef struct {
+ BOOLEAN Value;
+} ACPI_SD_LIMIT_UHS_VARSTORE_DATA;
+
+#endif // __RPI_PLATFORM_VARSTORE_DATA_H__
diff --git a/Platform/RaspberryPi/RPi5/RPi5.dec b/Platform/RaspberryPi/RPi5/RPi5.dec
new file mode 100644
index 00000000..90f63f51
--- /dev/null
+++ b/Platform/RaspberryPi/RPi5/RPi5.dec
@@ -0,0 +1,19 @@
+#/** @file
+#
+# Copyright (c) 2023, Mario Bălănică <mariobalanica02@gmail.com>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ DEC_SPECIFICATION = 0x0001001A
+ PACKAGE_NAME = RPi5
+ PACKAGE_GUID = d4f34c69-5f19-4dbc-a4cb-02163197e35e
+ PACKAGE_VERSION = 1.0
+
+[Includes]
+ Include
+
+[Guids]
+ gRpiPlatformFormSetGuid = { 0x677a7ac5, 0x7d92, 0x4288, { 0x8b, 0xf0, 0x97, 0x04, 0x81, 0x02, 0xd1, 0x1c } }
diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc
index 0a97e317..f8e08de2 100644
--- a/Platform/RaspberryPi/RPi5/RPi5.dsc
+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc
@@ -416,6 +416,7 @@
# UARTs
gArmPlatformTokenSpaceGuid.PL011UartClkInHz|44000000
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt|153
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x107d001000
@@ -581,7 +582,7 @@
#
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
- # Platform/RaspberryPi/AcpiTables/AcpiTables.inf
+ Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf
#
# SMBIOS Support
diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf
index ba19551b..bfe6a90e 100644
--- a/Platform/RaspberryPi/RPi5/RPi5.fdf
+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf
@@ -241,7 +241,7 @@ READ_LOCK_STATUS = TRUE
#
INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
- # INF RuleOverride = ACPITABLE Platform/RaspberryPi/AcpiTables/AcpiTables.inf
+ INF RuleOverride = ACPITABLE Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf
#
# SMBIOS Support
diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h
index c5365141..c1d1f22f 100644
--- a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h
+++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h
@@ -9,6 +9,15 @@
#ifndef __BCM2712_H__
#define __BCM2712_H__
+#define BCM2712_IO_BASE 0x1000000000
+#define BCM2712_IO_LENGTH 0x1000000000
+
+#define BCM2712_LEGACY_BUS_BASE 0x107c000000
+#define BCM2712_LEGACY_BUS_LENGTH 0x4000000
+
+#define BCM2712_PL011_UART0_BASE 0x107d001000
+#define BCM2712_PL011_LENGTH 0x200
+
#define BCM2712_BRCMSTB_GIO_BASE 0x107d508500
#define BCM2712_BRCMSTB_GIO_LENGTH 0x40
#define BCM2712_BRCMSTB_GIO_AON_BASE 0x107d517c00
--
2.51.2
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