From 76b62551697dfd280aae95bcfddc4c700fd88e1c Mon Sep 17 00:00:00 2001 From: mjallen18 Date: Fri, 9 Jan 2026 12:10:25 -0600 Subject: [PATCH] edk --- packages/edk2/default.nix | 30 +- packages/edk2/patches/0001-SD-fixup.patch | 257 - .../edk2/patches/non-osi/0001-Add-RPi5.patch | 376 - ...-update-bl31.bin-for-new-DTB-address.patch | 23 - ...ryPi-Use-PCDs-for-base-addresses-in-.patch | 222 - ...ryPi-Read-board-revision-and-serial-.patch | 1080 -- ...0003-Platform-RPi5-Add-early-support.patch | 1672 --- ...ryPi-Fix-framebuffer-base-translatio.patch | 40 - ...05-Platform-RPi5-Add-RP1-USB-support.patch | 535 - ...con-Bcm2712-Add-GPIO-support-library.patch | 1346 --- ...0007-Platform-RPi5-Add-SDHCI-support.patch | 766 -- ...atform-RPi5-Add-initial-ACPI-support.patch | 1826 ---- ...orm-RPi5-Add-real-time-clock-support.patch | 611 -- ...ryPi-Enable-runtime-use-of-RpiFirmwa.patch | 245 - ...ryPi-Add-option-to-disable-EFI-Memor.patch | 511 - .../0012-Platform-RPi5-Enable-RNG.patch | 197 - ...rm-RPi5-Add-FDT-system-table-support.patch | 389 - .../0014-Platform-RPi5-Add-PCIe-support.patch | 5825 ---------- ...-RPi5-Make-AcpiTableDxe-less-verbose.patch | 75 - .../0016-Platform-RPi5-Add-SATA-drivers.patch | 54 - .../0017-Add-additional-BCM2712-boards.patch | 41 - .../0018-Set-pinctrl-lengths-for-D0.patch | 1074 -- .../platforms/0019-Update-DisplayDxe.c.patch | 48 - ...0020-Update-BoardRevisionHelperLib.c.patch | 30 - .../0021-Adjust-UART-interrupt-for-D0.patch | 26 - .../platforms/0022-Aug-28-edk2-needed.patch | 701 -- .../platforms/0023-Nov-29-update.patch | 9472 ----------------- .../platforms/0024-Through-Feb-21.patch | 114 - .../patches/platforms/0025-Late-May.patch | 88 - ...6-Allocate-more-space-for-UEFI-image.patch | 115 - .../0027-Update-ArmMmuLib-library-path.patch | 25 - .../0028-Fix-Fdt-and-remove-Uga.patch | 510 - ...dd-ArmTransferListLib-for-PeilessSec.patch | 24 - systems/aarch64-linux/pi5/default.nix | 1 - 34 files changed, 9 insertions(+), 28340 deletions(-) delete mode 100644 packages/edk2/patches/0001-SD-fixup.patch delete mode 100644 packages/edk2/patches/non-osi/0001-Add-RPi5.patch delete mode 100644 packages/edk2/patches/non-osi/0002-update-bl31.bin-for-new-DTB-address.patch delete mode 100644 packages/edk2/patches/platforms/0001-Platform-RaspberryPi-Use-PCDs-for-base-addresses-in-.patch delete mode 100644 packages/edk2/patches/platforms/0002-Platform-RaspberryPi-Read-board-revision-and-serial-.patch delete mode 100644 packages/edk2/patches/platforms/0003-Platform-RPi5-Add-early-support.patch delete mode 100644 packages/edk2/patches/platforms/0004-Platform-RaspberryPi-Fix-framebuffer-base-translatio.patch delete mode 100644 packages/edk2/patches/platforms/0005-Platform-RPi5-Add-RP1-USB-support.patch delete mode 100644 packages/edk2/patches/platforms/0006-Silicon-Bcm2712-Add-GPIO-support-library.patch delete mode 100644 packages/edk2/patches/platforms/0007-Platform-RPi5-Add-SDHCI-support.patch delete mode 100644 packages/edk2/patches/platforms/0008-Platform-RPi5-Add-initial-ACPI-support.patch delete mode 100644 packages/edk2/patches/platforms/0009-Platform-RPi5-Add-real-time-clock-support.patch delete mode 100644 packages/edk2/patches/platforms/0010-Platform-RaspberryPi-Enable-runtime-use-of-RpiFirmwa.patch delete mode 100644 packages/edk2/patches/platforms/0011-Platform-RaspberryPi-Add-option-to-disable-EFI-Memor.patch delete mode 100644 packages/edk2/patches/platforms/0012-Platform-RPi5-Enable-RNG.patch delete mode 100644 packages/edk2/patches/platforms/0013-Platform-RPi5-Add-FDT-system-table-support.patch delete mode 100644 packages/edk2/patches/platforms/0014-Platform-RPi5-Add-PCIe-support.patch delete mode 100644 packages/edk2/patches/platforms/0015-Platform-RPi5-Make-AcpiTableDxe-less-verbose.patch delete mode 100644 packages/edk2/patches/platforms/0016-Platform-RPi5-Add-SATA-drivers.patch delete mode 100644 packages/edk2/patches/platforms/0017-Add-additional-BCM2712-boards.patch delete mode 100644 packages/edk2/patches/platforms/0018-Set-pinctrl-lengths-for-D0.patch delete mode 100644 packages/edk2/patches/platforms/0019-Update-DisplayDxe.c.patch delete mode 100644 packages/edk2/patches/platforms/0020-Update-BoardRevisionHelperLib.c.patch delete mode 100644 packages/edk2/patches/platforms/0021-Adjust-UART-interrupt-for-D0.patch delete mode 100644 packages/edk2/patches/platforms/0022-Aug-28-edk2-needed.patch delete mode 100644 packages/edk2/patches/platforms/0023-Nov-29-update.patch delete mode 100644 packages/edk2/patches/platforms/0024-Through-Feb-21.patch delete mode 100644 packages/edk2/patches/platforms/0025-Late-May.patch delete mode 100644 packages/edk2/patches/platforms/0026-Allocate-more-space-for-UEFI-image.patch delete mode 100644 packages/edk2/patches/platforms/0027-Update-ArmMmuLib-library-path.patch delete mode 100644 packages/edk2/patches/platforms/0028-Fix-Fdt-and-remove-Uga.patch delete mode 100644 packages/edk2/patches/platforms/0029-add-ArmTransferListLib-for-PeilessSec.patch diff --git a/packages/edk2/default.nix b/packages/edk2/default.nix index eda8812..3370a66 100644 --- a/packages/edk2/default.nix +++ b/packages/edk2/default.nix @@ -15,28 +15,29 @@ let version = "stable202511"; edk2Src = fetchFromGitHub rec { - owner = "tianocore"; + owner = "mjallen18"; repo = "edk2"; name = repo; - tag = "edk2-${version}"; - hash = "sha256-R/rgz8dWcDYVoiM67K2UGuq0xXbjjJYBPtJ1FmfGIaU="; + #tag = "edk2-${version}"; + rev = "9765be56f1f816ef737153f5588b3294fcc69a63"; + hash = "sha256-oqfJbNeOj2BVJqWE+snD6ri3lUO1aNcmPg+eJpjyr5E="; fetchSubmodules = true; }; edk2NonOsiSrc = fetchFromGitHub rec { - owner = "tianocore"; + owner = "mjallen18"; repo = "edk2-non-osi"; name = repo; - rev = "94d048981116e2e3eda52dad1a89958ee404098d"; - hash = "sha256-6yuvVvmGn4yaEksbbvGDX1ZcKpdWBKnwaNjLGvgAWyk="; + rev = "09ee44f07ded544d976be8a03dec3715719f638e"; + hash = "sha256-k7nUb3WaRUIr9IlXdam2WGKPOzKjLNVFLfuD5h4veMc="; }; edk2PlatformsSrc = fetchFromGitHub rec { owner = "mjallen18"; repo = "edk2-platforms"; name = repo; - rev = "79827459f7849fa64e58daa9a1fcab7170973fc3"; - hash = "sha256-fLLyx1shcmKkJUETqunEbPkpJ2SWioHjgiJdqEiPpaE="; + rev = "b45583a9af9953133d606e9c142b001bd6d156c2"; + hash = "sha256-Bg9ujeFIWriOSdpYlQBTzViRlyalJkIPEjQUXDaZl/o="; }; in stdenv.mkDerivation rec { @@ -72,19 +73,6 @@ stdenv.mkDerivation rec { runHook postUnpack ''; - patchPhase = '' - runHook prePatch - - echo "Patching edk2" - (cd edk2 && patch -p1 < ${./patches/0001-SD-fixup.patch}) - - echo "Patching edk2-non-osi" - (cd edk2-non-osi && git apply --binary ${./patches/non-osi/0001-Add-RPi5.patch}) - (cd edk2-non-osi && git apply --binary ${./patches/non-osi/0002-update-bl31.bin-for-new-DTB-address.patch}) - - runHook postPatch - ''; - buildPhase = '' export PYTHON_COMMAND=${python3}/bin/python export WORKSPACE=$PWD diff --git a/packages/edk2/patches/0001-SD-fixup.patch b/packages/edk2/patches/0001-SD-fixup.patch deleted file mode 100644 index 0b39ae5..0000000 --- a/packages/edk2/patches/0001-SD-fixup.patch +++ /dev/null @@ -1,257 +0,0 @@ -From cea64af8854a7785e6ac3ecdcc47f46779940b21 Mon Sep 17 00:00:00 2001 -From: mattp -Date: Fri, 18 Jul 2025 08:23:43 -0400 -Subject: [PATCH] SD fixup - ---- - MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c | 32 ++++---- - .../Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 77 +++++++++++++++++++ - .../Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 28 ++++++- - MdeModulePkg/Include/Protocol/SdMmcOverride.h | 10 ++- - 4 files changed, 128 insertions(+), 19 deletions(-) - -diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c -index 8bf452e9d0..acb98c4a6a 100644 ---- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c -+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c -@@ -1215,6 +1215,7 @@ SdCardIdentification ( - EFI_STATUS Status; - EFI_PCI_IO_PROTOCOL *PciIo; - EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru; -+ EFI_HANDLE ControllerHandle; - UINT32 Ocr; - UINT16 Rca; - BOOLEAN Xpc; -@@ -1223,7 +1224,6 @@ SdCardIdentification ( - UINT16 ControllerVer; - UINT8 PowerCtrl; - UINT32 PresentState; -- UINT8 HostCtrl2; - UINTN Retry; - BOOLEAN ForceVoltage33; - BOOLEAN SdVersion1; -@@ -1231,10 +1231,22 @@ SdCardIdentification ( - ForceVoltage33 = FALSE; - SdVersion1 = FALSE; - -- PciIo = Private->PciIo; -- PassThru = &Private->PassThru; -+ PciIo = Private->PciIo; -+ PassThru = &Private->PassThru; -+ ControllerHandle = Private->ControllerHandle; - - Voltage33Retry: -+ // -+ // Start at 3.3V. -+ // Note that if we got here from a failed 1.8V switching attempt, -+ // the card should've been power cycled to reset its own voltage level. -+ // -+ Status = SdMmcHcSetSignalingVoltage (ControllerHandle, PciIo, Slot, SdMmcSignalingVoltage33); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "SdCardIdentification: Couldn't set 3.3V signaling: %r\n", Status)); -+ return Status; -+ } -+ - // - // 1. Send Cmd0 to the device - // -@@ -1371,16 +1383,10 @@ Voltage33Retry: - goto Error; - } - -- HostCtrl2 = BIT3; -- SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2); -- -- gBS->Stall (5000); -- -- SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, TRUE, sizeof (HostCtrl2), &HostCtrl2); -- if ((HostCtrl2 & BIT3) == 0) { -- DEBUG ((DEBUG_ERROR, "SdCardIdentification: SwitchVoltage fails with HostCtrl2 = 0x%x\n", HostCtrl2)); -- Status = EFI_DEVICE_ERROR; -- goto Error; -+ Status = SdMmcHcSetSignalingVoltage (ControllerHandle, PciIo, Slot, SdMmcSignalingVoltage18); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "SdCardIdentification: Couldn't set 1.8V signaling: %r\n", Status)); -+ return Status; - } - - Status = SdMmcHcStartSdClock (PciIo, Slot); -diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c -index 9e8a7f4e43..2e334c67e2 100644 ---- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c -+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c -@@ -1175,6 +1175,83 @@ SdMmcHcInitPowerVoltage ( - return Status; - } - -+/** -+ Set the voltage regulator for I/O signaling. -+ -+ @param[in] PciIo The PCI IO protocol instance. -+ @param[in] Slot The slot number of the SD card to send the command to. -+ @param[in] Voltage The signaling voltage. -+ -+ @retval EFI_SUCCESS The voltage is supplied successfully. -+ @retval Others The voltage isn't supplied successfully. -+ -+**/ -+EFI_STATUS -+SdMmcHcSetSignalingVoltage ( -+ IN EFI_HANDLE ControllerHandle, -+ IN EFI_PCI_IO_PROTOCOL *PciIo, -+ IN UINT8 Slot, -+ IN SD_MMC_SIGNALING_VOLTAGE Voltage -+ ) -+{ -+ EFI_STATUS Status; -+ UINT8 HostCtrl2; -+ -+ // -+ // Set the internal regulator first. -+ // -+ switch (Voltage) { -+ case SdMmcSignalingVoltage33: -+ HostCtrl2 = ~SD_MMC_HC_CTRL_1V8_SIGNAL; -+ SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2); -+ break; -+ case SdMmcSignalingVoltage18: -+ HostCtrl2 = SD_MMC_HC_CTRL_1V8_SIGNAL; -+ SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2); -+ break; -+ default: -+ ASSERT (FALSE); -+ return EFI_INVALID_PARAMETER; -+ } -+ -+ // -+ // Some controllers rely on an external regulator. -+ // -+ if ((mOverride != NULL) && (mOverride->NotifyPhase != NULL)) { -+ Status = mOverride->NotifyPhase ( -+ ControllerHandle, -+ Slot, -+ EdkiiSdMmcSetSignalingVoltage, -+ &Voltage -+ ); -+ if (EFI_ERROR (Status)) { -+ DEBUG (( -+ DEBUG_ERROR, -+ "%a: SD/MMC set signaling voltage notifier callback failed - %r\n", -+ __func__, -+ Status -+ )); -+ return Status; -+ } -+ } -+ -+ gBS->Stall (5000); -+ -+ Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, TRUE, sizeof (HostCtrl2), &HostCtrl2); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ HostCtrl2 &= SD_MMC_HC_CTRL_1V8_SIGNAL; -+ if (((Voltage == SdMmcSignalingVoltage33) && (HostCtrl2 != 0)) || -+ ((Voltage == SdMmcSignalingVoltage18) && (HostCtrl2 == 0))) -+ { -+ return EFI_DEVICE_ERROR; -+ } -+ -+ return EFI_SUCCESS; -+} -+ - /** - Initialize the Timeout Control register with most conservative value at initialization. - -diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h -index e436a7d11a..e771ba7bad 100644 ---- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h -+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h -@@ -2,10 +2,10 @@ - - Provides some data structure definitions used by the SD/MMC host controller driver. - -- Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. -- Copyright (c) 2015, Intel Corporation. All rights reserved.
-- Copyright (C) 2023, Apple Inc. All rights reserved.
-- SPDX-License-Identifier: BSD-2-Clause-Patent -+Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. -+Copyright (c) 2015, Intel Corporation. All rights reserved.
-+Copyright (C) 2023, Apple Inc. All rights reserved.
-+SPDX-License-Identifier: BSD-2-Clause-Patent - - @par Specification Reference: - - SD Host Controller Simplified Specification, Version 4.20, July 25, 2018 -@@ -63,6 +63,7 @@ - // - // SD Host Controller bits to HOST_CTRL2 register - // -+#define SD_MMC_HC_CTRL_1V8_SIGNAL 0x0008 - #define SD_MMC_HC_CTRL_UHS_MASK 0x0007 - #define SD_MMC_HC_CTRL_UHS_SDR12 0x0000 - #define SD_MMC_HC_CTRL_UHS_SDR25 0x0001 -@@ -559,6 +560,25 @@ SdMmcHcInitPowerVoltage ( - IN SD_MMC_HC_SLOT_CAP Capability - ); - -+/** -+ Set the voltage regulator for I/O signaling. -+ -+ @param[in] PciIo The PCI IO protocol instance. -+ @param[in] Slot The slot number of the SD card to send the command to. -+ @param[in] Voltage The signaling voltage. -+ -+ @retval EFI_SUCCESS The voltage is supplied successfully. -+ @retval Others The voltage isn't supplied successfully. -+ -+**/ -+EFI_STATUS -+SdMmcHcSetSignalingVoltage ( -+ IN EFI_HANDLE ControllerHandle, -+ IN EFI_PCI_IO_PROTOCOL *PciIo, -+ IN UINT8 Slot, -+ IN SD_MMC_SIGNALING_VOLTAGE Voltage -+ ); -+ - /** - Initialize the Timeout Control register with most conservative value at initialization. - -diff --git a/MdeModulePkg/Include/Protocol/SdMmcOverride.h b/MdeModulePkg/Include/Protocol/SdMmcOverride.h -index 4fd12b9ad4..d611bb04d8 100644 ---- a/MdeModulePkg/Include/Protocol/SdMmcOverride.h -+++ b/MdeModulePkg/Include/Protocol/SdMmcOverride.h -@@ -16,7 +16,7 @@ - #define EDKII_SD_MMC_OVERRIDE_PROTOCOL_GUID \ - { 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } } - --#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION 0x3 -+#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION 0x4 - - typedef struct _EDKII_SD_MMC_OVERRIDE EDKII_SD_MMC_OVERRIDE; - -@@ -83,6 +83,11 @@ typedef enum { - SdMmcMmcHs400, - } SD_MMC_BUS_MODE; - -+typedef enum { -+ SdMmcSignalingVoltage33, -+ SdMmcSignalingVoltage18 -+} SD_MMC_SIGNALING_VOLTAGE; -+ - typedef enum { - EdkiiSdMmcResetPre, - EdkiiSdMmcResetPost, -@@ -90,7 +95,8 @@ typedef enum { - EdkiiSdMmcInitHostPost, - EdkiiSdMmcUhsSignaling, - EdkiiSdMmcSwitchClockFreqPost, -- EdkiiSdMmcGetOperatingParam -+ EdkiiSdMmcGetOperatingParam, -+ EdkiiSdMmcSetSignalingVoltage - } EDKII_SD_MMC_PHASE_TYPE; - - /** --- -2.51.2 - diff --git a/packages/edk2/patches/non-osi/0001-Add-RPi5.patch b/packages/edk2/patches/non-osi/0001-Add-RPi5.patch deleted file mode 100644 index fab30ad..0000000 --- a/packages/edk2/patches/non-osi/0001-Add-RPi5.patch +++ /dev/null @@ -1,376 +0,0 @@ -From cfc24a5bf9eb23a9e9060ea1c5fcc9f51f208d18 Mon Sep 17 00:00:00 2001 -From: mattp -Date: Thu, 17 Jul 2025 15:04:10 -0400 -Subject: [PATCH 1/2] Add RPi5 - ---- - .../RPi5/TrustedFirmware/License.txt | 26 ++++++++++++++++++ - .../RaspberryPi/RPi5/TrustedFirmware/bl31.bin | Bin 0 -> 32878 bytes - 2 files changed, 26 insertions(+) - create mode 100644 Platform/RaspberryPi/RPi5/TrustedFirmware/License.txt - create mode 100755 Platform/RaspberryPi/RPi5/TrustedFirmware/bl31.bin - -diff --git a/Platform/RaspberryPi/RPi5/TrustedFirmware/License.txt b/Platform/RaspberryPi/RPi5/TrustedFirmware/License.txt -new file mode 100644 -index 0000000..4842997 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/TrustedFirmware/License.txt -@@ -0,0 +1,26 @@ -+Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. -+ -+Redistribution and use in source and binary forms, with or without modification, -+are permitted provided that the following conditions are met: -+ -+* Redistributions of source code must retain the above copyright notice, this -+ list of conditions and the following disclaimer. -+ -+* Redistributions in binary form must reproduce the above copyright notice, this -+ list of conditions and the following disclaimer in the documentation and/or -+ other materials provided with the distribution. -+ -+* Neither the name of ARM nor the names of its contributors may be used to -+ endorse or promote products derived from this software without specific prior -+ written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -diff --git a/Platform/RaspberryPi/RPi5/TrustedFirmware/bl31.bin b/Platform/RaspberryPi/RPi5/TrustedFirmware/bl31.bin -new file mode 100755 -index 0000000000000000000000000000000000000000..3d1c76972c4bdf76d45e473d25757036e52b8abb -GIT binary patch -literal 32878 -zcmZQzVGv;$L4Z5_U(^Wl?xk%|NG$urARu@3zCH8RMka -zU^oB~pT)#5MV^Ua3KNUNPX`A3YmSUfmly=>t}-w%u7c_9Vq%!W$kA|#p@wm`BLl++ -zMFysc3=E9j4j1IEGO#sVVi1(O%D}Mbl7g_@RfdL!OAJgqJ~;@=UH$LEd{tlA?&^ES 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-z0k+@z9jN~}aN$3Hfc;-T!1l)vu>HH=4s87Yt454*$sM$~8pq&Z_UrBc>BwjLEI9Tz -z1aziP1Bgy$_~-zl>lr>CSn)T6pTh9NX8*0X|EEj6rBAtl&Hi0)|4;w*hCcT1r;|T% -zl`z=+Uxgn3+o16eqCxQwqCxRL<8Memh3>~@f7ILm(`V5s{IS_@_4fbtDmvM3Pht4s -zidUk=!DmJht(y7@N9`AibC2?sFAAP=G7G$WWV1t!4+R2`U2kXR7_QE~uE?}5?~QB3j!4tbV9h}sKK`VW-m -z2!e=Hjhyhm9vn^!pfo{)1;F9Rz#s^vg}`)$C`2RZ40{F!MusU+{!0TMu*4Q9|Az-3 -znEwEJtK*Rbu0Ib -z85o|iGcqu+F>~J7+iRlZ|M^K7m -zVqj!YVqgR@8B7`28NU99KnQCSl%D{mJs7_J-wI~6F?{{MoK~lk$#U-h^#R}z_B^mjpB?@k?jv?^@j!uq# -zF8+QB#Tg)-dFmw!<%!v;3Z(@gEijLjBo?Ko!i>yGElbT&NXsu$C@w87NX<)8$S+7O -zN-W9D&*Ng?%FRtIh)+yOi7!e`&&Oa6yA;8hk(^(<0L?OT#q^1ItvM6hinriXikTIT`|^Aut*OqaiRF0;3@? -z8UmvsFtS77KL{`|Fo3B43=9kzXCUDL@5f(&@L3=fL&JFp1JVzLu(6RK^FZRDRxGHi -I38EQU02$>0ga7~l - -literal 0 -HcmV?d00001 - --- -2.51.2 - diff --git a/packages/edk2/patches/non-osi/0002-update-bl31.bin-for-new-DTB-address.patch b/packages/edk2/patches/non-osi/0002-update-bl31.bin-for-new-DTB-address.patch deleted file mode 100644 index fea50a7..0000000 --- a/packages/edk2/patches/non-osi/0002-update-bl31.bin-for-new-DTB-address.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 1e089448a4c82b473da6fb31a5058b65f38bc79a Mon Sep 17 00:00:00 2001 -From: mattp -Date: Thu, 17 Jul 2025 19:47:29 -0400 -Subject: [PATCH 2/2] update bl31.bin for new DTB address - ---- - .../RaspberryPi/RPi5/TrustedFirmware/bl31.bin | Bin 32878 -> 32878 bytes - 1 file changed, 0 insertions(+), 0 deletions(-) - -diff --git a/Platform/RaspberryPi/RPi5/TrustedFirmware/bl31.bin b/Platform/RaspberryPi/RPi5/TrustedFirmware/bl31.bin -index 3d1c76972c4bdf76d45e473d25757036e52b8abb..f5a2d603a358bb785345950157a9df95bf2e1dd5 100755 -GIT binary patch -delta 54 -zcmaFY!1S(xX@ieE(*gF)e)1xLoOTQlV7EED;3 -Date: Mon, 11 Dec 2023 06:39:02 +0200 -Subject: [PATCH 01/16] Platform/RaspberryPi: Use PCDs for base addresses in - RpiFirmwareDxe -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -All peripheral offsets defined in Bcm2836.h have changed with BCM2712. - -Therefore, start moving drivers that we plan on reusing for Pi 5 to -plain PCDs, but keep the old definitions in place as they're still being -used by Pi3/4 ACPI code. - -Signed-off-by: Mario Bălănică ---- - .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c | 16 +++++++------ - .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf | 3 ++- - .../PlatformLib/AArch64/RaspberryPiHelper.S | 1 + - Platform/RaspberryPi/RPi3/RPi3.dsc | 5 ++++ - Platform/RaspberryPi/RPi4/RPi4.dsc | 5 ++++ - Platform/RaspberryPi/RaspberryPi.dec | 1 + - .../Include/IndustryStandard/Bcm2836.h | 9 ------- - .../Include/IndustryStandard/Bcm2836Mbox.h | 24 +++++++++++++++++++ - 8 files changed, 47 insertions(+), 17 deletions(-) - create mode 100644 Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Mbox.h - -diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -index 4edec0ad..6fe76e1d 100644 ---- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -+++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -@@ -21,11 +21,13 @@ - #include - #include - --#include -+#include - #include - - #include - -+#define MBOX_BASE_ADDRESS PcdGet64 (PcdFwMailboxBaseAddress) -+ - // - // The number of statically allocated buffer pages - // -@@ -51,12 +53,12 @@ DrainMailbox ( - // - Tries = 0; - do { -- Val = MmioRead32 (BCM2836_MBOX_BASE_ADDRESS + BCM2836_MBOX_STATUS_OFFSET); -+ Val = MmioRead32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_STATUS_OFFSET); - if (Val & (1U << BCM2836_MBOX_STATUS_EMPTY)) { - return TRUE; - } - ArmDataSynchronizationBarrier (); -- MmioRead32 (BCM2836_MBOX_BASE_ADDRESS + BCM2836_MBOX_READ_OFFSET); -+ MmioRead32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_READ_OFFSET); - } while (++Tries < RPI_MBOX_MAX_TRIES); - - return FALSE; -@@ -76,7 +78,7 @@ MailboxWaitForStatusCleared ( - // - Tries = 0; - do { -- Val = MmioRead32 (BCM2836_MBOX_BASE_ADDRESS + BCM2836_MBOX_STATUS_OFFSET); -+ Val = MmioRead32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_STATUS_OFFSET); - if ((Val & StatusMask) == 0) { - return TRUE; - } -@@ -121,7 +123,7 @@ MailboxTransaction ( - // - // Start the mailbox transaction - // -- MmioWrite32 (BCM2836_MBOX_BASE_ADDRESS + BCM2836_MBOX_WRITE_OFFSET, -+ MmioWrite32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_WRITE_OFFSET, - (UINT32)((UINTN)mDmaBufferBusAddress | Channel)); - - ArmDataSynchronizationBarrier (); -@@ -139,7 +141,7 @@ MailboxTransaction ( - // Read back the result - // - ArmDataSynchronizationBarrier (); -- *Result = MmioRead32 (BCM2836_MBOX_BASE_ADDRESS + BCM2836_MBOX_READ_OFFSET); -+ *Result = MmioRead32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_READ_OFFSET); - ArmDataSynchronizationBarrier (); - - return EFI_SUCCESS; -@@ -954,7 +956,7 @@ RpiFirmwareAllocFb ( - } - - *Pitch = Cmd->Pitch.Pitch; -- *FbBase = Cmd->AllocFb.AlignmentBase - BCM2836_DMA_DEVICE_OFFSET; -+ *FbBase = Cmd->AllocFb.AlignmentBase - PcdGet64 (PcdDmaDeviceOffset); - *FbSize = Cmd->AllocFb.Size; - ReleaseSpinLock (&mMailboxLock); - -diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -index a3fc0fa4..08acc4b3 100644 ---- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -+++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -@@ -41,7 +41,8 @@ - gRaspberryPiFirmwareProtocolGuid ## PRODUCES - - [FixedPcd] -- gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress -+ gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress -+ gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset - - [Depex] - TRUE -diff --git a/Platform/RaspberryPi/Library/PlatformLib/AArch64/RaspberryPiHelper.S b/Platform/RaspberryPi/Library/PlatformLib/AArch64/RaspberryPiHelper.S -index 7008aaf8..d3c77be2 100644 ---- a/Platform/RaspberryPi/Library/PlatformLib/AArch64/RaspberryPiHelper.S -+++ b/Platform/RaspberryPi/Library/PlatformLib/AArch64/RaspberryPiHelper.S -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - #include - - .macro drain -diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3/RPi3.dsc -index f5361ab9..5e90f421 100644 ---- a/Platform/RaspberryPi/RPi3/RPi3.dsc -+++ b/Platform/RaspberryPi/RPi3/RPi3.dsc -@@ -446,6 +446,11 @@ - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq2|0x09 - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq3|0x09 - -+ # -+ # Mailbox -+ # -+ gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress|0x3f00b880 -+ - ## Default Terminal Type - ## 0-PCANSI, 1-VT100, 2-VT00+, 3-UTF8, 4-TTYTERM - gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 -diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc -index 4e91eb9a..4ab6a819 100644 ---- a/Platform/RaspberryPi/RPi4/RPi4.dsc -+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc -@@ -452,6 +452,11 @@ - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq2|0x32 - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq3|0x33 - -+ # -+ # Mailbox -+ # -+ gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress|0xfe00b880 -+ - # - # Fixed CPU settings. - # -diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/RaspberryPi.dec -index 6bd16a5a..d0025cf6 100644 ---- a/Platform/RaspberryPi/RaspberryPi.dec -+++ b/Platform/RaspberryPi/RaspberryPi.dec -@@ -50,6 +50,7 @@ - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq1|0x0|UINT32|0x00000034 - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq2|0x0|UINT32|0x00000035 - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq3|0x0|UINT32|0x00000036 -+ gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress|0x0|UINT64|0x00000037 - - [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] - gRaspberryPiTokenSpaceGuid.PcdCpuClock|0|UINT32|0x0000000d -diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h -index a930c64a..93d5eee9 100644 ---- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h -+++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h -@@ -57,15 +57,6 @@ - #define BCM2836_MBOX_OFFSET 0x0000b880 - #define BCM2836_MBOX_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET) - #define BCM2836_MBOX_LENGTH 0x00000024 --#define BCM2836_MBOX_READ_OFFSET 0x00000000 --#define BCM2836_MBOX_STATUS_OFFSET 0x00000018 --#define BCM2836_MBOX_CONFIG_OFFSET 0x0000001c --#define BCM2836_MBOX_WRITE_OFFSET 0x00000020 -- --#define BCM2836_MBOX_STATUS_FULL 0x1f --#define BCM2836_MBOX_STATUS_EMPTY 0x1e -- --#define BCM2836_MBOX_NUM_CHANNELS 16 - - /* interrupt controller constants */ - #define BCM2836_INTC_TIMER_CONTROL_OFFSET 0x00000040 -diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Mbox.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Mbox.h -new file mode 100644 -index 00000000..f9096548 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Mbox.h -@@ -0,0 +1,24 @@ -+/** @file -+ * -+ * Copyright (c) 2020, Pete Batard -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BCM2836_MBOX_H__ -+#define __BCM2836_MBOX_H__ -+ -+/* Mailbox registers */ -+#define BCM2836_MBOX_READ_OFFSET 0x00000000 -+#define BCM2836_MBOX_STATUS_OFFSET 0x00000018 -+#define BCM2836_MBOX_CONFIG_OFFSET 0x0000001c -+#define BCM2836_MBOX_WRITE_OFFSET 0x00000020 -+ -+#define BCM2836_MBOX_STATUS_FULL 0x1f -+#define BCM2836_MBOX_STATUS_EMPTY 0x1e -+ -+#define BCM2836_MBOX_NUM_CHANNELS 16 -+ -+#endif /* __BCM2836_MBOX_H__ */ --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0002-Platform-RaspberryPi-Read-board-revision-and-serial-.patch b/packages/edk2/patches/platforms/0002-Platform-RaspberryPi-Read-board-revision-and-serial-.patch deleted file mode 100644 index 9118d71..0000000 --- a/packages/edk2/patches/platforms/0002-Platform-RaspberryPi-Read-board-revision-and-serial-.patch +++ /dev/null @@ -1,1080 +0,0 @@ -From ca35cfb913171881685b8dddd1f61512c1a2b053 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Tue, 12 Dec 2023 00:49:37 +0200 -Subject: [PATCH 02/16] Platform/RaspberryPi: Read board revision and serial - from FDT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The mailbox "get revision code" property no longer works on RPi 5. "Get -serial" still does, but only returns the low part of the number. - -It is now recommended to read these fields from the FDT passed by the -VPU firmware, which also conveniently fills in other useful info under -the /chosen node. - -This works on all supported boards, provided there's a valid DTB in the -boot partition. - -Signed-off-by: Mario Bălănică ---- - .../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 26 +-- - .../Drivers/ConfigDxe/ConfigDxe.inf | 2 + - .../PlatformSmbiosDxe/PlatformSmbiosDxe.c | 80 +++---- - .../PlatformSmbiosDxe/PlatformSmbiosDxe.inf | 2 + - .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c | 207 ------------------ - .../Include/Library/BoardInfoLib.h | 24 ++ - .../Include/Library/BoardRevisionHelperLib.h | 42 ++++ - .../Include/Library/FdtPlatformLib.h | 18 ++ - .../Include/Protocol/RpiFirmware.h | 35 --- - .../Library/BoardInfoLib/BoardInfoLib.c | 78 +++++++ - .../Library/BoardInfoLib/BoardInfoLib.inf | 27 +++ - .../BoardRevisionHelperLib.c | 153 +++++++++++++ - .../BoardRevisionHelperLib.inf | 22 ++ - .../Library/FdtPlatformLib/FdtPlatformLib.c | 32 +++ - .../Library/FdtPlatformLib/FdtPlatformLib.inf | 30 +++ - Platform/RaspberryPi/RPi3/RPi3.dsc | 4 + - Platform/RaspberryPi/RPi4/RPi4.dsc | 4 + - 17 files changed, 480 insertions(+), 306 deletions(-) - create mode 100644 Platform/RaspberryPi/Include/Library/BoardInfoLib.h - create mode 100644 Platform/RaspberryPi/Include/Library/BoardRevisionHelperLib.h - create mode 100644 Platform/RaspberryPi/Include/Library/FdtPlatformLib.h - create mode 100644 Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.c - create mode 100644 Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.inf - create mode 100644 Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c - create mode 100644 Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.inf - create mode 100644 Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.c - create mode 100644 Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.inf - -diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c -index 24847879..2a688fab 100644 ---- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c -+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c -@@ -28,6 +28,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include -@@ -935,26 +937,22 @@ ConfigInitialize ( - return Status; - } - -- Status = mFwProtocol->GetModelFamily (&mModelFamily); -- if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "Couldn't get the Raspberry Pi model family: %r\n", Status)); -+ Status = BoardInfoGetRevisionCode (&mModelRevision); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "Couldn't get the Raspberry Pi revision: %r\n", Status)); - } else { -- DEBUG ((DEBUG_INFO, "Current Raspberry Pi model family is %d\n", mModelFamily)); -+ DEBUG ((DEBUG_INFO, "Current Raspberry Pi revision %x\n", mModelRevision)); - } - -- Status = mFwProtocol->GetModelInstalledMB (&mModelInstalledMB); -- if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "Couldn't get the Raspberry Pi installed RAM size: %r\n", Status)); -+ mModelFamily = BoardRevisionGetModelFamily (mModelRevision); -+ if (mModelFamily == 0) { -+ DEBUG ((DEBUG_ERROR, "Couldn't get the Raspberry Pi model family\n")); - } else { -- DEBUG ((DEBUG_INFO, "Current Raspberry Pi installed RAM size is %d MB\n", mModelInstalledMB)); -+ DEBUG ((DEBUG_INFO, "Current Raspberry Pi model family is %d\n", mModelFamily)); - } - -- Status = mFwProtocol->GetModelRevision (&mModelRevision); -- if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "Couldn't get the Raspberry Pi revision: %r\n", Status)); -- } else { -- DEBUG ((DEBUG_INFO, "Current Raspberry Pi revision %x\n", mModelRevision)); -- } -+ mModelInstalledMB = BoardRevisionGetMemorySize (mModelRevision) / 1024 / 1024; -+ DEBUG ((DEBUG_INFO, "Current Raspberry Pi installed RAM size is %d MB\n", mModelInstalledMB)); - - Status = mFwProtocol->GetClockRate (RPI_MBOX_CLOCK_RATE_CORE, &mCoreClockRate); - if (Status != EFI_SUCCESS) { -diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf -index 475e6455..412b21e4 100644 ---- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf -+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf -@@ -56,6 +56,8 @@ - UefiDriverEntryPoint - UefiLib - UefiRuntimeServicesTableLib -+ BoardInfoLib -+ BoardRevisionHelperLib - - [Guids] - gConfigDxeFormSetGuid -diff --git a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c -index 0d013224..8f0eeeec 100644 ---- a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c -+++ b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c -@@ -51,11 +51,14 @@ - #include - #include - #include -+#include -+#include - #include - - #define SMB_IS_DIGIT(c) (((c) >= '0') && ((c) <= '9')) - - STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol; -+STATIC UINT32 mBoardRevisionCode; - - /*********************************************************************** - SMBIOS data definition TYPE0 BIOS Information -@@ -860,30 +863,19 @@ SysInfoUpdateSmbiosType1 ( - VOID - ) - { -- UINT32 BoardRevision = 0; - EFI_STATUS Status = EFI_SUCCESS; - UINT64 BoardSerial = 0; -- INTN Prod = -1; -- INTN Manu = -1; -- -- Status = mFwProtocol->GetModelRevision (&BoardRevision); -- if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "Failed to get board model: %r\n", Status)); -- } else { -- Prod = (BoardRevision >> 4) & 0xFF; -- Manu = (BoardRevision >> 16) & 0x0F; -- } - - AsciiStrCpyS (mSysInfoProductName, sizeof (mSysInfoProductName), -- mFwProtocol->GetModelName (Prod)); -+ BoardRevisionGetModelName (mBoardRevisionCode)); - AsciiStrCpyS (mSysInfoManufName, sizeof (mSysInfoManufName), -- mFwProtocol->GetManufacturerName (Manu)); -+ BoardRevisionGetManufacturerName (mBoardRevisionCode)); - AsciiSPrint (mSysInfoVersionName, sizeof (mSysInfoVersionName), -- "%X", BoardRevision); -+ "%X", mBoardRevisionCode); - -- I64ToHexString (mSysInfoSKU, sizeof (mSysInfoSKU), BoardRevision); -+ I64ToHexString (mSysInfoSKU, sizeof (mSysInfoSKU), mBoardRevisionCode); - -- Status = mFwProtocol->GetSerial (&BoardSerial); -+ Status = BoardInfoGetSerialNumber (&BoardSerial); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Failed to get board serial: %r\n", Status)); - } -@@ -892,7 +884,7 @@ SysInfoUpdateSmbiosType1 ( - - DEBUG ((DEBUG_ERROR, "Board Serial Number: %a\n", mSysInfoSerial)); - -- mSysInfoType1.Uuid.Data1 = BoardRevision; -+ mSysInfoType1.Uuid.Data1 = mBoardRevisionCode; - mSysInfoType1.Uuid.Data2 = 0x0; - mSysInfoType1.Uuid.Data3 = 0x0; - // Swap endianness, so that the serial is more user-friendly as a UUID -@@ -984,7 +976,7 @@ ProcessorInfoUpdateSmbiosType4 ( - DEBUG ((DEBUG_INFO, "Current CPU speed: %uHz\n", Rate)); - } - -- AsciiStrCpyS (mCpuName, sizeof (mCpuName), mFwProtocol->GetCpuName (-1)); -+ AsciiStrCpyS (mCpuName, sizeof (mCpuName), BoardRevisionGetProcessorName (mBoardRevisionCode)); - - ProcessorId = (UINT64 *)&(mProcessorInfoType4.ProcessorId); - *ProcessorId = ArmReadMidr(); -@@ -1044,25 +1036,15 @@ PhyMemArrayInfoUpdateSmbiosType16 ( - ) - { - EFI_SMBIOS_HANDLE MemArraySmbiosHandle; -- EFI_STATUS Status; -- UINT32 InstalledMB = 0; -- -- // -- // Update memory size fields: -- // - Type 16 MaximumCapacity in KB -- // - Type 17 size in MB (since bit 15 = 0) -- // - Type 17 VolatileSize in Bytes -- // - -- // The minimum RAM size used on any Raspberry Pi model is 256 MB -- mMemDevInfoType17.Size = 256; -+ // -+ // Update memory size fields: -+ // - Type 16 MaximumCapacity in KB -+ // - Type 17 size in MB (since bit 15 = 0) -+ // - Type 17 VolatileSize in Bytes -+ // - -- Status = mFwProtocol->GetModelInstalledMB (&InstalledMB); -- if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_WARN, "Couldn't get the board memory size - defaulting to 256 MB: %r\n", Status)); -- } else { -- mMemDevInfoType17.Size = InstalledMB; // Size in MB -- } -+ mMemDevInfoType17.Size = BoardRevisionGetMemorySize (mBoardRevisionCode) / 1024 / 1024; - - mPhyMemArrayInfoType16.MaximumCapacity = mMemDevInfoType17.Size * 1024; // Size in KB - mMemDevInfoType17.VolatileSize = MultU64x32 (mMemDevInfoType17.Size, 1024 * 1024); // Size in Bytes -@@ -1095,26 +1077,17 @@ MemArrMapInfoUpdateSmbiosType19 ( - VOID - ) - { -- EFI_STATUS Status; -- UINT32 InstalledMB = 0; -- - // Note: Type 19 addresses are expressed in KB, not bytes - // The memory layout used in all known Pi SoC's starts at 0 - mMemArrMapInfoType19.StartingAddress = 0; - -- // The minimum RAM size used on any Raspberry Pi model is 256 MB -- mMemArrMapInfoType19.EndingAddress = 256 * 1024; -- Status = mFwProtocol->GetModelInstalledMB (&InstalledMB); -- if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_WARN, "Couldn't get the board memory size - defaulting to 256 MB: %r\n", Status)); -- } else { -- if (PcdGet32 (PcdRamMoreThan3GB) && PcdGet32 (PcdRamLimitTo3GB)) { -- ASSERT (InstalledMB > 3 * 1024); -- mMemArrMapInfoType19.EndingAddress = 3 * 1024 * 1024; -- } else { -- mMemArrMapInfoType19.EndingAddress = InstalledMB * 1024; -- } -+ mMemArrMapInfoType19.EndingAddress = BoardRevisionGetMemorySize (mBoardRevisionCode) / 1024; -+ -+ if (PcdGet32 (PcdRamMoreThan3GB) && PcdGet32 (PcdRamLimitTo3GB)) { -+ ASSERT (mMemArrMapInfoType19.EndingAddress > 3 * 1024 * 1024); -+ mMemArrMapInfoType19.EndingAddress = 3 * 1024 * 1024; - } -+ - mMemArrMapInfoType19.EndingAddress -= 1; - - LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mMemArrMapInfoType19, mMemArrMapInfoType19Strings, NULL); -@@ -1151,6 +1124,13 @@ PlatformSmbiosDriverEntryPoint ( - return Status; - } - -+ Status = BoardInfoGetRevisionCode (&mBoardRevisionCode); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, -+ "%a: Failed to get board revision code - some fields will be inaccurate! Status=%r\n", -+ __func__, Status)); -+ } -+ - BIOSInfoUpdateSmbiosType0 (); - - SysInfoUpdateSmbiosType1 (); -diff --git a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf -index 2b24b22c..74865d79 100644 ---- a/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf -+++ b/Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf -@@ -41,6 +41,8 @@ - DebugLib - PrintLib - TimeBaseLib -+ BoardInfoLib -+ BoardRevisionHelperLib - - [Protocols] - gEfiSmbiosProtocolGuid # PROTOCOL SOMETIMES_CONSUMED -diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -index 6fe76e1d..91f581ef 100644 ---- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -+++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -@@ -560,208 +560,6 @@ RpiFirmwareGetFirmwareRevision ( - return EFI_SUCCESS; - } - --STATIC --CHAR8* --EFIAPI --RpiFirmwareGetModelName ( -- IN INTN ModelId -- ) --{ -- UINT32 Revision; -- -- // If a negative ModelId is passed, detect it. -- if ((ModelId < 0) && (RpiFirmwareGetModelRevision (&Revision) == EFI_SUCCESS)) { -- ModelId = (Revision >> 4) & 0xFF; -- } -- -- switch (ModelId) { -- // www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md -- case 0x00: -- return "Raspberry Pi Model A"; -- case 0x01: -- return "Raspberry Pi Model B"; -- case 0x02: -- return "Raspberry Pi Model A+"; -- case 0x03: -- return "Raspberry Pi Model B+"; -- case 0x04: -- return "Raspberry Pi 2 Model B"; -- case 0x06: -- return "Raspberry Pi Compute Module 1"; -- case 0x08: -- return "Raspberry Pi 3 Model B"; -- case 0x09: -- return "Raspberry Pi Zero"; -- case 0x0A: -- return "Raspberry Pi Compute Module 3"; -- case 0x0C: -- return "Raspberry Pi Zero W"; -- case 0x0D: -- return "Raspberry Pi 3 Model B+"; -- case 0x0E: -- return "Raspberry Pi 3 Model A+"; -- case 0x10: -- return "Raspberry Pi Compute Module 3+"; -- case 0x11: -- return "Raspberry Pi 4 Model B"; -- case 0x13: -- return "Raspberry Pi 400"; -- case 0x14: -- return "Raspberry Pi Compute Module 4"; -- default: -- return "Unknown Raspberry Pi Model"; -- } --} -- --STATIC --EFI_STATUS --EFIAPI --RPiFirmwareGetModelInstalledMB ( -- OUT UINT32 *InstalledMB -- ) --{ -- EFI_STATUS Status; -- UINT32 Revision; -- -- Status = RpiFirmwareGetModelRevision(&Revision); -- if (EFI_ERROR(Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Could not get the board revision: Status == %r\n", -- __FUNCTION__, Status)); -- return EFI_DEVICE_ERROR; -- } -- -- // -- // www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md -- // Bits [20-22] indicate the amount of memory starting with 256MB (000b) -- // and doubling in size for each value (001b = 512 MB, 010b = 1GB, etc.) -- // -- *InstalledMB = 256 << ((Revision >> 20) & 0x07); -- return EFI_SUCCESS; --} -- --STATIC --EFI_STATUS --EFIAPI --RPiFirmwareGetModelFamily ( -- OUT UINT32 *ModelFamily -- ) --{ -- EFI_STATUS Status; -- UINT32 Revision; -- UINT32 ModelId; -- -- Status = RpiFirmwareGetModelRevision(&Revision); -- if (EFI_ERROR(Status)) { -- DEBUG ((DEBUG_ERROR, -- "%a: Could not get the board revision: Status == %r\n", -- __FUNCTION__, Status)); -- return EFI_DEVICE_ERROR; -- } else { -- ModelId = (Revision >> 4) & 0xFF; -- } -- -- switch (ModelId) { -- // www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md -- case 0x00: // Raspberry Pi Model A -- case 0x01: // Raspberry Pi Model B -- case 0x02: // Raspberry Pi Model A+ -- case 0x03: // Raspberry Pi Model B+ -- case 0x06: // Raspberry Pi Compute Module 1 -- case 0x09: // Raspberry Pi Zero -- case 0x0C: // Raspberry Pi Zero W -- *ModelFamily = 1; -- break; -- case 0x04: // Raspberry Pi 2 Model B -- *ModelFamily = 2; -- break; -- case 0x08: // Raspberry Pi 3 Model B -- case 0x0A: // Raspberry Pi Compute Module 3 -- case 0x0D: // Raspberry Pi 3 Model B+ -- case 0x0E: // Raspberry Pi 3 Model A+ -- case 0x10: // Raspberry Pi Compute Module 3+ -- *ModelFamily = 3; -- break; -- case 0x11: // Raspberry Pi 4 Model B -- case 0x13: // Raspberry Pi 400 -- case 0x14: // Raspberry Pi Computer Module 4 -- *ModelFamily = 4; -- break; -- default: -- *ModelFamily = 0; -- break; -- } -- -- if (*ModelFamily == 0) { -- DEBUG ((DEBUG_ERROR, -- "%a: Unknown Raspberry Pi model family : ModelId == 0x%x\n", -- __FUNCTION__, ModelId)); -- return EFI_UNSUPPORTED; -- } -- -- return EFI_SUCCESS; --} -- --STATIC --CHAR8* --EFIAPI --RpiFirmwareGetManufacturerName ( -- IN INTN ManufacturerId -- ) --{ -- UINT32 Revision; -- -- // If a negative ModelId is passed, detect it. -- if ((ManufacturerId < 0) && (RpiFirmwareGetModelRevision (&Revision) == EFI_SUCCESS)) { -- ManufacturerId = (Revision >> 16) & 0x0F; -- } -- -- switch (ManufacturerId) { -- // www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md -- case 0x00: -- return "Sony UK"; -- case 0x01: -- return "Egoman"; -- case 0x02: -- case 0x04: -- return "Embest"; -- case 0x03: -- return "Sony Japan"; -- case 0x05: -- return "Stadium"; -- default: -- return "Unknown Manufacturer"; -- } --} -- --STATIC --CHAR8* --EFIAPI --RpiFirmwareGetCpuName ( -- IN INTN CpuId -- ) --{ -- UINT32 Revision; -- -- // If a negative CpuId is passed, detect it. -- if ((CpuId < 0) && (RpiFirmwareGetModelRevision (&Revision) == EFI_SUCCESS)) { -- CpuId = (Revision >> 12) & 0x0F; -- } -- -- switch (CpuId) { -- // www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md -- case 0x00: -- return "BCM2835 (ARM11)"; -- case 0x01: -- return "BCM2836 (ARM Cortex-A7)"; -- case 0x02: -- return "BCM2837 (ARM Cortex-A53)"; -- case 0x03: -- return "BCM2711 (ARM Cortex-A72)"; -- default: -- return "Unknown CPU Model"; -- } --} -- - #pragma pack() - typedef struct { - UINT32 Width; -@@ -1549,13 +1347,8 @@ STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwareProtocol = { - RpiFirmwareGetSerial, - RpiFirmwareGetModel, - RpiFirmwareGetModelRevision, -- RpiFirmwareGetModelName, -- RPiFirmwareGetModelFamily, - RpiFirmwareGetFirmwareRevision, -- RpiFirmwareGetManufacturerName, -- RpiFirmwareGetCpuName, - RpiFirmwareGetArmMemory, -- RPiFirmwareGetModelInstalledMB, - RpiFirmwareNotifyXhciReset, - RpiFirmwareGetCurrentClockState, - RpiFirmwareSetClockState, -diff --git a/Platform/RaspberryPi/Include/Library/BoardInfoLib.h b/Platform/RaspberryPi/Include/Library/BoardInfoLib.h -new file mode 100644 -index 00000000..acdfd17a ---- /dev/null -+++ b/Platform/RaspberryPi/Include/Library/BoardInfoLib.h -@@ -0,0 +1,24 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BOARD_INFO_LIB_H__ -+#define __BOARD_INFO_LIB_H__ -+ -+EFI_STATUS -+EFIAPI -+BoardInfoGetRevisionCode ( -+ OUT UINT32 *RevisionCode -+ ); -+ -+EFI_STATUS -+EFIAPI -+BoardInfoGetSerialNumber ( -+ OUT UINT64 *SerialNumber -+ ); -+ -+#endif /* __BOARD_INFO_LIB_H__ */ -diff --git a/Platform/RaspberryPi/Include/Library/BoardRevisionHelperLib.h b/Platform/RaspberryPi/Include/Library/BoardRevisionHelperLib.h -new file mode 100644 -index 00000000..3e3183fe ---- /dev/null -+++ b/Platform/RaspberryPi/Include/Library/BoardRevisionHelperLib.h -@@ -0,0 +1,42 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BOARD_REVISION_HELPER_LIB_H__ -+#define __BOARD_REVISION_HELPER_LIB_H__ -+ -+UINT64 -+EFIAPI -+BoardRevisionGetMemorySize ( -+ IN UINT32 RevisionCode -+ ); -+ -+UINT32 -+EFIAPI -+BoardRevisionGetModelFamily ( -+ IN UINT32 RevisionCode -+ ); -+ -+CHAR8 * -+EFIAPI -+BoardRevisionGetModelName ( -+ IN UINT32 RevisionCode -+ ); -+ -+CHAR8 * -+EFIAPI -+BoardRevisionGetManufacturerName ( -+ IN UINT32 RevisionCode -+ ); -+ -+CHAR8 * -+EFIAPI -+BoardRevisionGetProcessorName ( -+ IN UINT32 RevisionCode -+ ); -+ -+#endif /* __BOARD_REVISION_HELPER_LIB_H__ */ -diff --git a/Platform/RaspberryPi/Include/Library/FdtPlatformLib.h b/Platform/RaspberryPi/Include/Library/FdtPlatformLib.h -new file mode 100644 -index 00000000..f8354c8d ---- /dev/null -+++ b/Platform/RaspberryPi/Include/Library/FdtPlatformLib.h -@@ -0,0 +1,18 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __FDT_PLATFORM_LIB_H__ -+#define __FDT_PLATFORM_LIB_H__ -+ -+VOID * -+EFIAPI -+FdtPlatformGetBase ( -+ VOID -+ ); -+ -+#endif /* __FDT_PLATFORM_LIB_H__ */ -diff --git a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h b/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h -index c48bb6e4..86bf1687 100644 ---- a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h -+++ b/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h -@@ -112,42 +112,12 @@ EFI_STATUS - UINT32 *Revision - ); - --typedef --CHAR8* --(EFIAPI *GET_MODEL_NAME) ( -- INTN ModelId -- ); -- --typedef --EFI_STATUS --(EFIAPI *GET_MODEL_FAMILY) ( -- UINT32 *ModelFamily -- ); -- - typedef - EFI_STATUS - (EFIAPI *GET_FIRMWARE_REVISION) ( - UINT32 *Revision - ); - --typedef --EFI_STATUS --(EFIAPI *GET_MODEL_INSTALLED_MB) ( -- UINT32 *InstalledMB -- ); -- --typedef --CHAR8* --(EFIAPI *GET_MANUFACTURER_NAME) ( -- INTN ManufacturerId -- ); -- --typedef --CHAR8* --(EFIAPI *GET_CPU_NAME) ( -- INTN CpuId -- ); -- - typedef - EFI_STATUS - (EFIAPI *GET_ARM_MEM) ( -@@ -186,13 +156,8 @@ typedef struct { - GET_SERIAL GetSerial; - GET_MODEL GetModel; - GET_MODEL_REVISION GetModelRevision; -- GET_MODEL_NAME GetModelName; -- GET_MODEL_FAMILY GetModelFamily; - GET_FIRMWARE_REVISION GetFirmwareRevision; -- GET_MANUFACTURER_NAME GetManufacturerName; -- GET_CPU_NAME GetCpuName; - GET_ARM_MEM GetArmMem; -- GET_MODEL_INSTALLED_MB GetModelInstalledMB; - NOTIFY_XHCI_RESET NotifyXhciReset; - GET_CLOCK_STATE GetClockState; - SET_CLOCK_STATE SetClockState; -diff --git a/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.c b/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.c -new file mode 100644 -index 00000000..514ad7fe ---- /dev/null -+++ b/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.c -@@ -0,0 +1,78 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+ -+EFI_STATUS -+EFIAPI -+BoardInfoGetRevisionCode ( -+ OUT UINT32 *RevisionCode -+ ) -+{ -+ VOID *Fdt; -+ INT32 Node; -+ CONST VOID *Property; -+ INT32 Length; -+ -+ Fdt = FdtPlatformGetBase (); -+ if (Fdt == NULL) { -+ return EFI_NOT_FOUND; -+ } -+ -+ Node = fdt_path_offset (Fdt, "/system"); -+ if (Node < 0) { -+ return EFI_NOT_FOUND; -+ } -+ -+ Property = fdt_getprop (Fdt, Node, "linux,revision", &Length); -+ if (Property == NULL) { -+ return EFI_NOT_FOUND; -+ } else if (Length != sizeof (UINT32)) { -+ return EFI_BAD_BUFFER_SIZE; -+ } -+ -+ *RevisionCode = fdt32_to_cpu (*(UINT32 *) Property); -+ -+ return EFI_SUCCESS; -+} -+ -+EFI_STATUS -+EFIAPI -+BoardInfoGetSerialNumber ( -+ OUT UINT64 *SerialNumber -+ ) -+{ -+ VOID *Fdt; -+ INT32 Node; -+ CONST VOID *Property; -+ INT32 Length; -+ -+ Fdt = FdtPlatformGetBase (); -+ if (Fdt == NULL) { -+ return EFI_NOT_FOUND; -+ } -+ -+ Node = fdt_path_offset (Fdt, "/system"); -+ if (Node < 0) { -+ return EFI_NOT_FOUND; -+ } -+ -+ Property = fdt_getprop (Fdt, Node, "linux,serial", &Length); -+ if (Property == NULL) { -+ return EFI_NOT_FOUND; -+ } else if (Length != sizeof (UINT64)) { -+ return EFI_BAD_BUFFER_SIZE; -+ } -+ -+ *SerialNumber = fdt64_to_cpu (*(UINT64 *) Property); -+ -+ return EFI_SUCCESS; -+} -diff --git a/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.inf b/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.inf -new file mode 100644 -index 00000000..13623fb7 ---- /dev/null -+++ b/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.inf -@@ -0,0 +1,27 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = BoardInfoLib -+ FILE_GUID = 88b5ad3d-d7a0-4525-932b-af97f0fe1310 -+ MODULE_TYPE = BASE -+ VERSION_STRING = 1.0 -+ LIBRARY_CLASS = BoardInfoLib -+ -+[Sources] -+ BoardInfoLib.c -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ EmbeddedPkg/EmbeddedPkg.dec -+ Platform/RaspberryPi/RaspberryPi.dec -+ -+[LibraryClasses] -+ FdtPlatformLib -+ FdtLib -diff --git a/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -new file mode 100644 -index 00000000..d120bb6d ---- /dev/null -+++ b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -@@ -0,0 +1,153 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+ -+// -+// https://www.raspberrypi.com/documentation/computers/raspberry-pi.html#new-style-revision-codes -+// -+#define RPI_MEMORY_SIZE(Rev) ((Rev >> 20) & 0x07) -+#define RPI_MANUFACTURER(Rev) ((Rev >> 16) & 0x0F) -+#define RPI_PROCESSOR(Rev) ((Rev >> 12) & 0x0F) -+#define RPI_TYPE(Rev) ((Rev >> 4) & 0xFF) -+ -+UINT64 -+EFIAPI -+BoardRevisionGetMemorySize ( -+ IN UINT32 RevisionCode -+ ) -+{ -+ if (RevisionCode != 0) { -+ return SIZE_256MB * 1ULL << RPI_MEMORY_SIZE (RevisionCode); -+ } -+ return SIZE_256MB; // Smallest possible size -+} -+ -+UINT32 -+EFIAPI -+BoardRevisionGetModelFamily ( -+ IN UINT32 RevisionCode -+ ) -+{ -+ if (RevisionCode != 0) { -+ switch (RPI_TYPE (RevisionCode)) { -+ case 0x00: // Raspberry Pi Model A -+ case 0x01: // Raspberry Pi Model B -+ case 0x02: // Raspberry Pi Model A+ -+ case 0x03: // Raspberry Pi Model B+ -+ case 0x06: // Raspberry Pi Compute Module 1 -+ case 0x09: // Raspberry Pi Zero -+ case 0x0C: // Raspberry Pi Zero W -+ return 1; -+ case 0x04: // Raspberry Pi 2 Model B -+ return 2; -+ case 0x08: // Raspberry Pi 3 Model B -+ case 0x0A: // Raspberry Pi Compute Module 3 -+ case 0x0D: // Raspberry Pi 3 Model B+ -+ case 0x0E: // Raspberry Pi 3 Model A+ -+ case 0x10: // Raspberry Pi Compute Module 3+ -+ return 3; -+ case 0x11: // Raspberry Pi 4 Model B -+ case 0x13: // Raspberry Pi 400 -+ case 0x14: // Raspberry Pi Computer Module 4 -+ return 4; -+ } -+ } -+ return 0; -+} -+ -+CHAR8 * -+EFIAPI -+BoardRevisionGetModelName ( -+ IN UINT32 RevisionCode -+ ) -+{ -+ if (RevisionCode != 0) { -+ switch (RPI_TYPE (RevisionCode)) { -+ case 0x00: -+ return "Raspberry Pi Model A"; -+ case 0x01: -+ return "Raspberry Pi Model B"; -+ case 0x02: -+ return "Raspberry Pi Model A+"; -+ case 0x03: -+ return "Raspberry Pi Model B+"; -+ case 0x04: -+ return "Raspberry Pi 2 Model B"; -+ case 0x06: -+ return "Raspberry Pi Compute Module 1"; -+ case 0x08: -+ return "Raspberry Pi 3 Model B"; -+ case 0x09: -+ return "Raspberry Pi Zero"; -+ case 0x0A: -+ return "Raspberry Pi Compute Module 3"; -+ case 0x0C: -+ return "Raspberry Pi Zero W"; -+ case 0x0D: -+ return "Raspberry Pi 3 Model B+"; -+ case 0x0E: -+ return "Raspberry Pi 3 Model A+"; -+ case 0x10: -+ return "Raspberry Pi Compute Module 3+"; -+ case 0x11: -+ return "Raspberry Pi 4 Model B"; -+ case 0x13: -+ return "Raspberry Pi 400"; -+ case 0x14: -+ return "Raspberry Pi Compute Module 4"; -+ } -+ } -+ return "Unknown Raspberry Pi Model"; -+} -+ -+CHAR8 * -+EFIAPI -+BoardRevisionGetManufacturerName ( -+ IN UINT32 RevisionCode -+ ) -+{ -+ if (RevisionCode != 0) { -+ switch (RPI_MANUFACTURER (RevisionCode)) { -+ case 0x00: -+ return "Sony UK"; -+ case 0x01: -+ return "Egoman"; -+ case 0x02: -+ case 0x04: -+ return "Embest"; -+ case 0x03: -+ return "Sony Japan"; -+ case 0x05: -+ return "Stadium"; -+ } -+ } -+ return "Unknown Manufacturer"; -+} -+ -+CHAR8 * -+EFIAPI -+BoardRevisionGetProcessorName ( -+ IN UINT32 RevisionCode -+ ) -+{ -+ if (RevisionCode != 0) { -+ switch (RPI_PROCESSOR (RevisionCode)) { -+ case 0x00: -+ return "BCM2835 (ARM11)"; -+ case 0x01: -+ return "BCM2836 (Arm Cortex-A7)"; -+ case 0x02: -+ return "BCM2837 (Arm Cortex-A53)"; -+ case 0x03: -+ return "BCM2711 (Arm Cortex-A72)"; -+ } -+ } -+ return "Unknown CPU Model"; -+} -diff --git a/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.inf b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.inf -new file mode 100644 -index 00000000..d00f9236 ---- /dev/null -+++ b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.inf -@@ -0,0 +1,22 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = BoardRevisionHelperLib -+ FILE_GUID = 6c0bda11-145b-4dc1-a923-5595135e597c -+ MODULE_TYPE = BASE -+ VERSION_STRING = 1.0 -+ LIBRARY_CLASS = BoardRevisionHelperLib -+ -+[Sources] -+ BoardRevisionHelperLib.c -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ Platform/RaspberryPi/RaspberryPi.dec -diff --git a/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.c b/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.c -new file mode 100644 -index 00000000..7d148c01 ---- /dev/null -+++ b/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.c -@@ -0,0 +1,32 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+ -+VOID * -+EFIAPI -+FdtPlatformGetBase ( -+ VOID -+ ) -+{ -+ VOID *Fdt; -+ INT32 FdtError; -+ -+ Fdt = (VOID *)(UINTN) PcdGet32 (PcdFdtBaseAddress); -+ -+ FdtError = fdt_check_header (Fdt); -+ if (FdtError != 0) { -+ DEBUG ((DEBUG_ERROR, "%a: Bad/missing FDT at 0x%p! Ret=%a\n", -+ __func__, Fdt, fdt_strerror (FdtError))); -+ ASSERT (FALSE); -+ return NULL; -+ } -+ return Fdt; -+} -diff --git a/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.inf b/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.inf -new file mode 100644 -index 00000000..b35106c6 ---- /dev/null -+++ b/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.inf -@@ -0,0 +1,30 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = FdtPlatformLib -+ FILE_GUID = 473305de-3504-4efb-b223-65b845e08ac0 -+ MODULE_TYPE = BASE -+ VERSION_STRING = 1.0 -+ LIBRARY_CLASS = FdtPlatformLib -+ -+[Sources] -+ FdtPlatformLib.c -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ EmbeddedPkg/EmbeddedPkg.dec -+ Platform/RaspberryPi/RaspberryPi.dec -+ -+[LibraryClasses] -+ DebugLib -+ FdtLib -+ -+[Pcd] -+ gRaspberryPiTokenSpaceGuid.PcdFdtBaseAddress -diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3/RPi3.dsc -index 5e90f421..9c549ac7 100644 ---- a/Platform/RaspberryPi/RPi3/RPi3.dsc -+++ b/Platform/RaspberryPi/RPi3/RPi3.dsc -@@ -181,6 +181,10 @@ - VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf - GpioLib|Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.inf - -+ FdtPlatformLib|Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.inf -+ BoardInfoLib|Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.inf -+ BoardRevisionHelperLib|Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.inf -+ - [LibraryClasses.common.SEC] - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf -diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc -index 4ab6a819..ba839fd1 100644 ---- a/Platform/RaspberryPi/RPi4/RPi4.dsc -+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc -@@ -189,6 +189,10 @@ - # The "segment lib" provides the CAM accessors/etc when they aren't ECAM standard - PciSegmentLib|Silicon/Broadcom/Bcm27xx/Library/Bcm2711PciSegmentLib/PciSegmentLib.inf - -+ FdtPlatformLib|Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.inf -+ BoardInfoLib|Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.inf -+ BoardRevisionHelperLib|Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.inf -+ - [LibraryClasses.common.SEC] - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0003-Platform-RPi5-Add-early-support.patch b/packages/edk2/patches/platforms/0003-Platform-RPi5-Add-early-support.patch deleted file mode 100644 index e4f074d..0000000 --- a/packages/edk2/patches/platforms/0003-Platform-RPi5-Add-early-support.patch +++ /dev/null @@ -1,1672 +0,0 @@ -From cc615a10f1b597a6e8923df3bda450217cb320f3 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Tue, 12 Dec 2023 02:15:17 +0200 -Subject: [PATCH 03/16] Platform/RPi5: Add early support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Not too useful right now - just boots to the UEFI setup screen with -PL011 serial console at 115200, available on the special connector. - -Signed-off-by: Mario Bălănică ---- - .../BoardRevisionHelperLib.c | 6 + - .../PlatformLib/AArch64/RaspberryPiHelper.S | 116 +++ - .../RPi5/Library/PlatformLib/PlatformLib.inf | 65 ++ - .../RPi5/Library/PlatformLib/RaspberryPi.c | 94 +++ - .../RPi5/Library/PlatformLib/RaspberryPiMem.c | 178 +++++ - Platform/RaspberryPi/RPi5/RPi5.dsc | 685 ++++++++++++++++++ - Platform/RaspberryPi/RPi5/RPi5.fdf | 435 +++++++++++ - 7 files changed, 1579 insertions(+) - create mode 100644 Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S - create mode 100644 Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf - create mode 100644 Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPi.c - create mode 100644 Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c - create mode 100644 Platform/RaspberryPi/RPi5/RPi5.dsc - create mode 100644 Platform/RaspberryPi/RPi5/RPi5.fdf - -diff --git a/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -index d120bb6d..032853aa 100644 ---- a/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -+++ b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -@@ -57,6 +57,8 @@ BoardRevisionGetModelFamily ( - case 0x13: // Raspberry Pi 400 - case 0x14: // Raspberry Pi Computer Module 4 - return 4; -+ case 0x17: // Raspberry Pi 5 Model B -+ return 5; - } - } - return 0; -@@ -102,6 +104,8 @@ BoardRevisionGetModelName ( - return "Raspberry Pi 400"; - case 0x14: - return "Raspberry Pi Compute Module 4"; -+ case 0x17: -+ return "Raspberry Pi 5 Model B"; - } - } - return "Unknown Raspberry Pi Model"; -@@ -147,6 +151,8 @@ BoardRevisionGetProcessorName ( - return "BCM2837 (Arm Cortex-A53)"; - case 0x03: - return "BCM2711 (Arm Cortex-A72)"; -+ case 0x04: -+ return "BCM2712 (Arm Cortex-A76)"; - } - } - return "Unknown CPU Model"; -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S b/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S -new file mode 100644 -index 00000000..5972fcdf ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S -@@ -0,0 +1,116 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2020, Andrei Warkentin -+ * Copyright (c) 2019-2020, Pete Batard -+ * Copyright (c) 2016, Linaro Limited. All rights reserved. -+ * Copyright (c) 2011-2020, ARM Limited. All rights reserved. -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+ -+ .macro drain -+ mov x5, #RPI_MBOX_MAX_TRIES -+0: ldr w6, [x4, #BCM2836_MBOX_STATUS_OFFSET] -+ tbnz w6, #BCM2836_MBOX_STATUS_EMPTY, 1f -+ dmb ld -+ ldr wzr, [x4, #BCM2836_MBOX_READ_OFFSET] -+ subs x5, x5, #1 -+ b.ne 0b -+1: -+ .endm -+ -+ .macro poll, status -+ mov x5, #RPI_MBOX_MAX_TRIES -+0: ldr w6, [x4, #BCM2836_MBOX_STATUS_OFFSET] -+ tbz w6, #\status, 1f -+ dmb ld -+ subs x5, x5, #1 -+ b.ne 0b -+1: -+ .endm -+ -+ .macro run, command_buffer -+ adr x0, \command_buffer -+ orr x0, x0, #RPI_MBOX_VC_CHANNEL -+ add x0, x0, x1 -+ -+ poll BCM2836_MBOX_STATUS_FULL -+ str w0, [x4, #BCM2836_MBOX_WRITE_OFFSET] -+ dmb sy -+ poll BCM2836_MBOX_STATUS_EMPTY -+ dmb sy -+ ldr wzr, [x4, #BCM2836_MBOX_READ_OFFSET] -+ dmb ld -+ .endm -+ -+ASM_FUNC (ArmPlatformPeiBootAction) -+ mov x1, #FixedPcdGet64 (PcdDmaDeviceOffset) -+ orr x0, x0, #RPI_MBOX_VC_CHANNEL -+ // x1 holds the value of PcdDmaDeviceOffset throughout this function -+ -+ MOV64 (x4, FixedPcdGet64 (PcdFwMailboxBaseAddress)) -+ -+ drain -+ -+ run .Lmeminfo_buffer -+ -+ ldr w0, .Lmembase -+ adr x2, mSystemMemoryBase -+ str x0, [x2] -+ -+ ldr w0, .Lmemsize -+ sub x0, x0, #1 -+ adr x2, mSystemMemoryEnd -+ str x0, [x2] -+ -+ ret -+ -+ .align 4 -+.Lmeminfo_buffer: -+ .long .Lmeminfo_size -+ .long 0x0 -+ .long RPI_MBOX_GET_ARM_MEMSIZE -+ .long 8 // buf size -+ .long 0 // input len -+.Lmembase: -+ .long 0 // mem base -+.Lmemsize: -+ .long 0 // mem size -+ .long 0 // end tag -+ .set .Lmeminfo_size, . - .Lmeminfo_buffer -+ -+//UINTN -+//ArmPlatformGetPrimaryCoreMpId ( -+// VOID -+// ); -+ASM_FUNC (ArmPlatformGetPrimaryCoreMpId) -+ MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) -+ ret -+ -+//UINTN -+//ArmPlatformIsPrimaryCore ( -+// IN UINTN MpId -+// ); -+ASM_FUNC (ArmPlatformIsPrimaryCore) -+ mov x0, #1 -+ ret -+ -+//UINTN -+//ArmPlatformGetCorePosition ( -+// IN UINTN MpId -+// ); -+// With this function: CorePos = (ClusterId * 4) + CoreId -+ASM_FUNC (ArmPlatformGetCorePosition) -+ and x1, x0, #ARM_CORE_MASK -+ and x0, x0, #ARM_CLUSTER_MASK -+ add x0, x1, x0, LSR #6 -+ ret -+ -+ASM_FUNCTION_REMOVE_IF_UNREFERENCED -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf b/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf -new file mode 100644 -index 00000000..765a5807 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf -@@ -0,0 +1,65 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# Copyright (c) 2017-2018, Andrei Warkentin -+# Copyright (c) 2014-2016, Linaro Limited. All rights reserved. -+# Copyright (c) 2011-2019, ARM Limited. All rights reserved. -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = PlatformLib -+ FILE_GUID = db33b3d9-1c8c-4bd6-96bf-762e382e2b05 -+ MODULE_TYPE = BASE -+ VERSION_STRING = 1.0 -+ LIBRARY_CLASS = ArmPlatformLib|SEC PEIM -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ MdeModulePkg/MdeModulePkg.dec -+ EmbeddedPkg/EmbeddedPkg.dec -+ ArmPkg/ArmPkg.dec -+ ArmPlatformPkg/ArmPlatformPkg.dec -+ Silicon/Broadcom/Bcm283x/Bcm283x.dec -+ Platform/RaspberryPi/RaspberryPi.dec -+ -+[LibraryClasses] -+ ArmLib -+ FdtLib -+ IoLib -+ MemoryAllocationLib -+ PcdLib -+ PrintLib -+ BoardInfoLib -+ BoardRevisionHelperLib -+ -+[Sources.common] -+ RaspberryPi.c -+ RaspberryPiMem.c -+ -+[Sources.AARCH64] -+ AArch64/RaspberryPiHelper.S -+ -+[FixedPcd] -+ gArmTokenSpaceGuid.PcdFdBaseAddress -+ gArmTokenSpaceGuid.PcdFvBaseAddress -+ gRaspberryPiTokenSpaceGuid.PcdFdtBaseAddress -+ gRaspberryPiTokenSpaceGuid.PcdFdtSize -+ gArmPlatformTokenSpaceGuid.PcdCoreCount -+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask -+ gArmTokenSpaceGuid.PcdArmPrimaryCore -+ gArmTokenSpaceGuid.PcdFdSize -+ gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset -+ gArmTokenSpaceGuid.PcdSystemMemoryBase -+ gArmTokenSpaceGuid.PcdSystemMemorySize -+ gRaspberryPiTokenSpaceGuid.PcdNvStorageEventLogSize -+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize -+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize -+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize -+ gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress -+ -+[Ppis] -+ gArmMpCoreInfoPpiGuid -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPi.c b/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPi.c -new file mode 100644 -index 00000000..1c0b88e8 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPi.c -@@ -0,0 +1,94 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2014-2016, Linaro Limited. All rights reserved. -+ * Copyright (c) 2014, Red Hat, Inc. -+ * Copyright (c) 2011-2013, ARM Limited. All rights reserved. -+ * -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+/** -+ Return the current Boot Mode -+ -+ This function returns the boot reason on the platform -+ -+ @return Return the current Boot Mode of the platform -+ -+**/ -+EFI_BOOT_MODE -+ArmPlatformGetBootMode ( -+ VOID -+ ) -+{ -+ return BOOT_WITH_FULL_CONFIGURATION; -+} -+ -+/** -+ This function is called by PrePeiCore, in the SEC phase. -+**/ -+RETURN_STATUS -+ArmPlatformInitialize ( -+ IN UINTN MpId -+ ) -+{ -+ return RETURN_SUCCESS; -+} -+ -+VOID -+ArmPlatformInitializeSystemMemory ( -+ VOID -+ ) -+{ -+} -+ -+STATIC ARM_CORE_INFO mRpiInfoTable[] = { -+ { 0x000, }, // Cluster 0, Core 0 -+ { 0x100, }, // Cluster 0, Core 1 -+ { 0x200, }, // Cluster 0, Core 2 -+ { 0x300, }, // Cluster 0, Core 3 -+}; -+ -+STATIC -+EFI_STATUS -+PrePeiCoreGetMpCoreInfo ( -+ OUT UINTN *CoreCount, -+ OUT ARM_CORE_INFO **ArmCoreTable -+ ) -+{ -+ // Only support one cluster -+ *CoreCount = sizeof (mRpiInfoTable) / sizeof (ARM_CORE_INFO); -+ *ArmCoreTable = mRpiInfoTable; -+ -+ return EFI_SUCCESS; -+} -+ -+STATIC ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { -+ PrePeiCoreGetMpCoreInfo -+}; -+STATIC EFI_PEI_PPI_DESCRIPTOR mPlatformPpiTable[] = { -+ { -+ EFI_PEI_PPI_DESCRIPTOR_PPI, -+ &gArmMpCoreInfoPpiGuid, -+ &mMpCoreInfoPpi -+ } -+}; -+ -+VOID -+ArmPlatformGetPlatformPpiList ( -+ OUT UINTN *PpiListSize, -+ OUT EFI_PEI_PPI_DESCRIPTOR **PpiList -+ ) -+{ -+ *PpiListSize = sizeof (mPlatformPpiTable); -+ *PpiList = mPlatformPpiTable; -+} -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c b/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c -new file mode 100644 -index 00000000..a31085d9 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c -@@ -0,0 +1,178 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2019, Pete Batard -+ * Copyright (c) 2017-2018, Andrey Warkentin -+ * Copyright (c) 2014, Linaro Limited. All rights reserved. -+ * Copyright (c) 2013-2018, ARM Limited. All rights reserved. -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+UINT64 mSystemMemoryBase; -+extern UINT64 mSystemMemoryEnd; -+ -+// The total number of descriptors, including the final "end-of-table" descriptor. -+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 11 -+ -+STATIC BOOLEAN VirtualMemoryInfoInitialized = FALSE; -+STATIC RPI_MEMORY_REGION_INFO VirtualMemoryInfo[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; -+ -+#define VariablesSize (FixedPcdGet32(PcdFlashNvStorageVariableSize) + \ -+ FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + \ -+ FixedPcdGet32(PcdFlashNvStorageFtwSpareSize) + \ -+ FixedPcdGet32(PcdNvStorageEventLogSize)) -+ -+#define VariablesBase (FixedPcdGet64(PcdFdBaseAddress) + \ -+ FixedPcdGet32(PcdFdSize) - \ -+ VariablesSize) -+ -+/** -+ Return the Virtual Memory Map of your platform -+ -+ This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU -+ on your platform. -+ -+ @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR -+ describing a Physical-to-Virtual Memory -+ mapping. This array must be ended by a -+ zero-filled entry -+ -+**/ -+VOID -+ArmPlatformGetVirtualMemoryMap ( -+ IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap -+ ) -+{ -+ EFI_STATUS Status; -+ UINT32 RevisionCode = 0; -+ UINT64 TotalMemorySize; -+ UINTN Index = 0; -+ ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; -+ -+ Status = BoardInfoGetRevisionCode (&RevisionCode); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get board revision. Status=%r\n", -+ __func__, Status)); -+ ASSERT (FALSE); -+ CpuDeadLoop (); -+ } -+ -+ // Early output of the info we got from VideoCore can prove valuable. -+ DEBUG ((DEBUG_INFO, "Board Rev: 0x%lX\n", RevisionCode)); -+ DEBUG ((DEBUG_INFO, "RAM < 1GB: 0x%ll08X (Size 0x%ll08X)\n", mSystemMemoryBase, mSystemMemoryEnd + 1)); -+ -+ ASSERT (mSystemMemoryBase == 0); -+ ASSERT (VirtualMemoryMap != NULL); -+ -+ // Compute the total RAM size available on this platform -+ TotalMemorySize = BoardRevisionGetMemorySize (RevisionCode); -+ DEBUG ((DEBUG_INFO, "Total RAM: 0x%ll08X\n", TotalMemorySize)); -+ -+ VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages -+ (EFI_SIZE_TO_PAGES (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) * -+ MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS)); -+ if (VirtualMemoryTable == NULL) { -+ return; -+ } -+ -+ // Firmware Volume -+ VirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdFdBaseAddress); -+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Length = FixedPcdGet32 (PcdFdSize) - VariablesSize; -+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; -+ VirtualMemoryInfo[Index].Type = RPI_MEM_RESERVED_REGION; -+ VirtualMemoryInfo[Index++].Name = L"FD"; -+ -+ // Variable Volume -+ VirtualMemoryTable[Index].PhysicalBase = VariablesBase; -+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Length = VariablesSize; -+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; -+ VirtualMemoryInfo[Index].Type = RPI_MEM_RUNTIME_REGION; -+ VirtualMemoryInfo[Index++].Name = L"FD Variables"; -+ -+ // DTB is expected to directly follow the FD. -+ VirtualMemoryTable[Index].PhysicalBase = FixedPcdGet32 (PcdFdtBaseAddress); -+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Length = FixedPcdGet32 (PcdFdtSize); -+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; -+ VirtualMemoryInfo[Index].Type = RPI_MEM_RESERVED_REGION; -+ VirtualMemoryInfo[Index++].Name = L"Flattened Device Tree"; -+ -+ // Base System RAM -+ VirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdSystemMemoryBase); -+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Length = mSystemMemoryEnd + 1 - FixedPcdGet64 (PcdSystemMemoryBase); -+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; -+ VirtualMemoryInfo[Index].Type = RPI_MEM_BASIC_REGION; -+ VirtualMemoryInfo[Index++].Name = L"System RAM < 1GB"; -+ -+ // GPU Reserved -+ VirtualMemoryTable[Index].PhysicalBase = mSystemMemoryEnd + 1; -+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Length = SIZE_1GB - VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; -+ VirtualMemoryInfo[Index].Type = RPI_MEM_UNMAPPED_REGION; -+ VirtualMemoryInfo[Index++].Name = L"GPU Reserved"; -+ -+ // System RAM >= 1 GB -+ if (TotalMemorySize > SIZE_1GB) { -+ VirtualMemoryTable[Index].PhysicalBase = SIZE_1GB; -+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Length = TotalMemorySize - VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; -+ VirtualMemoryInfo[Index].Type = RPI_MEM_BASIC_REGION; -+ VirtualMemoryInfo[Index++].Name = L"System RAM >= 1GB"; -+ } -+ -+ // SoC device registers -+ VirtualMemoryTable[Index].PhysicalBase = SIZE_64GB; -+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Length = SIZE_64GB; -+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; -+ VirtualMemoryInfo[Index].Type = RPI_MEM_UNMAPPED_REGION; -+ VirtualMemoryInfo[Index++].Name = L"MMIO"; -+ -+ // End of Table -+ VirtualMemoryTable[Index].PhysicalBase = 0; -+ VirtualMemoryTable[Index].VirtualBase = 0; -+ VirtualMemoryTable[Index].Length = 0; -+ VirtualMemoryTable[Index++].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0; -+ -+ ASSERT(Index <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); -+ -+ *VirtualMemoryMap = VirtualMemoryTable; -+ VirtualMemoryInfoInitialized = TRUE; -+} -+ -+/** -+ Return additional memory info not populated by the above call. -+ -+ This call should follow the one to ArmPlatformGetVirtualMemoryMap (). -+ -+**/ -+VOID -+RpiPlatformGetVirtualMemoryInfo ( -+ IN RPI_MEMORY_REGION_INFO** MemoryInfo -+ ) -+{ -+ ASSERT (VirtualMemoryInfo != NULL); -+ -+ if (!VirtualMemoryInfoInitialized) { -+ DEBUG ((DEBUG_ERROR, -+ "ArmPlatformGetVirtualMemoryMap must be called before RpiPlatformGetVirtualMemoryInfo.\n")); -+ return; -+ } -+ -+ *MemoryInfo = VirtualMemoryInfo; -+} -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -new file mode 100644 -index 00000000..79aa4f1b ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -0,0 +1,685 @@ -+# @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# Copyright (c) 2011 - 2020, ARM Limited. All rights reserved. -+# Copyright (c) 2017 - 2018, Andrei Warkentin -+# Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved. -+# Copyright (c) 2014, Linaro Limited. All rights reserved. -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+## -+ -+################################################################################ -+# -+# Defines Section - statements that will be processed to create a Makefile. -+# -+################################################################################ -+[Defines] -+ PLATFORM_NAME = RPi5 -+ PLATFORM_GUID = 4e8faa1b-1682-4dfc-8204-2e316a14b7ec -+ PLATFORM_VERSION = 1.0 -+ DSC_SPECIFICATION = 0x0001001A -+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) -+ SUPPORTED_ARCHITECTURES = AARCH64 -+ BUILD_TARGETS = DEBUG|RELEASE|NOOPT -+ SKUID_IDENTIFIER = DEFAULT -+ FLASH_DEFINITION = Platform/RaspberryPi/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf -+ -+ # -+ # Defines for default states. These can be changed on the command line. -+ # -D FLAG=VALUE -+ # -+ DEFINE SECURE_BOOT_ENABLE = FALSE -+ DEFINE INCLUDE_TFTP_COMMAND = FALSE -+ DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000004F -+ -+!ifndef TFA_BUILD_ARTIFACTS -+ # -+ # Default TF-A binary checked into edk2-non-osi. -+ # -+ DEFINE TFA_BUILD_BL31 = Platform/RaspberryPi/$(PLATFORM_NAME)/TrustedFirmware/bl31.bin -+!else -+ # -+ # Usually we use the checked-in binaries, but for developers working -+ # on the firmware, being able to use a local TF-A build without extra copy -+ # operations ends up being very helpful. -+ # -+ DEFINE TFA_BUILD_BL31 = $(TFA_BUILD_ARTIFACTS)/bl31.bin -+!endif -+ -+################################################################################ -+# -+# Library Class section - list of all Library Classes needed by this Platform. -+# -+################################################################################ -+ -+!include MdePkg/MdeLibs.dsc.inc -+ -+[LibraryClasses.common] -+!if $(TARGET) == RELEASE -+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf -+!else -+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf -+!endif -+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf -+ -+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf -+ SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf -+ BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.inf -+ SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf -+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf -+ ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf -+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf -+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf -+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf -+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf -+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf -+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf -+ -+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf -+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf -+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf -+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf -+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf -+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf -+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf -+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf -+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf -+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf -+ UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf -+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf -+ ImagePropertiesRecordLib|MdeModulePkg/Library/ImagePropertiesRecordLib/ImagePropertiesRecordLib.inf -+ -+ UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf -+ OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf -+ -+ # -+ # Ramdisk Requirements -+ # -+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf -+ -+ # Allow dynamic PCDs -+ # -+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf -+ -+ # use the accelerated BaseMemoryLibOptDxe by default, overrides for SEC/PEI below -+ BaseMemoryLib|MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf -+ -+ # -+ # It is not possible to prevent the ARM compiler from inserting calls to intrinsic functions. -+ # This library provides the instrinsic functions such a compiler may generate calls to. -+ # -+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf -+ -+ # Add support for GCC stack protector -+ NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf -+ -+ # ARM Architectural Libraries -+ CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf -+ DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf -+ CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf -+ ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf -+ ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf -+ ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf -+ DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf -+ TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf -+ ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf -+ ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf -+ ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf -+ ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf -+ -+ # Dual serial port library -+ PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf -+ PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf -+ SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf -+ -+ # Cryptographic libraries -+ RngLib|MdePkg/Library/DxeRngLib/DxeRngLib.inf -+ IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf -+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf -+ OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf -+ TlsLib|CryptoPkg/Library/TlsLib/TlsLib.inf -+ -+ # -+ # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window -+ # in the debugger will show load and unload commands for symbols. You can cut and paste this -+ # into the command window to load symbols. We should be able to use a script to do this, but -+ # the version of RVD I have does not support scripts accessing system memory. -+ # -+ #PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf -+ PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf -+ #PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf -+ -+ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf -+ DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf -+ -+ # Flattened Device Tree (FDT) access library -+ FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf -+ -+ # USB Libraries -+ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf -+ -+ # -+ # Secure Boot dependencies -+ # -+!if $(SECURE_BOOT_ENABLE) == TRUE -+ TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf -+ AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf -+ SecureBootVariableLib|SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.inf -+ SecureBootVariableProvisionLib|SecurityPkg/Library/SecureBootVariableProvisionLib/SecureBootVariableProvisionLib.inf -+ PlatformPKProtectionLib|SecurityPkg/Library/PlatformPKProtectionLibVarPolicy/PlatformPKProtectionLibVarPolicy.inf -+ -+ # re-use the UserPhysicalPresent() dummy implementation from the ovmf tree -+ PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.inf -+!else -+ TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf -+ AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf -+!endif -+ VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf -+ VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf -+ VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLib.inf -+ VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf -+ GpioLib|Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.inf -+ -+ FdtPlatformLib|Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.inf -+ BoardInfoLib|Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.inf -+ BoardRevisionHelperLib|Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.inf -+ -+[LibraryClasses.common.SEC] -+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf -+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf -+ MemoryInitPeiLib|Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf -+ PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf -+ ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf -+ LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf -+ PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf -+ HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf -+ PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf -+ MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf -+ -+[LibraryClasses.common.DXE_CORE] -+ HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf -+ MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf -+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf -+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf -+ PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf -+ -+[LibraryClasses.common.DXE_DRIVER] -+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf -+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf -+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf -+!if $(INCLUDE_TFTP_COMMAND) == TRUE -+ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf -+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf -+!endif -+ -+[LibraryClasses.common.UEFI_APPLICATION] -+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf -+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf -+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf -+ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf -+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf -+ -+[LibraryClasses.common.UEFI_DRIVER] -+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf -+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf -+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf -+ -+[LibraryClasses.common.DXE_RUNTIME_DRIVER] -+ # Runtime debug messages may crash an OS unless serial output to MMIO mapped UARTs is inhibited -+ DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf -+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf -+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf -+ EfiResetSystemLib|Platform/RaspberryPi/Library/ResetLib/ResetLib.inf -+ ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf -+ VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf -+ -+!if $(SECURE_BOOT_ENABLE) == TRUE -+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf -+!endif -+ -+################################################################################################### -+# BuildOptions Section - Define the module specific tool chain flags that should be used as -+# the default flags for a module. These flags are appended to any -+# standard flags that are defined by the build process. -+################################################################################################### -+ -+[BuildOptions] -+ GCC:*_*_*_CC_FLAGS = -DRPI_MODEL=5 -+ GCC:*_*_*_PP_FLAGS = -DRPI_MODEL=5 -+ GCC:*_*_*_ASLPP_FLAGS = -DRPI_MODEL=5 -+ GCC:*_*_*_ASLCC_FLAGS = -DRPI_MODEL=5 -+ GCC:*_*_*_VFRPP_FLAGS = -DRPI_MODEL=5 -+ GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -DNDEBUG -+ -+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] -+ GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000 -+ -+################################################################################ -+# -+# Pcd Section - list of all EDK II PCD Entries defined by this Platform -+# -+################################################################################ -+ -+[PcdsFeatureFlag.common] -+ # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress -+ gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE -+ -+ gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE -+ gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE -+ -+ ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe. -+ # It could be set FALSE to save size. -+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE -+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE -+ gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|FALSE -+ -+[PcdsFixedAtBuild.common] -+ gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 -+ gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 -+ gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 -+ gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 -+ gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF -+ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1 -+ gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 -+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 -+ -+ # DEBUG_ASSERT_ENABLED 0x01 -+ # DEBUG_PRINT_ENABLED 0x02 -+ # DEBUG_CODE_ENABLED 0x04 -+ # CLEAR_MEMORY_ENABLED 0x08 -+ # ASSERT_BREAKPOINT_ENABLED 0x10 -+ # ASSERT_DEADLOOP_ENABLED 0x20 -+!if $(TARGET) == RELEASE -+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21 -+!else -+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f -+!endif -+ -+ # DEBUG_INIT 0x00000001 // Initialization -+ # DEBUG_WARN 0x00000002 // Warnings -+ # DEBUG_LOAD 0x00000004 // Load events -+ # DEBUG_FS 0x00000008 // EFI File system -+ # DEBUG_POOL 0x00000010 // Alloc & Free (pool) -+ # DEBUG_PAGE 0x00000020 // Alloc & Free (page) -+ # DEBUG_INFO 0x00000040 // Informational debug messages -+ # DEBUG_DISPATCH 0x00000080 // PEI/DXE/SMM Dispatchers -+ # DEBUG_VARIABLE 0x00000100 // Variable -+ # DEBUG_BM 0x00000400 // Boot Manager -+ # DEBUG_BLKIO 0x00001000 // BlkIo Driver -+ # DEBUG_NET 0x00004000 // SNP Driver -+ # DEBUG_UNDI 0x00010000 // UNDI Driver -+ # DEBUG_LOADFILE 0x00020000 // LoadFile -+ # DEBUG_EVENT 0x00080000 // Event messages -+ # DEBUG_GCD 0x00100000 // Global Coherency Database changes -+ # DEBUG_CACHE 0x00200000 // Memory range cachability changes -+ # DEBUG_VERBOSE 0x00400000 // Detailed debug messages that may -+ # // significantly impact boot performance -+ # DEBUG_ERROR 0x80000000 // Error -+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|$(DEBUG_PRINT_ERROR_LEVEL) -+ -+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 -+ -+ # -+ # Optional feature to help prevent EFI memory map fragments -+ # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob -+ # Values are in EFI Pages (4K). DXE Core will make sure that -+ # at least this much of each type of memory can be allocated -+ # from a single memory range. This way you only end up with -+ # maximum of two fragments for each type in the memory map -+ # (the memory used, and the free memory that was prereserved -+ # but not used). -+ # -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0 -+!if $(SECURE_BOOT_ENABLE) == TRUE -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|600 -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|400 -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|1500 -+!else -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|300 -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|150 -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|1000 -+!endif -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|12000 -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 -+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 -+ -+ gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset|0xc0000000 -+ gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit|0xffffffff -+ -+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"EDK2-DEV" -+ -+!if $(SECURE_BOOT_ENABLE) == TRUE -+ # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot -+ gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 -+ gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 -+ gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04 -+!endif -+ -+ gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE -+ -+ # Default platform supported RFC 4646 languages: (American) English -+ gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US" -+ -+[LibraryClasses.common] -+ ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf -+ ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf -+ ArmPlatformLib|Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf -+ TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf -+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf -+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf -+ BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf -+ PlatformBootManagerLib|Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf -+ CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf -+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf -+ AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf -+ -+[LibraryClasses.common.UEFI_DRIVER] -+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf -+ -+################################################################################ -+# -+# Pcd Section - list of all EDK II PCD Entries defined by this Platform -+# -+################################################################################ -+ -+[PcdsFeatureFlag.common] -+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE -+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE -+ gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE -+ -+[PcdsFixedAtBuild.common] -+ gArmPlatformTokenSpaceGuid.PcdCoreCount|4 -+ gArmTokenSpaceGuid.PcdVFPEnabled|1 -+ -+ gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 -+ -+ # Size of the region used by UEFI in permanent memory (Reserved 64MB) -+ gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000 -+ # -+ # 0x00000000 - 0x001F0000 FD (PcdFdBaseAddress, PcdFdSize) -+ # 0x001F0000 - 0x00210000 DTB (PcdFdtBaseAddress, PcdFdtSize) -+ # 0x00210000 - ... RAM (PcdSystemMemoryBase, PcdSystemMemorySize) -+ # -+ gArmTokenSpaceGuid.PcdSystemMemoryBase|0x00210000 -+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x3fdf0000 -+ -+ gRaspberryPiTokenSpaceGuid.PcdFdtSize|0x20000 -+ -+ # UARTs -+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz|44000000 -+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x107d001000 -+ -+ # -+ # ARM General Interrupt Controller -+ # -+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x107fff9000 -+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x107fffa000 -+ gRaspberryPiTokenSpaceGuid.PcdGicInterruptInterfaceHBase|0x107fffc000 -+ gRaspberryPiTokenSpaceGuid.PcdGicInterruptInterfaceVBase|0x107fffe000 -+ gRaspberryPiTokenSpaceGuid.PcdGicGsivId|0x19 -+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq0|0x30 -+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq1|0x31 -+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq2|0x32 -+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq3|0x33 -+ -+ # -+ # Mailbox -+ # -+ gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress|0x107c013880 -+ -+ ## Default Terminal Type -+ ## 0-PCANSI, 1-VT100, 2-VT00+, 3-UTF8, 4-TTYTERM -+ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 -+ -+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE -+ gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } -+ -+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"EDK2" -+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE -+ -+[PcdsDynamicHii.common.DEFAULT] -+ # -+ # Display-related. -+ # -+ -+ # -+ # Just enable native resolution by default. -+ # -+ gRaspberryPiTokenSpaceGuid.PcdDisplayEnableScaledVModes|L"DisplayEnableScaledVModes"|gConfigDxeFormSetGuid|0x0|0x20 -+ gRaspberryPiTokenSpaceGuid.PcdDisplayEnableSShot|L"DisplayEnableSShot"|gConfigDxeFormSetGuid|0x0|1 -+ -+ # -+ # Reset-related. -+ # -+ gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspberryPiTokenSpaceGuid|0x0|0 -+ -+ # -+ # Common UEFI ones. -+ # -+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 -+ # -+ # This is silly, but by pointing SetupConXXX and ConXXX PCDs to -+ # the same variables, I can use the graphical configuration to -+ # change the mode used by ConSplitter. -+ # -+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|L"Columns"|gRaspberryPiTokenSpaceGuid|0x0|80 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|L"Columns"|gRaspberryPiTokenSpaceGuid|0x0|80 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|L"Rows"|gRaspberryPiTokenSpaceGuid|0x0|25 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|L"Rows"|gRaspberryPiTokenSpaceGuid|0x0|25 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdBootDiscoveryPolicy|L"BootDiscoveryPolicy"|gBootDiscoveryPolicyMgrFormsetGuid|0 -+ -+[PcdsDynamicDefault.common] -+ # -+ # Set video resolution for boot options and for text setup. -+ # -+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0 -+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0 -+ -+################################################################################ -+# -+# Components Section - list of all EDK II Modules needed by this Platform -+# -+################################################################################ -+[Components.common] -+ # -+ # PEI Phase modules -+ # -+ ArmPlatformPkg/PrePi/PeiUniCore.inf -+ -+ # -+ # DXE -+ # -+ MdeModulePkg/Core/Dxe/DxeMain.inf { -+ -+ NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf -+ } -+ MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { -+ -+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf -+ } -+ -+ # -+ # Architectural Protocols -+ # -+ ArmPkg/Drivers/CpuDxe/CpuDxe.inf -+ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf -+ Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.inf -+ MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf -+ MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { -+ -+ NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf -+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf -+ } -+!if $(SECURE_BOOT_ENABLE) == TRUE -+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf { -+ -+ NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf -+ } -+ SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf -+ SecurityPkg/EnrollFromDefaultKeysApp/EnrollFromDefaultKeysApp.inf -+ SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureBootDefaultKeysDxe.inf -+!else -+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf -+!endif -+ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf -+ MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf -+ EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf -+ EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf { -+ -+ RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf -+ } -+ EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf -+ -+ MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf -+ MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf -+ MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf -+ MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf -+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf -+ Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.inf -+ EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf -+ -+ MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf -+ -+ ArmPkg/Drivers/ArmGic/ArmGicDxe.inf -+ Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -+ # Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -+ # Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf -+ ArmPkg/Drivers/TimerDxe/TimerDxe.inf -+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf -+ MdeModulePkg/Universal/EbcDxe/EbcDxe.inf -+ -+ # -+ # FAT filesystem + GPT/MBR partitioning -+ # -+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf -+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf -+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf -+ FatPkg/EnhancedFatDxe/Fat.inf -+ -+ # -+ # ACPI Support -+ # -+ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf -+ MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf -+ # Platform/RaspberryPi/AcpiTables/AcpiTables.inf -+ -+ # -+ # SMBIOS Support -+ # -+ Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf -+ MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf -+ -+ # -+ # RAM Disk Support -+ # -+ MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf -+ -+ # -+ # Bds -+ # -+ MdeModulePkg/Universal/BootManagerPolicyDxe/BootManagerPolicyDxe.inf -+ MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf -+ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf -+ MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf -+ MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf -+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf -+ Platform/RaspberryPi/Drivers/LogoDxe/LogoDxe.inf -+ MdeModulePkg/Application/UiApp/UiApp.inf { -+ -+ NULL|MdeModulePkg/Library/BootDiscoveryPolicyUiLib/BootDiscoveryPolicyUiLib.inf -+ NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf -+ NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf -+ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf -+ } -+ -+ # -+ # SCSI Bus and Disk Driver -+ # -+ MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf -+ MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf -+ -+ # -+ # USB Support -+ # -+ MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf -+ MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf -+ MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf -+ MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf -+ -+ # -+ # Networking stack -+ # -+!include NetworkPkg/Network.dsc.inc -+ -+ # -+ # RNG -+ # -+ # Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf -+ -+ # -+ # PCI Support -+ # -+ ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf -+ # MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf -+ MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf -+ EmbeddedPkg/Drivers/NonCoherentIoMmuDxe/NonCoherentIoMmuDxe.inf { -+ -+ gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset|0x00000000 -+ gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit|0xbfffffff -+ } -+ -+ # -+ # NVMe boot devices -+ # -+ MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf -+ -+ # -+ # UEFI application (Shell Embedded Boot Loader) -+ # -+ ShellPkg/Application/Shell/Shell.inf { -+ -+ ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf -+ NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf -+ NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf -+ NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf -+ NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf -+ NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf -+ NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf -+ NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf -+ NULL|ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf -+ HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf -+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf -+ BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf -+ -+ -+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF -+ gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE -+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 -+ gEfiShellPkgTokenSpaceGuid.PcdShellFileOperationSize|0x200000 -+ } -+!if $(INCLUDE_TFTP_COMMAND) == TRUE -+ ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf { -+ -+ gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE -+ } -+!endif -+ -+ ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf -+ UefiCpuPkg/Test/UnitTest/EfiMpServicesPpiProtocol/EfiMpServiceProtocolShellUnitTest.inf { -+ -+ UnitTestLib|UnitTestFrameworkPkg/Library/UnitTestLib/UnitTestLib.inf -+ UnitTestPersistenceLib|UnitTestFrameworkPkg/Library/UnitTestPersistenceLibNull/UnitTestPersistenceLibNull.inf -+ UnitTestResultReportLib|UnitTestFrameworkPkg/Library/UnitTestResultReportLib/UnitTestResultReportLibConOut.inf -+ } -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -new file mode 100644 -index 00000000..8391c195 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -0,0 +1,435 @@ -+## @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# Copyright (c) 2011 - 2019, ARM Limited. All rights reserved. -+# Copyright (c) 2017 - 2018, Andrei Warkentin -+# Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved. -+# Copyright (c) 2014, Linaro Limited. All rights reserved. -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+## -+ -+################################################################################ -+# -+# FD Section -+# The [FD] Section is made up of the definition statements and a -+# description of what goes into the Flash Device Image. Each FD section -+# defines one flash "device" image. A flash device image may be one of -+# the following: Removable media bootable image (like a boot floppy -+# image,) an Option ROM image (that would be "flashed" into an add-in -+# card,) a System "Flash" image (that would be burned into a system's -+# flash) or an Update ("Capsule") image that will be used to update and -+# existing system flash. -+# -+################################################################################ -+ -+[FD.RPI_EFI] -+BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress -+Size = 0x001f0000|gArmTokenSpaceGuid.PcdFdSize -+ErasePolarity = 1 -+ -+BlockSize = 0x00001000|gRaspberryPiTokenSpaceGuid.PcdFirmwareBlockSize -+NumBlocks = 0x1f0 -+ -+################################################################################ -+# -+# Following are lists of FD Region layout which correspond to the locations of different -+# images within the flash device. -+# -+# Regions must be defined in ascending order and may not overlap. -+# -+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by -+# the pipe "|" character, followed by the size of the region, also in hex with the leading -+# "0x" characters. Like: -+# Offset|Size -+# PcdOffsetCName|PcdSizeCName -+# RegionType -+# -+################################################################################ -+ -+# -+# ATF primary boot image -+# -+0x00000000|0x00020000 -+FILE = $(TFA_BUILD_BL31) -+ -+# -+# UEFI image -+# -+0x00020000|0x001b0000 -+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize -+FV = FVMAIN_COMPACT -+ -+# -+# Variables (0x20000 overall). -+# -+# 0x001e0000 - 0x001edfff EFI_FIRMWARE_VOLUME_HEADER -+# 0x001ee000 - 0x001eefff Event log -+# 0x001ef000 - 0x001effff EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER- -+# 0x001f0000 - 0x001fffff Data -+# -+ -+# NV_VARIABLE_STORE -+0x001d0000|0x0000e000 -+gRaspberryPiTokenSpaceGuid.PcdNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize -+ -+DATA = { -+ ## This is the EFI_FIRMWARE_VOLUME_HEADER -+ # ZeroVector [] -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ # FileSystemGuid: gEfiSystemNvDataFvGuid = -+ # { 0xFFF12B8D, 0x7696, 0x4C8B, -+ # { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} -+ 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, -+ 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, -+ # FvLength: 0x20000 -+ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, -+ # Signature "_FVH" # Attributes -+ 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, -+ # HeaderLength -+ 0x48, 0x00, -+ # CheckSum -+ 0x19, 0xF9, -+ # ExtHeaderOffset #Reserved #Revision -+ 0x00, 0x00, 0x00, 0x02, -+ # Blockmap[0]: 0x20 Blocks * 0x1000 Bytes / Block -+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, -+ # Blockmap[1]: End -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ ## This is the VARIABLE_STORE_HEADER -+ # It is compatible with SECURE_BOOT_ENABLE == FALSE as well. -+ # Signature: gEfiAuthenticatedVariableGuid = -+ # { 0xaaf32c78, 0x947b, 0x439a, -+ # { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }} -+ 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, -+ 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, -+ # Size: 0xe000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - -+ # 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xdfb8 -+ # This can speed up the Variable Dispatch a bit. -+ 0xB8, 0xDF, 0x00, 0x00, -+ # FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 -+ 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -+} -+ -+# NV_EVENT_LOG -+0x001de000|0x00001000 -+gRaspberryPiTokenSpaceGuid.PcdNvStorageEventLogBase|gRaspberryPiTokenSpaceGuid.PcdNvStorageEventLogSize -+ -+# NV_FTW_WORKING header -+0x001df000|0x00001000 -+gRaspberryPiTokenSpaceGuid.PcdNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize -+ -+DATA = { -+ # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid = -+ # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }} -+ 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49, -+ 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95, -+ # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved -+ 0x2c, 0xaf, 0x2c, 0x64, 0xFE, 0xFF, 0xFF, 0xFF, -+ # WriteQueueSize: UINT64 -+ 0xE0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -+} -+ -+# NV_FTW_WORKING data -+0x001e0000|0x00010000 -+gRaspberryPiTokenSpaceGuid.PcdNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize -+ -+# -+# This is just for documentation purposes! The DTB reserved space is not part of the FD, -+# but this is exactly where it is expected to be. -+# -+# 0x001f0000|0x10000 -+# gRaspberryPiTokenSpaceGuid.PcdFdtBaseAddress|gRaspberryPiTokenSpaceGuid.PcdFdtSize -+# -+ -+################################################################################ -+# -+# FV Section -+# -+# [FV] section is used to define what components or modules are placed within a flash -+# device file. This section also defines order the components and modules are positioned -+# within the image. The [FV] section consists of define statements, set statements and -+# module statements. -+# -+################################################################################ -+ -+[FV.FvMain] -+FvNameGuid = 9a15aa37-d555-4a4e-b541-86391ff68164 -+BlockSize = 0x40 -+NumBlocks = 0 # This FV gets compressed so make it just big enough -+FvAlignment = 16 # FV alignment and FV attributes setting. -+ERASE_POLARITY = 1 -+MEMORY_MAPPED = TRUE -+STICKY_WRITE = TRUE -+LOCK_CAP = TRUE -+LOCK_STATUS = TRUE -+WRITE_DISABLED_CAP = TRUE -+WRITE_ENABLED_CAP = TRUE -+WRITE_STATUS = TRUE -+WRITE_LOCK_CAP = TRUE -+WRITE_LOCK_STATUS = TRUE -+READ_DISABLED_CAP = TRUE -+READ_ENABLED_CAP = TRUE -+READ_STATUS = TRUE -+READ_LOCK_CAP = TRUE -+READ_LOCK_STATUS = TRUE -+ -+ INF MdeModulePkg/Core/Dxe/DxeMain.inf -+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf -+ -+ # -+ # PI DXE Drivers producing Architectural Protocols (EFI Services) -+ # -+ INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf -+ INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf -+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf -+ INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf -+ INF Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.inf -+ INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf -+ INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf -+!if $(SECURE_BOOT_ENABLE) == TRUE -+!include ArmPlatformPkg/SecureBootDefaultKeys.fdf.inc -+ INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf -+ INF SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureBootDefaultKeysDxe.inf -+!endif -+ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf -+ INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf -+ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf -+ INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf -+ INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf -+ INF ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf -+ -+ # -+ # Multiple Console IO support -+ # -+ INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf -+ INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf -+ INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf -+ INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf -+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf -+ INF Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.inf -+ INF EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf -+ -+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf -+ INF Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -+ # INF Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -+ # INF Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf -+ INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf -+ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf -+ INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf -+ -+ # -+ # FAT filesystem + GPT/MBR partitioning -+ # -+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf -+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf -+ INF FatPkg/EnhancedFatDxe/Fat.inf -+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf -+ -+ # -+ # UEFI application (Shell Embedded Boot Loader) -+ # -+ INF ShellPkg/Application/Shell/Shell.inf -+!if $(INCLUDE_TFTP_COMMAND) == TRUE -+ INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf -+!endif -+ -+ # -+ # ACPI Support -+ # -+ INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf -+ INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf -+ # INF RuleOverride = ACPITABLE Platform/RaspberryPi/AcpiTables/AcpiTables.inf -+ -+ # -+ # SMBIOS Support -+ # -+ INF Platform/RaspberryPi/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf -+ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf -+ -+ # -+ # RAM Disk Support -+ # -+ INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf -+ -+ # -+ # Bds -+ # -+ INF MdeModulePkg/Universal/BootManagerPolicyDxe/BootManagerPolicyDxe.inf -+ INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf -+ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf -+ INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf -+ INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf -+ INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf -+ INF MdeModulePkg/Application/UiApp/UiApp.inf -+ -+ # -+ # Networking stack -+ # -+!include NetworkPkg/Network.fdf.inc -+ -+ # -+ # RNG -+ # -+ # INF Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf -+ -+ # -+ # PCI Support -+ # -+ INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf -+ # INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf -+ INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf -+ INF EmbeddedPkg/Drivers/NonCoherentIoMmuDxe/NonCoherentIoMmuDxe.inf -+ -+ # -+ # NVMe boot devices -+ # -+ INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf -+ -+ # -+ # SCSI Bus and Disk Driver -+ # -+ INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf -+ INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf -+ -+ # -+ # USB Support -+ # -+ INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf -+ INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf -+ INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf -+ INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf -+ -+ # -+ # Pi logo (splash screen) -+ # -+ INF Platform/RaspberryPi/Drivers/LogoDxe/LogoDxe.inf -+ -+[FV.FVMAIN_COMPACT] -+FvAlignment = 16 -+ERASE_POLARITY = 1 -+MEMORY_MAPPED = TRUE -+STICKY_WRITE = TRUE -+LOCK_CAP = TRUE -+LOCK_STATUS = TRUE -+WRITE_DISABLED_CAP = TRUE -+WRITE_ENABLED_CAP = TRUE -+WRITE_STATUS = TRUE -+WRITE_LOCK_CAP = TRUE -+WRITE_LOCK_STATUS = TRUE -+READ_DISABLED_CAP = TRUE -+READ_ENABLED_CAP = TRUE -+READ_STATUS = TRUE -+READ_LOCK_CAP = TRUE -+READ_LOCK_STATUS = TRUE -+ -+ INF ArmPlatformPkg/PrePi/PeiUniCore.inf -+ FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { -+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { -+ SECTION FV_IMAGE = FVMAIN -+ } -+ } -+ -+################################################################################ -+# -+# Rules are use with the [FV] section's module INF type to define -+# how an FFS file is created for a given INF file. The following Rule are the default -+# rules for the different module type. User can add the customized rules to define the -+# content of the FFS file. -+# -+################################################################################ -+ -+ -+############################################################################ -+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # -+############################################################################ -+# -+#[Rule.Common.DXE_DRIVER] -+# FILE DRIVER = $(NAMED_GUID) { -+# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex -+# COMPRESS PI_STD { -+# GUIDED { -+# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi -+# UI STRING="$(MODULE_NAME)" Optional -+# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) -+# } -+# } -+# } -+# -+############################################################################ -+ -+[Rule.Common.SEC] -+ FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED { -+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi -+ } -+ -+[Rule.Common.PEI_CORE] -+ FILE PEI_CORE = $(NAMED_GUID) FIXED { -+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi -+ UI STRING ="$(MODULE_NAME)" Optional -+ } -+ -+[Rule.Common.PEIM] -+ FILE PEIM = $(NAMED_GUID) FIXED { -+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex -+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi -+ UI STRING="$(MODULE_NAME)" Optional -+ } -+ -+[Rule.Common.DXE_CORE] -+ FILE DXE_CORE = $(NAMED_GUID) { -+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi -+ UI STRING="$(MODULE_NAME)" Optional -+ } -+ -+[Rule.Common.UEFI_DRIVER] -+ FILE DRIVER = $(NAMED_GUID) { -+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex -+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi -+ UI STRING="$(MODULE_NAME)" Optional -+ } -+ -+[Rule.Common.DXE_DRIVER] -+ FILE DRIVER = $(NAMED_GUID) { -+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex -+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi -+ UI STRING="$(MODULE_NAME)" Optional -+ RAW ACPI Optional |.acpi -+ RAW ASL Optional |.aml -+ } -+ -+[Rule.Common.DXE_RUNTIME_DRIVER] -+ FILE DRIVER = $(NAMED_GUID) { -+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex -+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi -+ UI STRING="$(MODULE_NAME)" Optional -+ } -+ -+[Rule.Common.UEFI_APPLICATION] -+ FILE APPLICATION = $(NAMED_GUID) { -+ UI STRING ="$(MODULE_NAME)" Optional -+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi -+ } -+ -+[Rule.Common.UEFI_DRIVER.BINARY] -+ FILE DRIVER = $(NAMED_GUID) { -+ DXE_DEPEX DXE_DEPEX Optional |.depex -+ PE32 PE32 |.efi -+ UI STRING="$(MODULE_NAME)" Optional -+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) -+ } -+ -+[Rule.Common.UEFI_APPLICATION.BINARY] -+ FILE APPLICATION = $(NAMED_GUID) { -+ PE32 PE32 |.efi -+ UI STRING="$(MODULE_NAME)" Optional -+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) -+ } -+ -+[Rule.Common.USER_DEFINED.ACPITABLE] -+ FILE FREEFORM = $(NAMED_GUID) { -+ RAW ACPI |.acpi -+ RAW ASL |.aml -+ } --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0004-Platform-RaspberryPi-Fix-framebuffer-base-translatio.patch b/packages/edk2/patches/platforms/0004-Platform-RaspberryPi-Fix-framebuffer-base-translatio.patch deleted file mode 100644 index 015cb4f..0000000 --- a/packages/edk2/patches/platforms/0004-Platform-RaspberryPi-Fix-framebuffer-base-translatio.patch +++ /dev/null @@ -1,40 +0,0 @@ -From a9b9b0912a84e57d91285b29ce3eb8823e1d053d Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Tue, 12 Dec 2023 03:12:12 +0200 -Subject: [PATCH 04/16] Platform/RaspberryPi: Fix framebuffer base translation -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -On RPi 5, the firmware already returns a CPU address to the framebuffer. -We need to mask off the VC bus alias so that it's only subtracted when -present. - -Display now works, with a few caveats: -- the depth does not update from 16 to 32-bit anymore. It's necessary -to add "framebuffer_depth=32" in config.txt. - -- no resolutions higher than 1080p. - -Signed-off-by: Mario Bălănică ---- - Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -index 91f581ef..9077f077 100644 ---- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -+++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -@@ -754,7 +754,7 @@ RpiFirmwareAllocFb ( - } - - *Pitch = Cmd->Pitch.Pitch; -- *FbBase = Cmd->AllocFb.AlignmentBase - PcdGet64 (PcdDmaDeviceOffset); -+ *FbBase = Cmd->AllocFb.AlignmentBase & ~PcdGet64 (PcdDmaDeviceOffset); - *FbSize = Cmd->AllocFb.Size; - ReleaseSpinLock (&mMailboxLock); - --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0005-Platform-RPi5-Add-RP1-USB-support.patch b/packages/edk2/patches/platforms/0005-Platform-RPi5-Add-RP1-USB-support.patch deleted file mode 100644 index 7fa8d8d..0000000 --- a/packages/edk2/patches/platforms/0005-Platform-RPi5-Add-RP1-USB-support.patch +++ /dev/null @@ -1,535 +0,0 @@ -From 512184f1a74ada3414d865b9a8356531a4fdb70f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 29 Dec 2023 02:56:03 +0200 -Subject: [PATCH 05/16] Platform/RPi5: Add RP1 USB support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Requires "pciex4_reset=0" in config.txt so that PCIe 2 is left -configured by the VPU firmware, until we add our own host bridge -driver. - -Signed-off-by: Mario Bălănică ---- - Platform/RaspberryPi/RPi5/RPi5.dsc | 13 ++ - Platform/RaspberryPi/RPi5/RPi5.fdf | 6 + - .../Drivers/Rp1BusDxe/Rp1BusDxe.c | 98 +++++++++ - .../Drivers/Rp1BusDxe/Rp1BusDxe.inf | 39 ++++ - .../RaspberryPi/RpiSiliconPkg/Include/Rp1.asi | 60 ++++++ - .../RaspberryPi/RpiSiliconPkg/Include/Rp1.h | 191 ++++++++++++++++++ - .../RpiSiliconPkg/RpiSiliconPkg.dec | 22 ++ - 7 files changed, 429 insertions(+) - create mode 100644 Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.c - create mode 100644 Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf - create mode 100644 Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.asi - create mode 100644 Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.h - create mode 100644 Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec - -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 79aa4f1b..6850203e 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -186,6 +186,8 @@ - BoardInfoLib|Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.inf - BoardRevisionHelperLib|Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.inf - -+ NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf -+ - [LibraryClasses.common.SEC] - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf -@@ -434,6 +436,11 @@ - # - gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress|0x107c013880 - -+ # -+ # RP1 BAR1 preconfigured by the VPU -+ # -+ gRpiSiliconTokenSpaceGuid.Rp1PciPeripheralsBar|0x1f00000000 -+ - ## Default Terminal Type - ## 0-PCANSI, 1-VT100, 2-VT00+, 3-UTF8, 4-TTYTERM - gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 -@@ -634,12 +641,18 @@ - ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf - # MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf - MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf -+ MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf - EmbeddedPkg/Drivers/NonCoherentIoMmuDxe/NonCoherentIoMmuDxe.inf { - - gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset|0x00000000 - gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit|0xbfffffff - } - -+ # -+ # RP1 I/O bridge -+ # -+ Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf -+ - # - # NVMe boot devices - # -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index 8391c195..8cd67254 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -281,8 +281,14 @@ READ_LOCK_STATUS = TRUE - INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf - # INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf - INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf -+ INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf - INF EmbeddedPkg/Drivers/NonCoherentIoMmuDxe/NonCoherentIoMmuDxe.inf - -+ # -+ # RP1 I/O bridge -+ # -+ INF Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf -+ - # - # NVMe boot devices - # -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.c b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.c -new file mode 100644 -index 00000000..7d7012b5 ---- /dev/null -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.c -@@ -0,0 +1,98 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+typedef struct { -+ EFI_PHYSICAL_ADDRESS Bar; -+ UINT32 ChipId; -+} RP1_DEVICE; -+ -+STATIC -+EFI_STATUS -+EFIAPI -+Rp1RegisterDwc3Controllers ( -+ IN RP1_DEVICE *This -+ ) -+{ -+ EFI_STATUS Status; -+ UINTN Index; -+ EFI_PHYSICAL_ADDRESS FullBase; -+ -+ EFI_PHYSICAL_ADDRESS Dwc3Addresses[] = { -+ RP1_USBHOST0_BASE, RP1_USBHOST1_BASE -+ }; -+ -+ for (Index = 0; Index < ARRAY_SIZE (Dwc3Addresses); Index++) { -+ FullBase = This->Bar + Dwc3Addresses[Index]; -+ Status = RegisterNonDiscoverableMmioDevice ( -+ NonDiscoverableDeviceTypeXhci, -+ NonDiscoverableDeviceDmaTypeNonCoherent, -+ NULL, -+ NULL, -+ 1, -+ FullBase, -+ RP1_USBHOST_SIZE -+ ); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, -+ "%a: Failed to register DWC3 controller at 0x%lx. Status=%r\n", -+ __func__, FullBase, Status)); -+ return Status; -+ } -+ } -+ return EFI_SUCCESS; -+} -+ -+STATIC -+VOID -+EFIAPI -+Rp1RegisterDevices ( -+ IN RP1_DEVICE *This -+ ) -+{ -+ Rp1RegisterDwc3Controllers (This); -+} -+ -+STATIC -+VOID -+EFIAPI -+Rp1EnableInterrupts ( -+ IN RP1_DEVICE *This -+ ) -+{ -+ MmioWrite32 (This->Bar + RP1_PCIE_REG_SET + RP1_PCIE_MSIX_CFG (RP1_INT_USBHOST0_0), -+ RP1_PCIE_MSIX_CFG_ENABLE); -+ MmioWrite32 (This->Bar + RP1_PCIE_REG_SET + RP1_PCIE_MSIX_CFG (RP1_INT_USBHOST1_0), -+ RP1_PCIE_MSIX_CFG_ENABLE); -+} -+ -+EFI_STATUS -+EFIAPI -+Rp1BusDxeEntryPoint ( -+ IN EFI_HANDLE ImageHandle, -+ IN EFI_SYSTEM_TABLE *SystemTable -+ ) -+{ -+ RP1_DEVICE Dev; -+ Dev.Bar = PcdGet64 (Rp1PciPeripheralsBar); -+ Dev.ChipId = MmioRead32 (Dev.Bar + RP1_SYSINFO_BASE); -+ -+ DEBUG ((DEBUG_INFO, "RP1 chip id: %x, peripheral BAR at CPU address 0x%lx\n", -+ Dev.ChipId, Dev.Bar)); -+ -+ Rp1RegisterDevices (&Dev); -+ Rp1EnableInterrupts (&Dev); -+ -+ return EFI_SUCCESS; -+} -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf -new file mode 100644 -index 00000000..ffc8c143 ---- /dev/null -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf -@@ -0,0 +1,39 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = Rp1BusDxe -+ FILE_GUID = 7d4843f2-f474-40b1-87de-4d67fad8b00f -+ MODULE_TYPE = DXE_DRIVER -+ VERSION_STRING = 1.0 -+ ENTRY_POINT = Rp1BusDxeEntryPoint -+ -+[Sources] -+ Rp1BusDxe.c -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ MdeModulePkg/MdeModulePkg.dec -+ Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec -+ -+[LibraryClasses] -+ DebugLib -+ IoLib -+ NonDiscoverableDeviceRegistrationLib -+ UefiBootServicesTableLib -+ UefiDriverEntryPoint -+ UefiLib -+ -+[Protocols] -+ -+[Pcd] -+ gRpiSiliconTokenSpaceGuid.Rp1PciPeripheralsBar -+ -+[Depex] -+ TRUE -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.asi b/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.asi -new file mode 100644 -index 00000000..9de562ba ---- /dev/null -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.asi -@@ -0,0 +1,60 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+ -+#define RP1_QWORDMEMORY_BUF(Index) \ -+ QWordMemory (ResourceConsumer,, \ -+ MinFixed, MaxFixed, NonCacheable, ReadWrite, \ -+ 0x0, 0x0, 0x0, 0x0, 0x1,,, RB ## Index) -+ -+#define RP1_QWORDMEMORY_SET(Index, Offset, Length) \ -+ CreateQwordField (RBUF, RB ## Index._MIN, MI ## Index) \ -+ CreateQwordField (RBUF, RB ## Index._MAX, MA ## Index) \ -+ CreateQwordField (RBUF, RB ## Index._LEN, LE ## Index) \ -+ LE ## Index = Length \ -+ MI ## Index = PBAR + Offset \ -+ MA ## Index = MI ## Index + LE ## Index - 1 -+ -+#define RP1_INTERRUPT_BUF(Index) \ -+ Interrupt (ResourceConsumer, Level, ActiveHigh, Shared,,, \ -+ RB ## Index) { 0 } \ -+ -+#define RP1_INTERRUPT_SET(Index) \ -+ CreateDwordField (RBUF, RB ## Index._INT, IN ## Index) \ -+ IN ## Index = PINT -+ -+Device (XHC0) { -+ Name (_HID, "PNP0D10") -+ Name (_UID, 0x0) -+ -+ Method (_CRS, 0, Serialized) { -+ Name (RBUF, ResourceTemplate () { -+ RP1_QWORDMEMORY_BUF (00) -+ RP1_INTERRUPT_BUF (01) -+ }) -+ RP1_QWORDMEMORY_SET (00, RP1_USBHOST0_BASE, RP1_USBHOST_SIZE) -+ RP1_INTERRUPT_SET (01) -+ Return (RBUF) -+ } -+} -+ -+Device (XHC1) { -+ Name (_HID, "PNP0D10") -+ Name (_UID, 0x1) -+ -+ Method (_CRS, 0, Serialized) { -+ Name (RBUF, ResourceTemplate () { -+ RP1_QWORDMEMORY_BUF (00) -+ RP1_INTERRUPT_BUF (01) -+ }) -+ RP1_QWORDMEMORY_SET (00, RP1_USBHOST1_BASE, RP1_USBHOST_SIZE) -+ RP1_INTERRUPT_SET (01) -+ Return (RBUF) -+ } -+} -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.h b/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.h -new file mode 100644 -index 00000000..13a33fc6 ---- /dev/null -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.h -@@ -0,0 +1,191 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __RP1_H__ -+#define __RP1_H__ -+ -+// -+// BAR1 Peripherals -+// -+#define RP1_SYSINFO_BASE 0x00000000 -+#define RP1_SYSCFG_BASE 0x00008000 -+#define RP1_OTP_BASE 0x0000c000 -+#define RP1_POWER_BASE 0x00010000 -+#define RP1_RESETS_BASE 0x00014000 -+#define RP1_CLOCKS_MAIN_BASE 0x00018000 -+#define RP1_CLOCKS_VIDEO_BASE 0x0001c000 -+#define RP1_PLL_SYS_BASE 0x00020000 -+#define RP1_PLL_AUDIO_BASE 0x00024000 -+#define RP1_PLL_VIDEO_BASE 0x00028000 -+#define RP1_UART0_BASE 0x00030000 -+#define RP1_UART1_BASE 0x00034000 -+#define RP1_UART2_BASE 0x00038000 -+#define RP1_UART3_BASE 0x0003c000 -+#define RP1_UART4_BASE 0x00040000 -+#define RP1_UART5_BASE 0x00044000 -+#define RP1_SPI8_BASE 0x0004c000 -+#define RP1_SPI0_BASE 0x00050000 -+#define RP1_SPI1_BASE 0x00054000 -+#define RP1_SPI2_BASE 0x00058000 -+#define RP1_SPI3_BASE 0x0005c000 -+#define RP1_SPI4_BASE 0x00060000 -+#define RP1_SPI5_BASE 0x00064000 -+#define RP1_SPI6_BASE 0x00068000 -+#define RP1_SPI7_BASE 0x0006c000 -+#define RP1_I2C0_BASE 0x00070000 -+#define RP1_I2C1_BASE 0x00074000 -+#define RP1_I2C2_BASE 0x00078000 -+#define RP1_I2C3_BASE 0x0007c000 -+#define RP1_I2C4_BASE 0x00080000 -+#define RP1_I2C5_BASE 0x00084000 -+#define RP1_I2C6_BASE 0x00088000 -+#define RP1_AUDIO_IN_BASE 0x00090000 -+#define RP1_AUDIO_OUT_BASE 0x00094000 -+#define RP1_PWM0_BASE 0x00098000 -+#define RP1_PWM1_BASE 0x0009c000 -+#define RP1_I2S0_BASE 0x000a0000 -+#define RP1_I2S1_BASE 0x000a4000 -+#define RP1_I2S2_BASE 0x000a8000 -+#define RP1_TIMER_BASE 0x000ac000 -+#define RP1_SDIO0_CFG_BASE 0x000b0000 -+#define RP1_SDIO1_CFG_BASE 0x000b4000 -+#define RP1_BUSFABRIC_MONITOR_BASE 0x000c0000 -+#define RP1_BUSFABRIC_AXISHIM_BASE 0x000c4000 -+#define RP1_ADC_BASE 0x000c8000 -+#define RP1_IO_BANK0_BASE 0x000d0000 -+#define RP1_IO_BANK1_BASE 0x000d4000 -+#define RP1_IO_BANK2_BASE 0x000d8000 -+#define RP1_SYS_RIO0_BASE 0x000e0000 -+#define RP1_SYS_RIO1_BASE 0x000e4000 -+#define RP1_SYS_RIO2_BASE 0x000e8000 -+#define RP1_PADS_BANK0_BASE 0x000f0000 -+#define RP1_PADS_BANK1_BASE 0x000f4000 -+#define RP1_PADS_BANK2_BASE 0x000f8000 -+#define RP1_PADS_ETH_BASE 0x000fc000 -+#define RP1_ETH_BASE 0x00100000 -+#define RP1_ETH_CFG_BASE 0x00104000 -+#define RP1_PCIE_BASE 0x00108000 -+#define RP1_MIPI0_CSIDMA_BASE 0x00110000 -+#define RP1_MIPI0_CSIHOST_BASE 0x00114000 -+#define RP1_MIPI0_DSIDMA_BASE 0x00118000 -+#define RP1_MIPI0_DSIHOST_BASE 0x0011c000 -+#define RP1_MIPI0_CFG_BASE 0x00120000 -+#define RP1_MIPI0_ISP_BASE 0x00124000 -+#define RP1_MIPI1_CSIDMA_BASE 0x00128000 -+#define RP1_MIPI1_CSIHOST_BASE 0x0012c000 -+#define RP1_MIPI1_DSIDMA_BASE 0x00130000 -+#define RP1_MIPI1_DSIHOST_BASE 0x00134000 -+#define RP1_MIPI1_CFG_BASE 0x00138000 -+#define RP1_MIPI1_ISP_BASE 0x0013c000 -+#define RP1_VIDEO_OUT_CFG_BASE 0x00140000 -+#define RP1_VIDEO_OUT_VEC_BASE 0x00144000 -+#define RP1_VIDEO_OUT_DPI_BASE 0x00148000 -+#define RP1_XOSC_BASE 0x00150000 -+#define RP1_WATCHDOG_BASE 0x00154000 -+#define RP1_DMA_TICK_BASE 0x00158000 -+#define RP1_USBHOST0_CFG_BASE 0x00160000 -+#define RP1_USBHOST1_CFG_BASE 0x00164000 -+#define RP1_ROSC0_BASE 0x00168000 -+#define RP1_ROSC1_BASE 0x0016c000 -+#define RP1_VBUSCTRL_BASE 0x00170000 -+#define RP1_TICKS_BASE 0x00174000 -+#define RP1_PIO_BASE 0x00178000 -+#define RP1_SDIO0_BASE 0x00180000 -+#define RP1_SDIO1_BASE 0x00184000 -+#define RP1_DMA_BASE 0x00188000 -+#define RP1_USBHOST0_BASE 0x00200000 -+#define RP1_USBHOST1_BASE 0x00300000 -+#define RP1_EXAC_BASE 0x00400000 -+ -+#define RP1_USBHOST_SIZE 0x00100000 -+ -+// -+// Local MSI-X vectors -+// -+#define RP1_INT_IO_BANK0 0 -+#define RP1_INT_IO_BANK1 1 -+#define RP1_INT_IO_BANK2 2 -+#define RP1_INT_AUDIO_IN 3 -+#define RP1_INT_AUDIO_OUT 4 -+#define RP1_INT_PWM0 5 -+#define RP1_INT_ETH 6 -+#define RP1_INT_I2C0 7 -+#define RP1_INT_I2C1 8 -+#define RP1_INT_I2C2 9 -+#define RP1_INT_I2C3 10 -+#define RP1_INT_I2C4 11 -+#define RP1_INT_I2C5 12 -+#define RP1_INT_I2C6 13 -+#define RP1_INT_I2S0 14 -+#define RP1_INT_I2S1 15 -+#define RP1_INT_I2S2 16 -+#define RP1_INT_SDIO0 17 -+#define RP1_INT_SDIO1 18 -+#define RP1_INT_SPI0 19 -+#define RP1_INT_SPI1 20 -+#define RP1_INT_SPI2 21 -+#define RP1_INT_SPI3 22 -+#define RP1_INT_SPI4 23 -+#define RP1_INT_SPI5 24 -+#define RP1_INT_UART0 25 -+#define RP1_INT_TIMER_0 26 -+#define RP1_INT_TIMER_1 27 -+#define RP1_INT_TIMER_2 28 -+#define RP1_INT_TIMER_3 29 -+#define RP1_INT_USBHOST0 30 -+#define RP1_INT_USBHOST0_0 31 -+#define RP1_INT_USBHOST0_1 32 -+#define RP1_INT_USBHOST0_2 33 -+#define RP1_INT_USBHOST0_3 34 -+#define RP1_INT_USBHOST1 35 -+#define RP1_INT_USBHOST1_0 36 -+#define RP1_INT_USBHOST1_1 37 -+#define RP1_INT_USBHOST1_2 38 -+#define RP1_INT_USBHOST1_3 39 -+#define RP1_INT_DMA 40 -+#define RP1_INT_PWM1 41 -+#define RP1_INT_UART1 42 -+#define RP1_INT_UART2 43 -+#define RP1_INT_UART3 44 -+#define RP1_INT_UART4 45 -+#define RP1_INT_UART5 46 -+#define RP1_INT_MIPI0 47 -+#define RP1_INT_MIPI1 48 -+#define RP1_INT_VIDEO_OUT 49 -+#define RP1_INT_PIO_0 50 -+#define RP1_INT_PIO_1 51 -+#define RP1_INT_ADC_FIFO 52 -+#define RP1_INT_PCIE_OUT 53 -+#define RP1_INT_SPI6 54 -+#define RP1_INT_SPI7 55 -+#define RP1_INT_SPI8 56 -+#define RP1_INT_PROC_MISC 57 -+#define RP1_INT_SYSCFG 58 -+#define RP1_INT_CLOCKS_DEFAULT 59 -+#define RP1_INT_VBUSCTRL 60 -+ -+// -+// System information registers -+// -+#define RP1_SYSINFO_CHIP_ID 0x0 -+ -+// -+// PCIe endpoint configuration registers -+// -+#define RP1_PCIE_REG_RW (RP1_PCIE_BASE + 0x000) -+#define RP1_PCIE_REG_SET (RP1_PCIE_BASE + 0x800) -+#define RP1_PCIE_REG_CLR (RP1_PCIE_BASE + 0xc00) -+ -+// MSI-X vectors configuration -+#define RP1_PCIE_MSIX_CFG(Irq) (0x008 + ((Irq) * 4)) -+#define RP1_PCIE_MSIX_CFG_IACK_EN BIT3 -+#define RP1_PCIE_MSIX_CFG_IACK BIT2 -+#define RP1_PCIE_MSIX_CFG_TEST BIT1 -+#define RP1_PCIE_MSIX_CFG_ENABLE BIT0 -+ -+#endif // __RP1_H__ -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec b/Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec -new file mode 100644 -index 00000000..d66041e0 ---- /dev/null -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec -@@ -0,0 +1,22 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ DEC_SPECIFICATION = 0x0001001A -+ PACKAGE_NAME = RpiSiliconPkg -+ PACKAGE_GUID = 6dd4364e-9b8a-449e-b0a7-60095c5a0f15 -+ PACKAGE_VERSION = 1.0 -+ -+[Includes] -+ Include -+ -+[Guids] -+ gRpiSiliconTokenSpaceGuid = { 0x0b3ce57a, 0xa82b, 0x4ada, { 0x8f, 0xb5, 0x52, 0xc8, 0x72, 0x30, 0x1f, 0xdb } } -+ -+[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] -+ gRpiSiliconTokenSpaceGuid.Rp1PciPeripheralsBar|0x0|UINT64|0x00000001 --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0006-Silicon-Bcm2712-Add-GPIO-support-library.patch b/packages/edk2/patches/platforms/0006-Silicon-Bcm2712-Add-GPIO-support-library.patch deleted file mode 100644 index e6ae477..0000000 --- a/packages/edk2/patches/platforms/0006-Silicon-Bcm2712-Add-GPIO-support-library.patch +++ /dev/null @@ -1,1346 +0,0 @@ -From 297f8d44c47ba57b6a7f205a502cc34210050a7a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 29 Dec 2023 04:17:13 +0200 -Subject: [PATCH 06/16] Silicon/Bcm2712: Add GPIO support library -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Mario Bălănică ---- - .../Include/IndustryStandard/Bcm2712.h | 22 + - .../Include/IndustryStandard/Bcm2712Pinctrl.h | 764 ++++++++++++++++++ - .../Bcm27xx/Include/Library/Bcm2712GpioLib.h | 103 +++ - .../Library/Bcm2712GpioLib/Bcm2712GpioLib.c | 375 +++++++++ - .../Library/Bcm2712GpioLib/Bcm2712GpioLib.inf | 26 + - 5 files changed, 1290 insertions(+) - create mode 100644 Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h - create mode 100644 Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pinctrl.h - create mode 100644 Silicon/Broadcom/Bcm27xx/Include/Library/Bcm2712GpioLib.h - create mode 100644 Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.c - create mode 100644 Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.inf - -diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -new file mode 100644 -index 00000000..a0d3e850 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -@@ -0,0 +1,22 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BCM2712_H__ -+#define __BCM2712_H__ -+ -+#define BCM2712_BRCMSTB_GIO_BASE 0x107d508500 -+#define BCM2712_BRCMSTB_GIO_LENGTH 0x40 -+#define BCM2712_BRCMSTB_GIO_AON_BASE 0x107d517c00 -+#define BCM2712_BRCMSTB_GIO_AON_LENGTH 0x40 -+ -+#define BCM2712_PINCTRL_BASE 0x107d504100 -+#define BCM2712_PINCTRL_LENGTH 0x30 -+#define BCM2712_PINCTRL_AON_BASE 0x107d510700 -+#define BCM2712_PINCTRL_AON_LENGTH 0x20 -+ -+#endif // __BCM2712_H__ -diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pinctrl.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pinctrl.h -new file mode 100644 -index 00000000..12c47999 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pinctrl.h -@@ -0,0 +1,764 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BCM2712_PINCTRL_H__ -+#define __BCM2712_PINCTRL_H__ -+ -+// -+// Supported Alternate Pin Functions -+// -+ -+// -+// General Input/Output (GIO) -+// -+typedef enum { -+ GIO_PIN0_ALT_BSC_M3 = 1, -+ GIO_PIN0_ALT_VC_I2C0, -+ GIO_PIN0_ALT_GPCLK0, -+ GIO_PIN0_ALT_ENET0, -+ GIO_PIN0_ALT_VC_PWM1, -+ GIO_PIN0_ALT_VC_SPI0, -+ GIO_PIN0_ALT_IR_IN, -+} GIO_PIN0_ALT; -+ -+typedef enum { -+ GIO_PIN1_ALT_BSC_M3 = 1, -+ GIO_PIN1_ALT_VC_I2C0, -+ GIO_PIN1_ALT_GPCLK1, -+ GIO_PIN1_ALT_ENET0, -+ GIO_PIN1_ALT_VC_PWM1, -+ GIO_PIN1_ALT_SR_EDM_SENSE, -+ GIO_PIN1_ALT_VC_SPI0, -+ GIO_PIN1_ALT_VC_UART3, -+} GIO_PIN1_ALT; -+ -+typedef enum { -+ GIO_PIN2_ALT_PDM = 1, -+ GIO_PIN2_ALT_I2S_IN, -+ GIO_PIN2_ALT_GPCLK2, -+ GIO_PIN2_ALT_VC_SPI4, -+ GIO_PIN2_ALT_PKT, -+ GIO_PIN2_ALT_VC_SPI0, -+ GIO_PIN2_ALT_VC_UART3, -+} GIO_PIN2_ALT; -+ -+typedef enum { -+ GIO_PIN3_ALT_PDM = 1, -+ GIO_PIN3_ALT_I2S_IN, -+ GIO_PIN3_ALT_VC_SPI4, -+ GIO_PIN3_ALT_PKT, -+ GIO_PIN3_ALT_VC_SPI0, -+ GIO_PIN3_ALT_VC_UART3, -+} GIO_PIN3_ALT; -+ -+typedef enum { -+ GIO_PIN4_ALT_PDM = 1, -+ GIO_PIN4_ALT_I2S_IN, -+ GIO_PIN4_ALT_ARM_JTAG, -+ GIO_PIN4_ALT_VC_SPI4, -+ GIO_PIN4_ALT_PKT, -+ GIO_PIN4_ALT_VC_SPI0, -+ GIO_PIN4_ALT_VC_UART3, -+} GIO_PIN4_ALT; -+ -+typedef enum { -+ GIO_PIN5_ALT_PDM = 1, -+ GIO_PIN5_ALT_VC_I2C3, -+ GIO_PIN5_ALT_ARM_JTAG, -+ GIO_PIN5_ALT_SD_CARD_E, -+ GIO_PIN5_ALT_VC_SPI4, -+ GIO_PIN5_ALT_PKT, -+ GIO_PIN5_ALT_VC_PCM, -+ GIO_PIN5_ALT_VC_I2C5, -+} GIO_PIN5_ALT; -+ -+typedef enum { -+ GIO_PIN6_ALT_PDM = 1, -+ GIO_PIN6_ALT_VC_I2C3, -+ GIO_PIN6_ALT_ARM_JTAG, -+ GIO_PIN6_ALT_SD_CARD_E, -+ GIO_PIN6_ALT_VC_SPI4, -+ GIO_PIN6_ALT_PKT, -+ GIO_PIN6_ALT_VC_PCM, -+ GIO_PIN6_ALT_VC_I2C5, -+} GIO_PIN6_ALT; -+ -+typedef enum { -+ GIO_PIN7_ALT_I2S_OUT = 1, -+ GIO_PIN7_ALT_SPDIF_OUT, -+ GIO_PIN7_ALT_ARM_JTAG, -+ GIO_PIN7_ALT_SD_CARD_E, -+ GIO_PIN7_ALT_VC_I2C3, -+ GIO_PIN7_ALT_ENET0_RGMII, -+ GIO_PIN7_ALT_VC_PCM, -+ GIO_PIN7_ALT_VC_SPI4, -+} GIO_PIN7_ALT; -+ -+typedef enum { -+ GIO_PIN8_ALT_I2S_OUT = 1, -+ GIO_PIN8_ALT_AUD_FS_CLK0, -+ GIO_PIN8_ALT_ARM_JTAG, -+ GIO_PIN8_ALT_SD_CARD_E, -+ GIO_PIN8_ALT_VC_I2C3, -+ GIO_PIN8_ALT_ENET0_MII, -+ GIO_PIN8_ALT_VC_PCM, -+ GIO_PIN8_ALT_VC_SPI4, -+} GIO_PIN8_ALT; -+ -+typedef enum { -+ GIO_PIN9_ALT_I2S_OUT = 1, -+ GIO_PIN9_ALT_AUD_FS_CLK0, -+ GIO_PIN9_ALT_ARM_JTAG, -+ GIO_PIN9_ALT_SD_CARD_E, -+ GIO_PIN9_ALT_ENET0_MII, -+ GIO_PIN9_ALT_SD_CARD_C, -+ GIO_PIN9_ALT_VC_SPI4, -+} GIO_PIN9_ALT; -+ -+typedef enum { -+ GIO_PIN10_ALT_BSC_M3 = 1, -+ GIO_PIN10_ALT_MTSIF_ALT1, -+ GIO_PIN10_ALT_I2S_IN, -+ GIO_PIN10_ALT_I2S_OUT, -+ GIO_PIN10_ALT_VC_SPI5, -+ GIO_PIN10_ALT_ENET0_MII, -+ GIO_PIN10_ALT_SD_CARD_C, -+ GIO_PIN10_ALT_VC_SPI4, -+} GIO_PIN10_ALT; -+ -+typedef enum { -+ GIO_PIN11_ALT_BSC_M3 = 1, -+ GIO_PIN11_ALT_MTSIF_ALT1, -+ GIO_PIN11_ALT_I2S_IN, -+ GIO_PIN11_ALT_I2S_OUT, -+ GIO_PIN11_ALT_VC_SPI5, -+ GIO_PIN11_ALT_ENET0_MII, -+ GIO_PIN11_ALT_SD_CARD_C, -+ GIO_PIN11_ALT_VC_SPI4, -+} GIO_PIN11_ALT; -+ -+typedef enum { -+ GIO_PIN12_ALT_SPI_S = 1, -+ GIO_PIN12_ALT_MTSIF_ALT1, -+ GIO_PIN12_ALT_I2S_IN, -+ GIO_PIN12_ALT_I2S_OUT, -+ GIO_PIN12_ALT_VC_SPI5, -+ GIO_PIN12_ALT_VC_I2CSL, -+ GIO_PIN12_ALT_SD0, -+ GIO_PIN12_ALT_SD_CARD_D, -+} GIO_PIN12_ALT; -+ -+typedef enum { -+ GIO_PIN13_ALT_SPI_S = 1, -+ GIO_PIN13_ALT_MTSIF_ALT1, -+ GIO_PIN13_ALT_I2S_OUT, -+ GIO_PIN13_ALT_USB_VBUS, -+ GIO_PIN13_ALT_VC_SPI5, -+ GIO_PIN13_ALT_VC_I2CSL, -+ GIO_PIN13_ALT_SD0, -+ GIO_PIN13_ALT_SD_CARD_D, -+} GIO_PIN13_ALT; -+ -+typedef enum { -+ GIO_PIN14_ALT_SPI_S = 1, -+ GIO_PIN14_ALT_VC_I2CSL, -+ GIO_PIN14_ALT_ENET0_RGMII, -+ GIO_PIN14_ALT_ARM_JTAG, -+ GIO_PIN14_ALT_VC_SPI5, -+ GIO_PIN14_ALT_VC_PWM0, -+ GIO_PIN14_ALT_VC_I2C4, -+ GIO_PIN14_ALT_SD_CARD_D, -+} GIO_PIN14_ALT; -+ -+typedef enum { -+ GIO_PIN15_ALT_SPI_S = 1, -+ GIO_PIN15_ALT_VC_I2CSL, -+ GIO_PIN15_ALT_VC_SPI3, -+ GIO_PIN15_ALT_ARM_JTAG, -+ GIO_PIN15_ALT_VC_PWM0, -+ GIO_PIN15_ALT_VC_I2C4, -+ GIO_PIN15_ALT_GPCLK0, -+} GIO_PIN15_ALT; -+ -+typedef enum { -+ GIO_PIN16_ALT_SD_CARD_B = 1, -+ GIO_PIN16_ALT_I2S_OUT, -+ GIO_PIN16_ALT_VC_SPI3, -+ GIO_PIN16_ALT_I2S_IN, -+ GIO_PIN16_ALT_SD0, -+ GIO_PIN16_ALT_ENET0_RGMII, -+ GIO_PIN16_ALT_GPCLK1, -+} GIO_PIN16_ALT; -+ -+typedef enum { -+ GIO_PIN17_ALT_SD_CARD_B = 1, -+ GIO_PIN17_ALT_I2S_OUT, -+ GIO_PIN17_ALT_VC_SPI3, -+ GIO_PIN17_ALT_I2S_IN, -+ GIO_PIN17_ALT_EXT_SC_CLK, -+ GIO_PIN17_ALT_SD0, -+ GIO_PIN17_ALT_ENET0_RGMII, -+ GIO_PIN17_ALT_GPCLK2, -+} GIO_PIN17_ALT; -+ -+typedef enum { -+ GIO_PIN18_ALT_SD_CARD_B = 1, -+ GIO_PIN18_ALT_I2S_OUT, -+ GIO_PIN18_ALT_VC_SPI3, -+ GIO_PIN18_ALT_I2S_IN, -+ GIO_PIN18_ALT_SD0, -+ GIO_PIN18_ALT_ENET0_RGMII, -+ GIO_PIN18_ALT_VC_PWM1, -+} GIO_PIN18_ALT; -+ -+typedef enum { -+ GIO_PIN19_ALT_SD_CARD_B = 1, -+ GIO_PIN19_ALT_USB_PWR, -+ GIO_PIN19_ALT_VC_SPI3, -+ GIO_PIN19_ALT_PKT, -+ GIO_PIN19_ALT_SPDIF_OUT, -+ GIO_PIN19_ALT_SD0, -+ GIO_PIN19_ALT_IR_IN, -+ GIO_PIN19_ALT_VC_PWM1, -+} GIO_PIN19_ALT; -+ -+typedef enum { -+ GIO_PIN20_ALT_SD_CARD_B = 1, -+ GIO_PIN20_ALT_UUI, -+ GIO_PIN20_ALT_VC_UART0, -+ GIO_PIN20_ALT_ARM_JTAG, -+ GIO_PIN20_ALT_UART2, -+ GIO_PIN20_ALT_USB_PWR, -+ GIO_PIN20_ALT_VC_PCM, -+ GIO_PIN20_ALT_VC_UART4, -+} GIO_PIN20_ALT; -+ -+typedef enum { -+ GIO_PIN21_ALT_USB_PWR = 1, -+ GIO_PIN21_ALT_UUI, -+ GIO_PIN21_ALT_VC_UART0, -+ GIO_PIN21_ALT_ARM_JTAG, -+ GIO_PIN21_ALT_UART2, -+ GIO_PIN21_ALT_SD_CARD_B, -+ GIO_PIN21_ALT_VC_PCM, -+ GIO_PIN21_ALT_VC_UART4, -+} GIO_PIN21_ALT; -+ -+typedef enum { -+ GIO_PIN22_ALT_USB_PWR = 1, -+ GIO_PIN22_ALT_ENET0, -+ GIO_PIN22_ALT_VC_UART0, -+ GIO_PIN22_ALT_MTSIF, -+ GIO_PIN22_ALT_UART2, -+ GIO_PIN22_ALT_USB_VBUS, -+ GIO_PIN22_ALT_VC_PCM, -+ GIO_PIN22_ALT_VC_I2C5, -+} GIO_PIN22_ALT; -+ -+typedef enum { -+ GIO_PIN23_ALT_USB_VBUS = 1, -+ GIO_PIN23_ALT_ENET0, -+ GIO_PIN23_ALT_VC_UART0, -+ GIO_PIN23_ALT_MTSIF, -+ GIO_PIN23_ALT_UART2, -+ GIO_PIN23_ALT_I2S_OUT, -+ GIO_PIN23_ALT_VC_PCM, -+ GIO_PIN23_ALT_VC_I2C5, -+} GIO_PIN23_ALT; -+ -+typedef enum { -+ GIO_PIN24_ALT_MTSIF = 1, -+ GIO_PIN24_ALT_PKT, -+ GIO_PIN24_ALT_UART0, -+ GIO_PIN24_ALT_ENET0_RGMII, -+ GIO_PIN24_ALT_ENET0_RGMII_2, -+ GIO_PIN24_ALT_VC_I2C4, -+ GIO_PIN24_ALT_VC_UART3, -+} GIO_PIN24_ALT; -+ -+typedef enum { -+ GIO_PIN25_ALT_MTSIF = 1, -+ GIO_PIN25_ALT_PKT, -+ GIO_PIN25_ALT_SC0, -+ GIO_PIN25_ALT_UART0, -+ GIO_PIN25_ALT_ENET0_RGMII, -+ GIO_PIN25_ALT_ENET0_RGMII_2, -+ GIO_PIN25_ALT_VC_I2C4, -+ GIO_PIN25_ALT_VC_UART3, -+} GIO_PIN25_ALT; -+ -+typedef enum { -+ GIO_PIN26_ALT_MTSIF = 1, -+ GIO_PIN26_ALT_PKT, -+ GIO_PIN26_ALT_SC0, -+ GIO_PIN26_ALT_UART0, -+ GIO_PIN26_ALT_ENET0_RGMII, -+ GIO_PIN26_ALT_VC_UART4, -+ GIO_PIN26_ALT_VC_SPI5, -+} GIO_PIN26_ALT; -+ -+typedef enum { -+ GIO_PIN27_ALT_MTSIF = 1, -+ GIO_PIN27_ALT_PKT, -+ GIO_PIN27_ALT_SC0, -+ GIO_PIN27_ALT_UART0, -+ GIO_PIN27_ALT_ENET0_RGMII, -+ GIO_PIN27_ALT_VC_UART4, -+ GIO_PIN27_ALT_VC_SPI5, -+} GIO_PIN27_ALT; -+ -+typedef enum { -+ GIO_PIN28_ALT_MTSIF = 1, -+ GIO_PIN28_ALT_PKT, -+ GIO_PIN28_ALT_SC0, -+ GIO_PIN28_ALT_ENET0_RGMII, -+ GIO_PIN28_ALT_VC_UART4, -+ GIO_PIN28_ALT_VC_SPI5, -+} GIO_PIN28_ALT; -+ -+typedef enum { -+ GIO_PIN29_ALT_MTSIF = 1, -+ GIO_PIN29_ALT_PKT, -+ GIO_PIN29_ALT_SC0, -+ GIO_PIN29_ALT_ENET0_RGMII, -+ GIO_PIN29_ALT_VC_UART4, -+ GIO_PIN29_ALT_VC_SPI5, -+} GIO_PIN29_ALT; -+ -+typedef enum { -+ GIO_PIN30_ALT_MTSIF = 1, -+ GIO_PIN30_ALT_PKT, -+ GIO_PIN30_ALT_SC0, -+ GIO_PIN30_ALT_SD2, -+ GIO_PIN30_ALT_ENET0_RGMII, -+ GIO_PIN30_ALT_GPCLK0, -+ GIO_PIN30_ALT_VC_PWM0, -+} GIO_PIN30_ALT; -+ -+typedef enum { -+ GIO_PIN31_ALT_MTSIF = 1, -+ GIO_PIN31_ALT_PKT, -+ GIO_PIN31_ALT_SC0, -+ GIO_PIN31_ALT_SD2, -+ GIO_PIN31_ALT_ENET0_RGMII, -+ GIO_PIN31_ALT_VC_SPI3, -+ GIO_PIN31_ALT_VC_PWM0, -+} GIO_PIN31_ALT; -+ -+typedef enum { -+ GIO_PIN32_ALT_MTSIF = 1, -+ GIO_PIN32_ALT_PKT, -+ GIO_PIN32_ALT_SC0, -+ GIO_PIN32_ALT_SD2, -+ GIO_PIN32_ALT_ENET0_RGMII, -+ GIO_PIN32_ALT_VC_SPI3, -+ GIO_PIN32_ALT_VC_UART3, -+} GIO_PIN32_ALT; -+ -+typedef enum { -+ GIO_PIN33_ALT_MTSIF = 1, -+ GIO_PIN33_ALT_PKT, -+ GIO_PIN33_ALT_SD2, -+ GIO_PIN33_ALT_ENET0_RGMII, -+ GIO_PIN33_ALT_VC_SPI3, -+ GIO_PIN33_ALT_VC_UART3, -+} GIO_PIN33_ALT; -+ -+typedef enum { -+ GIO_PIN34_ALT_MTSIF = 1, -+ GIO_PIN34_ALT_PKT, -+ GIO_PIN34_ALT_EXT_SC_CLK, -+ GIO_PIN34_ALT_SD2, -+ GIO_PIN34_ALT_ENET0_RGMII, -+ GIO_PIN34_ALT_VC_SPI3, -+ GIO_PIN34_ALT_VC_I2C5, -+} GIO_PIN34_ALT; -+ -+typedef enum { -+ GIO_PIN35_ALT_MTSIF = 1, -+ GIO_PIN35_ALT_PKT, -+ GIO_PIN35_ALT_SD2, -+ GIO_PIN35_ALT_ENET0_RGMII, -+ GIO_PIN35_ALT_VC_SPI3, -+ GIO_PIN35_ALT_VC_I2C5, -+} GIO_PIN35_ALT; -+ -+typedef enum { -+ GIO_PIN36_ALT_SD0 = 1, -+ GIO_PIN36_ALT_MTSIF, -+ GIO_PIN36_ALT_SC0, -+ GIO_PIN36_ALT_I2S_IN, -+ GIO_PIN36_ALT_VC_UART3, -+ GIO_PIN36_ALT_VC_UART2, -+} GIO_PIN36_ALT; -+ -+typedef enum { -+ GIO_PIN37_ALT_SD0 = 1, -+ GIO_PIN37_ALT_MTSIF, -+ GIO_PIN37_ALT_SC0, -+ GIO_PIN37_ALT_VC_SPI0, -+ GIO_PIN37_ALT_I2S_IN, -+ GIO_PIN37_ALT_VC_UART3, -+ GIO_PIN37_ALT_VC_UART2, -+} GIO_PIN37_ALT; -+ -+typedef enum { -+ GIO_PIN38_ALT_SD0 = 1, -+ GIO_PIN38_ALT_MTSIF_ALT, -+ GIO_PIN38_ALT_SC0, -+ GIO_PIN38_ALT_VC_SPI0, -+ GIO_PIN38_ALT_I2S_IN, -+ GIO_PIN38_ALT_VC_UART3, -+ GIO_PIN38_ALT_VC_UART2, -+} GIO_PIN38_ALT; -+ -+typedef enum { -+ GIO_PIN39_ALT_SD0 = 1, -+ GIO_PIN39_ALT_MTSIF_ALT, -+ GIO_PIN39_ALT_SC0, -+ GIO_PIN39_ALT_VC_SPI0, -+ GIO_PIN39_ALT_VC_UART3, -+ GIO_PIN39_ALT_VC_UART2, -+} GIO_PIN39_ALT; -+ -+typedef enum { -+ GIO_PIN40_ALT_SD0 = 1, -+ GIO_PIN40_ALT_MTSIF_ALT, -+ GIO_PIN40_ALT_SC0, -+ GIO_PIN40_ALT_VC_SPI0, -+ GIO_PIN40_ALT_BSC_M3, -+} GIO_PIN40_ALT; -+ -+typedef enum { -+ GIO_PIN41_ALT_SD0 = 1, -+ GIO_PIN41_ALT_MTSIF_ALT, -+ GIO_PIN41_ALT_SC0, -+ GIO_PIN41_ALT_VC_SPI0, -+ GIO_PIN41_ALT_BSC_M3, -+} GIO_PIN41_ALT; -+ -+typedef enum { -+ GIO_PIN42_ALT_VC_SPI0 = 1, -+ GIO_PIN42_ALT_MTSIF_ALT, -+ GIO_PIN42_ALT_VC_I2C0, -+ GIO_PIN42_ALT_SD_CARD_A, -+ GIO_PIN42_ALT_MTSIF_ALT1, -+ GIO_PIN42_ALT_ARM_JTAG, -+ GIO_PIN42_ALT_PDM, -+ GIO_PIN42_ALT_SPI_M, -+} GIO_PIN42_ALT; -+ -+typedef enum { -+ GIO_PIN43_ALT_VC_SPI0 = 1, -+ GIO_PIN43_ALT_MTSIF_ALT, -+ GIO_PIN43_ALT_VC_I2C0, -+ GIO_PIN43_ALT_SD_CARD_A, -+ GIO_PIN43_ALT_MTSIF_ALT1, -+ GIO_PIN43_ALT_ARM_JTAG, -+ GIO_PIN43_ALT_PDM, -+ GIO_PIN43_ALT_SPI_M, -+} GIO_PIN43_ALT; -+ -+typedef enum { -+ GIO_PIN44_ALT_VC_SPI0 = 1, -+ GIO_PIN44_ALT_MTSIF_ALT, -+ GIO_PIN44_ALT_ENET0, -+ GIO_PIN44_ALT_SD_CARD_A, -+ GIO_PIN44_ALT_MTSIF_ALT1, -+ GIO_PIN44_ALT_ARM_JTAG, -+ GIO_PIN44_ALT_PDM, -+ GIO_PIN44_ALT_SPI_M, -+} GIO_PIN44_ALT; -+ -+typedef enum { -+ GIO_PIN45_ALT_VC_SPI0 = 1, -+ GIO_PIN45_ALT_MTSIF_ALT, -+ GIO_PIN45_ALT_ENET0, -+ GIO_PIN45_ALT_SD_CARD_A, -+ GIO_PIN45_ALT_MTSIF_ALT1, -+ GIO_PIN45_ALT_ARM_JTAG, -+ GIO_PIN45_ALT_PDM, -+ GIO_PIN45_ALT_SPI_M, -+} GIO_PIN45_ALT; -+ -+typedef enum { -+ GIO_PIN46_ALT_VC_SPI0 = 1, -+ GIO_PIN46_ALT_MTSIF_ALT, -+ GIO_PIN46_ALT_SD_CARD_A, -+ GIO_PIN46_ALT_MTSIF_ALT1, -+ GIO_PIN46_ALT_ARM_JTAG, -+ GIO_PIN46_ALT_PDM, -+ GIO_PIN46_ALT_SPI_M, -+} GIO_PIN46_ALT; -+ -+typedef enum { -+ GIO_PIN47_ALT_ENET0 = 1, -+ GIO_PIN47_ALT_MTSIF_ALT, -+ GIO_PIN47_ALT_I2S_OUT, -+ GIO_PIN47_ALT_MTSIF_ALT1, -+ GIO_PIN47_ALT_ARM_JTAG, -+} GIO_PIN47_ALT; -+ -+typedef enum { -+ GIO_PIN48_ALT_SC0 = 1, -+ GIO_PIN48_ALT_USB_PWR, -+ GIO_PIN48_ALT_SPDIF_OUT, -+ GIO_PIN48_ALT_MTSIF, -+} GIO_PIN48_ALT; -+ -+typedef enum { -+ GIO_PIN49_ALT_SC0 = 1, -+ GIO_PIN49_ALT_USB_PWR, -+ GIO_PIN49_ALT_AUD_FS_CLK0, -+ GIO_PIN49_ALT_MTSIF, -+} GIO_PIN49_ALT; -+ -+typedef enum { -+ GIO_PIN50_ALT_SC0 = 1, -+ GIO_PIN50_ALT_USB_VBUS, -+ GIO_PIN50_ALT_SC0_2, -+} GIO_PIN50_ALT; -+ -+typedef enum { -+ GIO_PIN51_ALT_SC0 = 1, -+ GIO_PIN51_ALT_ENET0, -+ GIO_PIN51_ALT_SC0_2, -+ GIO_PIN51_ALT_SR_EDM_SENSE, -+} GIO_PIN51_ALT; -+ -+typedef enum { -+ GIO_PIN52_ALT_SC0 = 1, -+ GIO_PIN52_ALT_ENET0, -+ GIO_PIN52_ALT_VC_PWM1, -+} GIO_PIN52_ALT; -+ -+typedef enum { -+ GIO_PIN53_ALT_SC0 = 1, -+ GIO_PIN53_ALT_ENET0_RGMII, -+ GIO_PIN53_ALT_EXT_SC_CLK, -+} GIO_PIN53_ALT; -+ -+// -+// General Input/Output Always ON (GIO AON) -+// -+typedef enum { -+ GIO_AON_PIN0_ALT_IR_IN = 1, -+ GIO_AON_PIN0_ALT_VC_SPI0, -+ GIO_AON_PIN0_ALT_VC_UART3, -+ GIO_AON_PIN0_ALT_VC_I2C3, -+ GIO_AON_PIN0_ALT_TE0, -+ GIO_AON_PIN0_ALT_VC_I2C0, -+} GIO_AON_PIN0_ALT; -+ -+typedef enum { -+ GIO_AON_PIN1_ALT_VC_PWM0 = 1, -+ GIO_AON_PIN1_ALT_VC_SPI0, -+ GIO_AON_PIN1_ALT_VC_UART3, -+ GIO_AON_PIN1_ALT_VC_I2C3, -+ GIO_AON_PIN1_ALT_TE1, -+ GIO_AON_PIN1_ALT_AON_PWM, -+ GIO_AON_PIN1_ALT_VC_I2C0, -+ GIO_AON_PIN1_ALT_VC_PWM1, -+} GIO_AON_PIN1_ALT; -+ -+typedef enum { -+ GIO_AON_PIN2_ALT_VC_PWM0 = 1, -+ GIO_AON_PIN2_ALT_VC_SPI0, -+ GIO_AON_PIN2_ALT_VC_UART3, -+ GIO_AON_PIN2_ALT_CTL_HDMI_5V, -+ GIO_AON_PIN2_ALT_FL0, -+ GIO_AON_PIN2_ALT_AON_PWM, -+ GIO_AON_PIN2_ALT_IR_IN, -+ GIO_AON_PIN2_ALT_VC_PWM1, -+} GIO_AON_PIN2_ALT; -+ -+typedef enum { -+ GIO_AON_PIN3_ALT_IR_IN = 1, -+ GIO_AON_PIN3_ALT_VC_SPI0, -+ GIO_AON_PIN3_ALT_VC_UART3, -+ GIO_AON_PIN3_ALT_AON_FP_4SEC_RESETB, -+ GIO_AON_PIN3_ALT_FL1, -+ GIO_AON_PIN3_ALT_SD_CARD_G, -+ GIO_AON_PIN3_ALT_AON_GPCLK, -+} GIO_AON_PIN3_ALT; -+ -+typedef enum { -+ GIO_AON_PIN4_ALT_GPCLK0 = 1, -+ GIO_AON_PIN4_ALT_VC_SPI0, -+ GIO_AON_PIN4_ALT_VC_I2CSL, -+ GIO_AON_PIN4_ALT_AON_GPCLK, -+ GIO_AON_PIN4_ALT_PM_LED_OUT, -+ GIO_AON_PIN4_ALT_AON_PWM, -+ GIO_AON_PIN4_ALT_SD_CARD_G, -+ GIO_AON_PIN4_ALT_VC_PWM0, -+} GIO_AON_PIN4_ALT; -+ -+typedef enum { -+ GIO_AON_PIN5_ALT_GPCLK1 = 1, -+ GIO_AON_PIN5_ALT_IR_IN, -+ GIO_AON_PIN5_ALT_VC_I2CSL, -+ GIO_AON_PIN5_ALT_CLK_OBSERVE, -+ GIO_AON_PIN5_ALT_AON_PWM, -+ GIO_AON_PIN5_ALT_SD_CARD_G, -+ GIO_AON_PIN5_ALT_VC_PWM0, -+} GIO_AON_PIN5_ALT; -+ -+typedef enum { -+ GIO_AON_PIN6_ALT_UART1 = 1, -+ GIO_AON_PIN6_ALT_VC_UART4, -+ GIO_AON_PIN6_ALT_GPCLK2, -+ GIO_AON_PIN6_ALT_CTL_HDMI_5V, -+ GIO_AON_PIN6_ALT_VC_UART0, -+ GIO_AON_PIN6_ALT_VC_SPI3, -+} GIO_AON_PIN6_ALT; -+ -+typedef enum { -+ GIO_AON_PIN7_ALT_UART1 = 1, -+ GIO_AON_PIN7_ALT_VC_UART4, -+ GIO_AON_PIN7_ALT_GPCLK0, -+ GIO_AON_PIN7_ALT_AON_PWM, -+ GIO_AON_PIN7_ALT_VC_UART0, -+ GIO_AON_PIN7_ALT_VC_SPI3, -+} GIO_AON_PIN7_ALT; -+ -+typedef enum { -+ GIO_AON_PIN8_ALT_UART1 = 1, -+ GIO_AON_PIN8_ALT_VC_UART4, -+ GIO_AON_PIN8_ALT_VC_I2CSL, -+ GIO_AON_PIN8_ALT_CTL_HDMI_5V, -+ GIO_AON_PIN8_ALT_VC_UART0, -+ GIO_AON_PIN8_ALT_VC_SPI3, -+} GIO_AON_PIN8_ALT; -+ -+typedef enum { -+ GIO_AON_PIN9_ALT_UART1 = 1, -+ GIO_AON_PIN9_ALT_VC_UART4, -+ GIO_AON_PIN9_ALT_VC_I2CSL, -+ GIO_AON_PIN9_ALT_AON_PWM, -+ GIO_AON_PIN9_ALT_VC_UART0, -+ GIO_AON_PIN9_ALT_VC_SPI3, -+} GIO_AON_PIN9_ALT; -+ -+typedef enum { -+ GIO_AON_PIN10_ALT_TSIO = 1, -+ GIO_AON_PIN10_ALT_CTL_HDMI_5V, -+ GIO_AON_PIN10_ALT_SC0, -+ GIO_AON_PIN10_ALT_SPDIF_OUT, -+ GIO_AON_PIN10_ALT_VC_SPI5, -+ GIO_AON_PIN10_ALT_USB_PWR, -+ GIO_AON_PIN10_ALT_AON_GPCLK, -+ GIO_AON_PIN10_ALT_SD_CARD_F, -+} GIO_AON_PIN10_ALT; -+ -+typedef enum { -+ GIO_AON_PIN11_ALT_TSIO = 1, -+ GIO_AON_PIN11_ALT_UART0, -+ GIO_AON_PIN11_ALT_SC0, -+ GIO_AON_PIN11_ALT_AUD_FS_CLK0, -+ GIO_AON_PIN11_ALT_VC_SPI5, -+ GIO_AON_PIN11_ALT_USB_VBUS, -+ GIO_AON_PIN11_ALT_VC_UART2, -+ GIO_AON_PIN11_ALT_SD_CARD_F, -+} GIO_AON_PIN11_ALT; -+ -+typedef enum { -+ GIO_AON_PIN12_ALT_TSIO = 1, -+ GIO_AON_PIN12_ALT_UART0, -+ GIO_AON_PIN12_ALT_VC_UART0, -+ GIO_AON_PIN12_ALT_TSIO_2, -+ GIO_AON_PIN12_ALT_VC_SPI5, -+ GIO_AON_PIN12_ALT_USB_PWR, -+ GIO_AON_PIN12_ALT_VC_UART2, -+ GIO_AON_PIN12_ALT_SD_CARD_F, -+} GIO_AON_PIN12_ALT; -+ -+typedef enum { -+ GIO_AON_PIN13_ALT_BSC_M1 = 1, -+ GIO_AON_PIN13_ALT_UART0, -+ GIO_AON_PIN13_ALT_VC_UART0, -+ GIO_AON_PIN13_ALT_UUI, -+ GIO_AON_PIN13_ALT_VC_SPI5, -+ GIO_AON_PIN13_ALT_ARM_JTAG, -+ GIO_AON_PIN13_ALT_VC_UART2, -+ GIO_AON_PIN13_ALT_VC_I2C3, -+} GIO_AON_PIN13_ALT; -+ -+typedef enum { -+ GIO_AON_PIN14_ALT_BSC_M1 = 1, -+ GIO_AON_PIN14_ALT_UART0, -+ GIO_AON_PIN14_ALT_VC_UART0, -+ GIO_AON_PIN14_ALT_UUI, -+ GIO_AON_PIN14_ALT_VC_SPI5, -+ GIO_AON_PIN14_ALT_ARM_JTAG, -+ GIO_AON_PIN14_ALT_VC_UART2, -+ GIO_AON_PIN14_ALT_VC_I2C3, -+} GIO_AON_PIN14_ALT; -+ -+typedef enum { -+ GIO_AON_PIN15_ALT_IR_IN = 1, -+ GIO_AON_PIN15_ALT_AON_FP_4SEC_RESETB, -+ GIO_AON_PIN15_ALT_VC_UART0, -+ GIO_AON_PIN15_ALT_PM_LED_OUT, -+ GIO_AON_PIN15_ALT_CTL_HDMI_5V, -+ GIO_AON_PIN15_ALT_AON_PWM, -+ GIO_AON_PIN15_ALT_AON_GPCLK, -+} GIO_AON_PIN15_ALT; -+ -+typedef enum { -+ GIO_AON_PIN16_ALT_AON_CPU_STANDBYB = 1, -+ GIO_AON_PIN16_ALT_GPCLK0, -+ GIO_AON_PIN16_ALT_PM_LED_OUT, -+ GIO_AON_PIN16_ALT_CTL_HDMI_5V, -+ GIO_AON_PIN16_ALT_VC_PWM0, -+ GIO_AON_PIN16_ALT_USB_PWR, -+ GIO_AON_PIN16_ALT_AUD_FS_CLK0, -+} GIO_AON_PIN16_ALT; -+ -+typedef enum { -+ GIO_AON_PIN17_ALT_HDMI_TX0_BSC = 1, -+ GIO_AON_PIN17_ALT_HDMI_TX0_AUTO_I2C, -+ GIO_AON_PIN17_ALT_BSC_M0, -+ GIO_AON_PIN17_ALT_VC_I2C0, -+} GIO_AON_PIN17_ALT; -+ -+typedef enum { -+ GIO_AON_PIN18_ALT_HDMI_TX0_BSC = 1, -+ GIO_AON_PIN18_ALT_HDMI_TX0_AUTO_I2C, -+ GIO_AON_PIN18_ALT_BSC_M0, -+ GIO_AON_PIN18_ALT_VC_I2C0, -+} GIO_AON_PIN18_ALT; -+ -+typedef enum { -+ GIO_AON_PIN19_ALT_HDMI_TX1_BSC = 1, -+ GIO_AON_PIN19_ALT_HDMI_TX1_AUTO_I2C, -+ GIO_AON_PIN19_ALT_BSC_M1, -+ GIO_AON_PIN19_ALT_VC_I2C4, -+ GIO_AON_PIN19_ALT_CTL_HDMI_5V, -+} GIO_AON_PIN19_ALT; -+ -+typedef enum { -+ GIO_AON_PIN20_ALT_HDMI_TX1_BSC = 1, -+ GIO_AON_PIN20_ALT_HDMI_TX1_AUTO_I2C, -+ GIO_AON_PIN20_ALT_BSC_M1, -+ GIO_AON_PIN20_ALT_VC_I2C4, -+} GIO_AON_PIN20_ALT; -+ -+typedef enum { -+ GIO_AON_PIN21_ALT_AVS_PMU_BSC = 1, -+ GIO_AON_PIN21_ALT_BSC_M2, -+ GIO_AON_PIN21_ALT_VC_I2C5, -+ GIO_AON_PIN21_ALT_CTL_HDMI_5V, -+} GIO_AON_PIN21_ALT; -+ -+typedef enum { -+ GIO_AON_PIN22_ALT_AVS_PMU_BSC = 1, -+ GIO_AON_PIN22_ALT_BSC_M2, -+ GIO_AON_PIN22_ALT_VC_I2C5, -+} GIO_AON_PIN22_ALT; -+ -+#endif // __BCM2712_PINCTRL_H__ -diff --git a/Silicon/Broadcom/Bcm27xx/Include/Library/Bcm2712GpioLib.h b/Silicon/Broadcom/Bcm27xx/Include/Library/Bcm2712GpioLib.h -new file mode 100644 -index 00000000..6109fccc ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Include/Library/Bcm2712GpioLib.h -@@ -0,0 +1,103 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+ -+#ifndef __BCM2712_GPIO_LIB_H__ -+#define __BCM2712_GPIO_LIB_H__ -+ -+typedef enum { -+ BCM2712_GIO = 0, -+ BCM2712_GIO_AON, -+ BCM2712_GIO_COUNT -+} BCM2712_GPIO_TYPE; -+ -+typedef enum { -+ BCM2712_GPIO_ALT_IO = 0, -+ BCM2712_GPIO_ALT_1, -+ BCM2712_GPIO_ALT_2, -+ BCM2712_GPIO_ALT_3, -+ BCM2712_GPIO_ALT_4, -+ BCM2712_GPIO_ALT_5, -+ BCM2712_GPIO_ALT_6, -+ BCM2712_GPIO_ALT_7, -+ BCM2712_GPIO_ALT_8, -+ BCM2712_GPIO_ALT_COUNT -+} BCM2712_GPIO_ALT; -+ -+typedef enum { -+ BCM2712_GPIO_PIN_PULL_NONE = 0, -+ BCM2712_GPIO_PIN_PULL_DOWN = 1, -+ BCM2712_GPIO_PIN_PULL_UP = 2 -+} BCM2712_GPIO_PIN_PULL; -+ -+typedef enum { -+ BCM2712_GPIO_PIN_OUTPUT = 0, -+ BCM2712_GPIO_PIN_INPUT = 1 -+} BCM2712_GPIO_PIN_DIRECTION; -+ -+UINT8 -+EFIAPI -+GpioGetFunction ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin -+ ); -+ -+VOID -+EFIAPI -+GpioSetFunction ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin, -+ IN UINT8 Function -+ ); -+ -+BCM2712_GPIO_PIN_PULL -+EFIAPI -+GpioGetPull ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin -+ ); -+ -+VOID -+EFIAPI -+GpioSetPull ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin, -+ IN BCM2712_GPIO_PIN_PULL Pull -+ ); -+ -+BOOLEAN -+EFIAPI -+GpioRead ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin -+ ); -+ -+VOID -+EFIAPI -+GpioWrite ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin, -+ IN BOOLEAN Value -+ ); -+ -+BCM2712_GPIO_PIN_DIRECTION -+EFIAPI -+GpioGetDirection ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin -+ ); -+ -+VOID -+EFIAPI -+GpioSetDirection ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin, -+ IN BCM2712_GPIO_PIN_DIRECTION Direction -+ ); -+ -+#endif // __BCM2712_GPIO_LIB_H__ -diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.c b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.c -new file mode 100644 -index 00000000..2d9019ed ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.c -@@ -0,0 +1,375 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#define BCM2712_GIO_DATA_REG 0x4 -+#define BCM2712_GIO_IODIR_REG 0x8 -+ -+#define BCM2712_GIO_BANK_SIZE (8 * sizeof (UINT32)) -+#define BCM2712_GIO_MAX_PINS_PER_BANK 32 -+ -+#define BCM2712_GIO_BANK_OFFSET(Pin) ((Pin / BCM2712_GIO_MAX_PINS_PER_BANK) * BCM2712_GIO_BANK_SIZE) -+#define BCM2712_GIO_REG_BIT(Pin) (1 << Pin) -+ -+#define BCM2712_PINCTRL_FSEL_MASK (BIT3 | BIT2 | BIT1 | BIT0) -+#define BCM2712_PINCTRL_PULL_MASK (BIT1 | BIT0) -+ -+#define PINCTRL_REG_UNUSED MAX_UINT16 -+ -+typedef struct { -+ UINT16 MuxReg; -+ UINT8 MuxBit; -+ UINT16 CtlReg; -+ UINT8 CtlBit; -+} BCM2712_PINCTRL_REGISTERS; -+ -+typedef struct { -+ EFI_PHYSICAL_ADDRESS GioBase; -+ EFI_PHYSICAL_ADDRESS PinctrlBase; -+ BCM2712_PINCTRL_REGISTERS *PinctrlRegisters; -+ UINT32 PinCount; -+} BCM2712_GPIO_CONTROLLER; -+ -+STATIC BCM2712_PINCTRL_REGISTERS Bcm2712PinctrlGioRegisters[] = { -+ [0] = { .MuxReg = 0x0, .MuxBit = 0, .CtlReg = 0x1C, .CtlBit = 14 }, -+ [1] = { .MuxReg = 0x0, .MuxBit = 4, .CtlReg = 0x1C, .CtlBit = 16 }, -+ [2] = { .MuxReg = 0x0, .MuxBit = 8, .CtlReg = 0x1C, .CtlBit = 18 }, -+ [3] = { .MuxReg = 0x0, .MuxBit = 12, .CtlReg = 0x1C, .CtlBit = 20 }, -+ [4] = { .MuxReg = 0x0, .MuxBit = 16, .CtlReg = 0x1C, .CtlBit = 22 }, -+ [5] = { .MuxReg = 0x0, .MuxBit = 20, .CtlReg = 0x1C, .CtlBit = 24 }, -+ [6] = { .MuxReg = 0x0, .MuxBit = 24, .CtlReg = 0x1C, .CtlBit = 26 }, -+ [7] = { .MuxReg = 0x0, .MuxBit = 28, .CtlReg = 0x1C, .CtlBit = 28 }, -+ [8] = { .MuxReg = 0x4, .MuxBit = 0, .CtlReg = 0x20, .CtlBit = 0 }, -+ [9] = { .MuxReg = 0x4, .MuxBit = 4, .CtlReg = 0x20, .CtlBit = 2 }, -+ [10] = { .MuxReg = 0x4, .MuxBit = 8, .CtlReg = 0x20, .CtlBit = 4 }, -+ [11] = { .MuxReg = 0x4, .MuxBit = 12, .CtlReg = 0x20, .CtlBit = 6 }, -+ [12] = { .MuxReg = 0x4, .MuxBit = 16, .CtlReg = 0x20, .CtlBit = 8 }, -+ [13] = { .MuxReg = 0x4, .MuxBit = 20, .CtlReg = 0x20, .CtlBit = 10 }, -+ [14] = { .MuxReg = 0x4, .MuxBit = 24, .CtlReg = 0x20, .CtlBit = 12 }, -+ [15] = { .MuxReg = 0x4, .MuxBit = 28, .CtlReg = 0x20, .CtlBit = 14 }, -+ [16] = { .MuxReg = 0x8, .MuxBit = 0, .CtlReg = 0x20, .CtlBit = 16 }, -+ [17] = { .MuxReg = 0x8, .MuxBit = 4, .CtlReg = 0x20, .CtlBit = 18 }, -+ [18] = { .MuxReg = 0x8, .MuxBit = 8, .CtlReg = 0x20, .CtlBit = 20 }, -+ [19] = { .MuxReg = 0x8, .MuxBit = 12, .CtlReg = 0x20, .CtlBit = 22 }, -+ [20] = { .MuxReg = 0x8, .MuxBit = 16, .CtlReg = 0x20, .CtlBit = 24 }, -+ [21] = { .MuxReg = 0x8, .MuxBit = 20, .CtlReg = 0x20, .CtlBit = 26 }, -+ [22] = { .MuxReg = 0x8, .MuxBit = 24, .CtlReg = 0x20, .CtlBit = 28 }, -+ [23] = { .MuxReg = 0x8, .MuxBit = 28, .CtlReg = 0x24, .CtlBit = 0 }, -+ [24] = { .MuxReg = 0xC, .MuxBit = 0, .CtlReg = 0x24, .CtlBit = 2 }, -+ [25] = { .MuxReg = 0xC, .MuxBit = 4, .CtlReg = 0x24, .CtlBit = 4 }, -+ [26] = { .MuxReg = 0xC, .MuxBit = 8, .CtlReg = 0x24, .CtlBit = 6 }, -+ [27] = { .MuxReg = 0xC, .MuxBit = 12, .CtlReg = 0x24, .CtlBit = 8 }, -+ [28] = { .MuxReg = 0xC, .MuxBit = 16, .CtlReg = 0x24, .CtlBit = 10 }, -+ [29] = { .MuxReg = 0xC, .MuxBit = 20, .CtlReg = 0x24, .CtlBit = 12 }, -+ [30] = { .MuxReg = 0xC, .MuxBit = 24, .CtlReg = 0x24, .CtlBit = 14 }, -+ [31] = { .MuxReg = 0xC, .MuxBit = 28, .CtlReg = 0x24, .CtlBit = 16 }, -+ [32] = { .MuxReg = 0x10, .MuxBit = 0, .CtlReg = 0x24, .CtlBit = 18 }, -+ [33] = { .MuxReg = 0x10, .MuxBit = 4, .CtlReg = 0x24, .CtlBit = 20 }, -+ [34] = { .MuxReg = 0x10, .MuxBit = 8, .CtlReg = 0x24, .CtlBit = 22 }, -+ [35] = { .MuxReg = 0x10, .MuxBit = 12, .CtlReg = 0x24, .CtlBit = 24 }, -+ [36] = { .MuxReg = 0x10, .MuxBit = 16, .CtlReg = 0x24, .CtlBit = 26 }, -+ [37] = { .MuxReg = 0x10, .MuxBit = 20, .CtlReg = 0x24, .CtlBit = 28 }, -+ [38] = { .MuxReg = 0x10, .MuxBit = 24, .CtlReg = 0x28, .CtlBit = 0 }, -+ [39] = { .MuxReg = 0x10, .MuxBit = 28, .CtlReg = 0x28, .CtlBit = 2 }, -+ [40] = { .MuxReg = 0x14, .MuxBit = 0, .CtlReg = 0x28, .CtlBit = 4 }, -+ [41] = { .MuxReg = 0x14, .MuxBit = 4, .CtlReg = 0x28, .CtlBit = 6 }, -+ [42] = { .MuxReg = 0x14, .MuxBit = 8, .CtlReg = 0x28, .CtlBit = 8 }, -+ [43] = { .MuxReg = 0x14, .MuxBit = 12, .CtlReg = 0x28, .CtlBit = 10 }, -+ [44] = { .MuxReg = 0x14, .MuxBit = 16, .CtlReg = 0x28, .CtlBit = 12 }, -+ [45] = { .MuxReg = 0x14, .MuxBit = 20, .CtlReg = 0x28, .CtlBit = 14 }, -+ [46] = { .MuxReg = 0x14, .MuxBit = 24, .CtlReg = 0x28, .CtlBit = 16 }, -+ [47] = { .MuxReg = 0x14, .MuxBit = 28, .CtlReg = 0x28, .CtlBit = 18 }, -+ [48] = { .MuxReg = 0x18, .MuxBit = 0, .CtlReg = 0x28, .CtlBit = 20 }, -+ [49] = { .MuxReg = 0x18, .MuxBit = 4, .CtlReg = 0x28, .CtlBit = 22 }, -+ [50] = { .MuxReg = 0x18, .MuxBit = 8, .CtlReg = 0x28, .CtlBit = 24 }, -+ [51] = { .MuxReg = 0x18, .MuxBit = 12, .CtlReg = 0x28, .CtlBit = 26 }, -+ [52] = { .MuxReg = 0x18, .MuxBit = 16, .CtlReg = 0x28, .CtlBit = 28 }, -+ [53] = { .MuxReg = 0x18, .MuxBit = 20, .CtlReg = 0x2C, .CtlBit = 0 }, -+ [54] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 2 }, -+ [55] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 4 }, -+ [56] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 6 }, -+ [57] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 8 }, -+ [58] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 10 }, -+ [59] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 12 }, -+ [60] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 14 }, -+ [61] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 16 }, -+ [62] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 18 }, -+ [63] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 20 }, -+ [64] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 22 }, -+}; -+ -+STATIC BCM2712_PINCTRL_REGISTERS Bcm2712PinctrlGioAonRegisters[] = { -+ [0] = { .MuxReg = 0xC, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 20 }, -+ [1] = { .MuxReg = 0xC, .MuxBit = 4, .CtlReg = 0x18, .CtlBit = 22 }, -+ [2] = { .MuxReg = 0xC, .MuxBit = 8, .CtlReg = 0x18, .CtlBit = 24 }, -+ [3] = { .MuxReg = 0xC, .MuxBit = 12, .CtlReg = 0x18, .CtlBit = 26 }, -+ [4] = { .MuxReg = 0xC, .MuxBit = 16, .CtlReg = 0x18, .CtlBit = 28 }, -+ [5] = { .MuxReg = 0xC, .MuxBit = 20, .CtlReg = 0x1C, .CtlBit = 0 }, -+ [6] = { .MuxReg = 0xC, .MuxBit = 24, .CtlReg = 0x1C, .CtlBit = 2 }, -+ [7] = { .MuxReg = 0xC, .MuxBit = 28, .CtlReg = 0x1C, .CtlBit = 4 }, -+ [8] = { .MuxReg = 0x10, .MuxBit = 0, .CtlReg = 0x1C, .CtlBit = 6 }, -+ [9] = { .MuxReg = 0x10, .MuxBit = 4, .CtlReg = 0x1C, .CtlBit = 8 }, -+ [10] = { .MuxReg = 0x10, .MuxBit = 8, .CtlReg = 0x1C, .CtlBit = 10 }, -+ [11] = { .MuxReg = 0x10, .MuxBit = 12, .CtlReg = 0x1C, .CtlBit = 12 }, -+ [12] = { .MuxReg = 0x10, .MuxBit = 16, .CtlReg = 0x1C, .CtlBit = 14 }, -+ [13] = { .MuxReg = 0x10, .MuxBit = 20, .CtlReg = 0x1C, .CtlBit = 16 }, -+ [14] = { .MuxReg = 0x10, .MuxBit = 24, .CtlReg = 0x1C, .CtlBit = 18 }, -+ [15] = { .MuxReg = 0x10, .MuxBit = 28, .CtlReg = 0x1C, .CtlBit = 20 }, -+ [16] = { .MuxReg = 0x14, .MuxBit = 0, .CtlReg = 0x1C, .CtlBit = 22 }, -+ [17] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [18] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [19] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [20] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [21] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [22] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [23] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [24] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [25] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [26] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [27] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [28] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [29] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [30] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [31] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [32] = { .MuxReg = 0x0, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [33] = { .MuxReg = 0x0, .MuxBit = 4, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [34] = { .MuxReg = 0x0, .MuxBit = 8, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [35] = { .MuxReg = 0x0, .MuxBit = 12, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [36] = { .MuxReg = 0x4, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [37] = { .MuxReg = 0x8, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+}; -+ -+STATIC BCM2712_GPIO_CONTROLLER Controllers[BCM2712_GIO_COUNT] = { -+ { -+ .GioBase = BCM2712_BRCMSTB_GIO_BASE, -+ .PinctrlBase = BCM2712_PINCTRL_BASE, -+ .PinctrlRegisters = Bcm2712PinctrlGioRegisters, -+ .PinCount = ARRAY_SIZE (Bcm2712PinctrlGioRegisters) -+ }, { -+ .GioBase = BCM2712_BRCMSTB_GIO_AON_BASE, -+ .PinctrlBase = BCM2712_PINCTRL_AON_BASE, -+ .PinctrlRegisters = Bcm2712PinctrlGioAonRegisters, -+ .PinCount = ARRAY_SIZE (Bcm2712PinctrlGioAonRegisters) -+ } -+}; -+ -+#define GPIOLIB_ASSERT_OR_FAIL(Expression, FailAction) \ -+ do { \ -+ ASSERT(Expression); \ -+ if (!(Expression)) { \ -+ FailAction; \ -+ } \ -+ } while (FALSE) -+ -+#define GPIOLIB_ASSERT_COMMON_PARAMS(Type, Pin, FailAction) \ -+ GPIOLIB_ASSERT_OR_FAIL ((Type < ARRAY_SIZE (Controllers)) \ -+ && (Pin < Controllers[Type].PinCount), \ -+ FailAction) -+ -+UINT8 -+EFIAPI -+GpioGetFunction ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin -+ ) -+{ -+ BCM2712_GPIO_CONTROLLER *Controller; -+ BCM2712_PINCTRL_REGISTERS *Regs; -+ UINT32 Value = BCM2712_GPIO_ALT_COUNT; -+ -+ GPIOLIB_ASSERT_COMMON_PARAMS (Type, Pin, return Value); -+ -+ Controller = &Controllers[Type]; -+ Regs = &Controller->PinctrlRegisters[Pin]; -+ -+ GPIOLIB_ASSERT_OR_FAIL (Regs->MuxReg != PINCTRL_REG_UNUSED, return Value); -+ -+ Value = MmioRead32 (Controller->PinctrlBase + Regs->MuxReg); -+ -+ return (Value >> Regs->MuxBit) & BCM2712_PINCTRL_FSEL_MASK; -+} -+ -+VOID -+EFIAPI -+GpioSetFunction ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin, -+ IN UINT8 Function -+ ) -+{ -+ BCM2712_GPIO_CONTROLLER *Controller; -+ BCM2712_PINCTRL_REGISTERS *Regs; -+ -+ GPIOLIB_ASSERT_COMMON_PARAMS (Type, Pin, return); -+ -+ Controller = &Controllers[Type]; -+ Regs = &Controller->PinctrlRegisters[Pin]; -+ -+ GPIOLIB_ASSERT_OR_FAIL (Regs->MuxReg != PINCTRL_REG_UNUSED, return); -+ -+ MmioAndThenOr32 (Controller->PinctrlBase + Regs->MuxReg, -+ ~(BCM2712_PINCTRL_FSEL_MASK << Regs->MuxBit), -+ Function << Regs->MuxBit); -+} -+ -+BCM2712_GPIO_PIN_PULL -+EFIAPI -+GpioGetPull ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin -+ ) -+{ -+ BCM2712_GPIO_CONTROLLER *Controller; -+ BCM2712_PINCTRL_REGISTERS *Regs; -+ UINT32 Value = BCM2712_GPIO_PIN_PULL_NONE; -+ -+ GPIOLIB_ASSERT_COMMON_PARAMS (Type, Pin, return Value); -+ -+ Controller = &Controllers[Type]; -+ Regs = &Controller->PinctrlRegisters[Pin]; -+ -+ GPIOLIB_ASSERT_OR_FAIL (Regs->CtlReg != PINCTRL_REG_UNUSED, return Value); -+ -+ Value = MmioRead32 (Controller->PinctrlBase + Regs->CtlReg); -+ -+ return (Value >> Regs->CtlBit) & BCM2712_PINCTRL_PULL_MASK; -+} -+ -+VOID -+EFIAPI -+GpioSetPull ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin, -+ IN BCM2712_GPIO_PIN_PULL Pull -+ ) -+{ -+ BCM2712_GPIO_CONTROLLER *Controller; -+ BCM2712_PINCTRL_REGISTERS *Regs; -+ -+ GPIOLIB_ASSERT_COMMON_PARAMS (Type, Pin, return); -+ -+ Controller = &Controllers[Type]; -+ Regs = &Controller->PinctrlRegisters[Pin]; -+ -+ GPIOLIB_ASSERT_OR_FAIL (Pull == BCM2712_GPIO_PIN_PULL_NONE -+ || Pull == BCM2712_GPIO_PIN_PULL_UP -+ || Pull == BCM2712_GPIO_PIN_PULL_DOWN, -+ return); -+ -+ GPIOLIB_ASSERT_OR_FAIL (Regs->CtlReg != PINCTRL_REG_UNUSED, return); -+ -+ MmioAndThenOr32 (Controller->PinctrlBase + Regs->CtlReg, -+ ~(BCM2712_PINCTRL_PULL_MASK << Regs->CtlBit), -+ Pull << Regs->CtlBit); -+} -+ -+BOOLEAN -+EFIAPI -+GpioRead ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin -+ ) -+{ -+ BCM2712_GPIO_CONTROLLER *Controller; -+ EFI_PHYSICAL_ADDRESS BankReg; -+ UINT32 Value = FALSE; -+ -+ GPIOLIB_ASSERT_COMMON_PARAMS (Type, Pin, return Value); -+ -+ Controller = &Controllers[Type]; -+ BankReg = Controller->GioBase + BCM2712_GIO_BANK_OFFSET (Pin); -+ -+ Value = MmioRead32 (BankReg + BCM2712_GIO_DATA_REG); -+ -+ return (Value & BCM2712_GIO_REG_BIT (Pin)) != 0; -+} -+ -+VOID -+EFIAPI -+GpioWrite ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin, -+ IN BOOLEAN Value -+ ) -+{ -+ BCM2712_GPIO_CONTROLLER *Controller; -+ EFI_PHYSICAL_ADDRESS BankReg; -+ -+ GPIOLIB_ASSERT_COMMON_PARAMS (Type, Pin, return); -+ -+ Controller = &Controllers[Type]; -+ BankReg = Controller->GioBase + BCM2712_GIO_BANK_OFFSET (Pin); -+ -+ if (Value) { -+ MmioOr32 (BankReg + BCM2712_GIO_DATA_REG, BCM2712_GIO_REG_BIT (Pin)); -+ } else { -+ MmioAnd32 (BankReg + BCM2712_GIO_DATA_REG, ~BCM2712_GIO_REG_BIT (Pin)); -+ } -+} -+ -+BCM2712_GPIO_PIN_DIRECTION -+EFIAPI -+GpioGetDirection ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin -+ ) -+{ -+ BCM2712_GPIO_CONTROLLER *Controller; -+ EFI_PHYSICAL_ADDRESS BankReg; -+ UINT32 Value = BCM2712_GPIO_PIN_OUTPUT; -+ -+ GPIOLIB_ASSERT_COMMON_PARAMS (Type, Pin, return Value); -+ -+ Controller = &Controllers[Type]; -+ BankReg = Controller->GioBase + BCM2712_GIO_BANK_OFFSET (Pin); -+ -+ Value = MmioRead32 (BankReg + BCM2712_GIO_IODIR_REG); -+ -+ if (Value & BCM2712_GIO_REG_BIT (Pin)) { -+ return BCM2712_GPIO_PIN_INPUT; -+ } else { -+ return BCM2712_GPIO_PIN_OUTPUT; -+ } -+} -+ -+VOID -+EFIAPI -+GpioSetDirection ( -+ IN BCM2712_GPIO_TYPE Type, -+ IN UINT8 Pin, -+ IN BCM2712_GPIO_PIN_DIRECTION Direction -+ ) -+{ -+ BCM2712_GPIO_CONTROLLER *Controller; -+ EFI_PHYSICAL_ADDRESS BankReg; -+ -+ GPIOLIB_ASSERT_COMMON_PARAMS (Type, Pin, return); -+ -+ GPIOLIB_ASSERT_OR_FAIL (Direction != BCM2712_GPIO_PIN_OUTPUT -+ || Direction != BCM2712_GPIO_PIN_INPUT, -+ return); -+ -+ Controller = &Controllers[Type]; -+ BankReg = Controller->GioBase + BCM2712_GIO_BANK_OFFSET (Pin); -+ -+ switch (Direction) { -+ case BCM2712_GPIO_PIN_INPUT: -+ MmioOr32 (BankReg + BCM2712_GIO_IODIR_REG, BCM2712_GIO_REG_BIT (Pin)); -+ break; -+ case BCM2712_GPIO_PIN_OUTPUT: -+ MmioAnd32 (BankReg + BCM2712_GIO_IODIR_REG, ~BCM2712_GIO_REG_BIT (Pin)); -+ break; -+ default: -+ break; -+ } -+} -diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.inf b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.inf -new file mode 100644 -index 00000000..821c0190 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.inf -@@ -0,0 +1,26 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = Bcm2712GpioLib -+ FILE_GUID = 86a00ea0-6c21-4408-b8c7-3ae675c4678b -+ MODULE_TYPE = BASE -+ VERSION_STRING = 1.0 -+ LIBRARY_CLASS = Bcm2712GpioLib -+ -+[Sources] -+ Bcm2712GpioLib.c -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ Silicon/Broadcom/Bcm27xx/Bcm27xx.dec -+ -+[LibraryClasses] -+ DebugLib -+ IoLib --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0007-Platform-RPi5-Add-SDHCI-support.patch b/packages/edk2/patches/platforms/0007-Platform-RPi5-Add-SDHCI-support.patch deleted file mode 100644 index f422fd2..0000000 --- a/packages/edk2/patches/platforms/0007-Platform-RPi5-Add-SDHCI-support.patch +++ /dev/null @@ -1,766 +0,0 @@ -From 8f06d1faaae5fcd2773ddf7e003f252f601406c4 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 29 Dec 2023 05:40:21 +0200 -Subject: [PATCH 07/16] Platform/RPi5: Add SDHCI support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Also configure SDIO Wi-Fi for later. - -Depends on the SdMmcPciHcDxe patch in EDK2 for external 1.8v signaling -switch. - -Signed-off-by: Mario Bălănică ---- - .../RPi5/Drivers/RpiPlatformDxe/Peripherals.c | 104 ++++++++ - .../RPi5/Drivers/RpiPlatformDxe/Peripherals.h | 18 ++ - .../Drivers/RpiPlatformDxe/RpiPlatformDxe.c | 23 ++ - .../Drivers/RpiPlatformDxe/RpiPlatformDxe.inf | 40 ++++ - Platform/RaspberryPi/RPi5/RPi5.dsc | 13 +- - Platform/RaspberryPi/RPi5/RPi5.fdf | 10 +- - .../Include/IndustryStandard/Bcm2712.h | 7 + - Silicon/Broadcom/BroadcomPkg.dec | 22 ++ - .../Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.c | 224 ++++++++++++++++++ - .../Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.h | 62 +++++ - .../BrcmStbSdhciDxe/BrcmStbSdhciDxe.inf | 39 +++ - .../Include/Protocol/BrcmStbSdhciDevice.h | 47 ++++ - 12 files changed, 606 insertions(+), 3 deletions(-) - create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.c - create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.h - create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c - create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf - create mode 100644 Silicon/Broadcom/BroadcomPkg.dec - create mode 100644 Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.c - create mode 100644 Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.h - create mode 100644 Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.inf - create mode 100644 Silicon/Broadcom/Include/Protocol/BrcmStbSdhciDevice.h - -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.c -new file mode 100644 -index 00000000..7cb08635 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.c -@@ -0,0 +1,104 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "Peripherals.h" -+ -+STATIC -+EFI_STATUS -+EFIAPI -+SdControllerSetSignalingVoltage ( -+ IN BRCMSTB_SDHCI_DEVICE_PROTOCOL *This, -+ IN SD_MMC_SIGNALING_VOLTAGE Voltage -+ ) -+{ -+ // sd_io_1v8_reg -+ GpioWrite (BCM2712_GIO_AON, 3, Voltage == SdMmcSignalingVoltage18); -+ -+ return EFI_SUCCESS; -+} -+ -+STATIC BRCMSTB_SDHCI_DEVICE_PROTOCOL mSdController = { -+ .HostAddress = BCM2712_BRCMSTB_SDIO1_HOST_BASE, -+ .CfgAddress = BCM2712_BRCMSTB_SDIO1_CFG_BASE, -+ .DmaType = NonDiscoverableDeviceDmaTypeNonCoherent, -+ .IsSlotRemovable = TRUE, -+ .SetSignalingVoltage = SdControllerSetSignalingVoltage -+}; -+ -+STATIC -+EFI_STATUS -+EFIAPI -+RegisterSdControllers ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_HANDLE Handle = NULL; -+ -+ Status = gBS->InstallMultipleProtocolInterfaces ( -+ &Handle, -+ &gBrcmStbSdhciDeviceProtocolGuid, -+ &mSdController, -+ NULL); -+ ASSERT_EFI_ERROR (Status); -+ -+ return Status; -+} -+ -+STATIC -+EFI_STATUS -+EFIAPI -+InitGpioPinctrls ( -+ VOID -+ ) -+{ -+ // SD card detect -+ GpioSetFunction (BCM2712_GIO_AON, 5, GIO_AON_PIN5_ALT_SD_CARD_G); -+ GpioSetPull (BCM2712_GIO_AON, 5, BCM2712_GPIO_PIN_PULL_UP); -+ -+ // Route SDIO to Wi-Fi -+ GpioSetFunction (BCM2712_GIO, 30, GIO_PIN30_ALT_SD2); -+ GpioSetPull (BCM2712_GIO, 30, BCM2712_GPIO_PIN_PULL_NONE); -+ GpioSetFunction (BCM2712_GIO, 31, GIO_PIN31_ALT_SD2); -+ GpioSetPull (BCM2712_GIO, 31, BCM2712_GPIO_PIN_PULL_UP); -+ GpioSetFunction (BCM2712_GIO, 32, GIO_PIN32_ALT_SD2); -+ GpioSetPull (BCM2712_GIO, 32, BCM2712_GPIO_PIN_PULL_UP); -+ GpioSetFunction (BCM2712_GIO, 33, GIO_PIN33_ALT_SD2); -+ GpioSetPull (BCM2712_GIO, 33, BCM2712_GPIO_PIN_PULL_UP); -+ GpioSetFunction (BCM2712_GIO, 34, GIO_PIN34_ALT_SD2); -+ GpioSetPull (BCM2712_GIO, 34, BCM2712_GPIO_PIN_PULL_UP); -+ GpioSetFunction (BCM2712_GIO, 35, GIO_PIN35_ALT_SD2); -+ GpioSetPull (BCM2712_GIO, 35, BCM2712_GPIO_PIN_PULL_UP); -+ -+ // wl_on_reg -+ GpioWrite (BCM2712_GIO, 28, TRUE); -+ GpioSetDirection (BCM2712_GIO, 28, BCM2712_GPIO_PIN_OUTPUT); -+ -+ return EFI_SUCCESS; -+} -+ -+EFI_STATUS -+EFIAPI -+SetupPeripherals ( -+ VOID -+ ) -+{ -+ InitGpioPinctrls (); -+ -+ RegisterSdControllers (); -+ -+ return EFI_SUCCESS; -+} -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.h b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.h -new file mode 100644 -index 00000000..ef74a44d ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.h -@@ -0,0 +1,18 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __RPI_PLATFORM_PERIPHERALS_H__ -+#define __RPI_PLATFORM_PERIPHERALS_H__ -+ -+EFI_STATUS -+EFIAPI -+SetupPeripherals ( -+ VOID -+ ); -+ -+#endif // __RPI_PLATFORM_PERIPHERALS_H__ -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c -new file mode 100644 -index 00000000..5d993266 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c -@@ -0,0 +1,23 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+ -+#include "Peripherals.h" -+ -+EFI_STATUS -+EFIAPI -+RpiPlatformDxeEntryPoint ( -+ IN EFI_HANDLE ImageHandle, -+ IN EFI_SYSTEM_TABLE *SystemTable -+ ) -+{ -+ SetupPeripherals (); -+ -+ return EFI_SUCCESS; -+} -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -new file mode 100644 -index 00000000..7292ca30 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -@@ -0,0 +1,40 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = RpiPlatformDxe -+ FILE_GUID = f6490266-0e7f-492e-8e15-ac69c1b7708a -+ MODULE_TYPE = DXE_DRIVER -+ VERSION_STRING = 1.0 -+ ENTRY_POINT = RpiPlatformDxeEntryPoint -+ -+[Sources] -+ RpiPlatformDxe.c -+ Peripherals.c -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ MdeModulePkg/MdeModulePkg.dec -+ EmbeddedPkg/EmbeddedPkg.dec -+ Platform/RaspberryPi/RaspberryPi.dec -+ Silicon/Broadcom/BroadcomPkg.dec -+ Silicon/Broadcom/Bcm27xx/Bcm27xx.dec -+ -+[LibraryClasses] -+ DebugLib -+ UefiLib -+ UefiBootServicesTableLib -+ UefiDriverEntryPoint -+ Bcm2712GpioLib -+ -+[Protocols] -+ gBrcmStbSdhciDeviceProtocolGuid ## PRODUCES -+ -+[Depex] -+ TRUE -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 6850203e..0a97e317 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -180,7 +180,6 @@ - VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf - VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLib.inf - VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf -- GpioLib|Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.inf - - FdtPlatformLib|Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.inf - BoardInfoLib|Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.inf -@@ -188,6 +187,8 @@ - - NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf - -+ Bcm2712GpioLib|Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.inf -+ - [LibraryClasses.common.SEC] - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf -@@ -561,8 +562,8 @@ - - ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -+ Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf - # Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -- # Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf - ArmPkg/Drivers/TimerDxe/TimerDxe.inf - MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - MdeModulePkg/Universal/EbcDxe/EbcDxe.inf -@@ -625,6 +626,14 @@ - MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf - MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf - -+ # -+ # SD/eMMC Support -+ # -+ MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf -+ MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf -+ MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf -+ Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.inf -+ - # - # Networking stack - # -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index 8cd67254..ba19551b 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -214,8 +214,8 @@ READ_LOCK_STATUS = TRUE - - INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - INF Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -+ INF Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf - # INF Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -- # INF Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf - INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf - INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf -@@ -308,6 +308,14 @@ READ_LOCK_STATUS = TRUE - INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf - INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf - -+ # -+ # SD/eMMC Support -+ # -+ INF MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf -+ INF MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf -+ INF MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf -+ INF Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.inf -+ - # - # Pi logo (splash screen) - # -diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -index a0d3e850..c5365141 100644 ---- a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -+++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -@@ -19,4 +19,11 @@ - #define BCM2712_PINCTRL_AON_BASE 0x107d510700 - #define BCM2712_PINCTRL_AON_LENGTH 0x20 - -+#define BCM2712_BRCMSTB_SDIO1_HOST_BASE 0x1000fff000 -+#define BCM2712_BRCMSTB_SDIO1_CFG_BASE 0x1000fff400 -+#define BCM2712_BRCMSTB_SDIO2_HOST_BASE 0x1001100000 -+#define BCM2712_BRCMSTB_SDIO2_CFG_BASE 0x1001100400 -+#define BCM2712_BRCMSTB_SDIO_HOST_LENGTH 0x260 -+#define BCM2712_BRCMSTB_SDIO_CFG_LENGTH 0x200 -+ - #endif // __BCM2712_H__ -diff --git a/Silicon/Broadcom/BroadcomPkg.dec b/Silicon/Broadcom/BroadcomPkg.dec -new file mode 100644 -index 00000000..31f876ae ---- /dev/null -+++ b/Silicon/Broadcom/BroadcomPkg.dec -@@ -0,0 +1,22 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ DEC_SPECIFICATION = 0x0001001A -+ PACKAGE_NAME = BroadcomPkg -+ PACKAGE_GUID = b25a0fef-f089-420f-98f2-adb9b9a34b18 -+ PACKAGE_VERSION = 1.0 -+ -+[Includes] -+ Include -+ -+[Guids] -+ gBroadcomTokenSpaceGuid = { 0xe49c8829, 0xfd87, 0x40cd, { 0x99, 0xf4, 0x61, 0x08, 0x15, 0x92, 0x76, 0x4e } } -+ -+[Protocols] -+ gBrcmStbSdhciDeviceProtocolGuid = { 0xd6c196f9, 0x9c8c, 0x448f, { 0xbd, 0x21, 0xd9, 0x76, 0xa8, 0x3a, 0x82, 0x7f } } -diff --git a/Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.c b/Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.c -new file mode 100644 -index 00000000..80e30a2d ---- /dev/null -+++ b/Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.c -@@ -0,0 +1,224 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include "BrcmStbSdhciDxe.h" -+ -+STATIC -+EFI_STATUS -+EFIAPI -+SdMmcCapability ( -+ IN EFI_HANDLE ControllerHandle, -+ IN UINT8 Slot, -+ IN OUT VOID *SdMmcHcSlotCapability, -+ IN OUT UINT32 *BaseClkFreq -+ ) -+{ -+ SD_MMC_HC_SLOT_CAP *Capability; -+ -+ if (Slot != 0) { -+ return EFI_UNSUPPORTED; -+ } -+ if (SdMmcHcSlotCapability == NULL) { -+ return EFI_INVALID_PARAMETER; -+ } -+ -+ Capability = SdMmcHcSlotCapability; -+ -+ // Hardware retuning is not supported. -+ Capability->RetuningMod = 0; -+ -+ return EFI_SUCCESS; -+} -+ -+STATIC -+EFI_STATUS -+EFIAPI -+SdMmcNotifyPhase ( -+ IN EFI_HANDLE ControllerHandle, -+ IN UINT8 Slot, -+ IN EDKII_SD_MMC_PHASE_TYPE PhaseType, -+ IN OUT VOID *PhaseData -+ ) -+{ -+ EFI_STATUS Status; -+ BRCMSTB_SDHCI_DEVICE_PROTOCOL *Device; -+ -+ if (Slot != 0) { -+ return EFI_UNSUPPORTED; -+ } -+ -+ Status = gBS->HandleProtocol ( -+ ControllerHandle, -+ &gBrcmStbSdhciDeviceProtocolGuid, -+ (VOID **)&Device); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get protocol. Status=%r\n", -+ __func__, Status)); -+ return EFI_UNSUPPORTED; -+ } -+ -+ switch (PhaseType) { -+ case EdkiiSdMmcSetSignalingVoltage: -+ if (PhaseData == NULL) { -+ return EFI_INVALID_PARAMETER; -+ } -+ if (Device->SetSignalingVoltage != NULL) { -+ return Device->SetSignalingVoltage (Device, *(SD_MMC_SIGNALING_VOLTAGE *)PhaseData); -+ } -+ break; -+ -+ default: -+ break; -+ } -+ -+ return EFI_SUCCESS; -+} -+ -+STATIC EDKII_SD_MMC_OVERRIDE mSdMmcOverride = { -+ EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION, -+ SdMmcCapability, -+ SdMmcNotifyPhase, -+}; -+ -+STATIC -+EFI_STATUS -+EFIAPI -+StartDevice ( -+ IN BRCMSTB_SDHCI_DEVICE_PROTOCOL *This, -+ IN EFI_HANDLE ControllerHandle -+ ) -+{ -+ EFI_STATUS Status; -+ -+ // -+ // Set the PHY DLL as clock source to support higher speed modes -+ // reliably. -+ // -+ MmioAndThenOr32 (This->CfgAddress + SDIO_CFG_MAX_50MHZ_MODE, -+ ~SDIO_CFG_MAX_50MHZ_MODE_ENABLE, -+ SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE); -+ -+ if (This->IsSlotRemovable) { -+ MmioAndThenOr32 (This->CfgAddress + SDIO_CFG_SD_PIN_SEL, -+ ~SDIO_CFG_SD_PIN_SEL_MASK, -+ SDIO_CFG_SD_PIN_SEL_CARD); -+ } else { -+ MmioAndThenOr32 (This->CfgAddress + SDIO_CFG_CTRL, -+ ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV, -+ SDIO_CFG_CTRL_SDCD_N_TEST_EN); -+ } -+ -+ Status = RegisterNonDiscoverableMmioDevice ( -+ NonDiscoverableDeviceTypeSdhci, -+ This->DmaType, -+ NULL, -+ &ControllerHandle, -+ 1, -+ This->HostAddress, SDIO_HOST_SIZE); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, -+ "%a: Failed to register Broadcom STB SDHCI controller at 0x%lx. Status=%r\n", -+ __func__, This->HostAddress, Status)); -+ return Status; -+ } -+ -+ return Status; -+} -+ -+STATIC VOID *mProtocolInstallEventRegistration; -+ -+STATIC -+VOID -+EFIAPI -+NotifyProtocolInstall ( -+ IN EFI_EVENT Event, -+ IN VOID *Context -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_HANDLE Handle; -+ UINTN BufferSize; -+ BRCMSTB_SDHCI_DEVICE_PROTOCOL *Device; -+ -+ while (TRUE) { -+ BufferSize = sizeof (EFI_HANDLE); -+ Status = gBS->LocateHandle ( -+ ByRegisterNotify, -+ NULL, -+ mProtocolInstallEventRegistration, -+ &BufferSize, -+ &Handle); -+ if (EFI_ERROR (Status)) { -+ if (Status != EFI_NOT_FOUND) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to locate protocol. Status=%r\n", -+ __func__, Status)); -+ } -+ break; -+ } -+ -+ Status = gBS->HandleProtocol ( -+ Handle, -+ &gBrcmStbSdhciDeviceProtocolGuid, -+ (VOID **)&Device); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get protocol. Status=%r\n", -+ __func__, Status)); -+ break; -+ } -+ -+ Status = StartDevice (Device, Handle); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to start device. Status=%r\n", -+ __func__, Status)); -+ break; -+ } -+ } -+} -+ -+EFI_STATUS -+EFIAPI -+BrcmStbSdhciDxeInitialize ( -+ IN EFI_HANDLE ImageHandle, -+ IN EFI_SYSTEM_TABLE *SystemTable -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_HANDLE Handle; -+ EFI_EVENT ProtocolInstallEvent; -+ -+ ProtocolInstallEvent = EfiCreateProtocolNotifyEvent ( -+ &gBrcmStbSdhciDeviceProtocolGuid, -+ TPL_CALLBACK, -+ NotifyProtocolInstall, -+ NULL, -+ &mProtocolInstallEventRegistration); -+ if (ProtocolInstallEvent == NULL) { -+ ASSERT (FALSE); -+ return EFI_OUT_OF_RESOURCES; -+ } -+ -+ Handle = NULL; -+ Status = gBS->InstallMultipleProtocolInterfaces ( -+ &Handle, -+ &gEdkiiSdMmcOverrideProtocolGuid, -+ &mSdMmcOverride, -+ NULL); -+ ASSERT_EFI_ERROR (Status); -+ -+ return Status; -+} -diff --git a/Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.h b/Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.h -new file mode 100644 -index 00000000..7ea854c1 ---- /dev/null -+++ b/Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.h -@@ -0,0 +1,62 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BRCMSTB_SDHCI_DXE_H__ -+#define __BRCMSTB_SDHCI_DXE_H__ -+ -+#define SDIO_HOST_SIZE 0x260 -+ -+#define SDIO_CFG_CTRL 0x0 -+#define SDIO_CFG_CTRL_SDCD_N_TEST_EN BIT31 -+#define SDIO_CFG_CTRL_SDCD_N_TEST_LEV BIT30 -+ -+#define SDIO_CFG_SD_PIN_SEL 0x44 -+#define SDIO_CFG_SD_PIN_SEL_MASK (BIT1 | BIT0) -+#define SDIO_CFG_SD_PIN_SEL_CARD BIT1 -+ -+#define SDIO_CFG_MAX_50MHZ_MODE 0x1ac -+#define SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE BIT31 -+#define SDIO_CFG_MAX_50MHZ_MODE_ENABLE BIT0 -+ -+typedef struct { -+ UINT32 TimeoutFreq : 6; // bit 0:5 -+ UINT32 Reserved : 1; // bit 6 -+ UINT32 TimeoutUnit : 1; // bit 7 -+ UINT32 BaseClkFreq : 8; // bit 8:15 -+ UINT32 MaxBlkLen : 2; // bit 16:17 -+ UINT32 BusWidth8 : 1; // bit 18 -+ UINT32 Adma2 : 1; // bit 19 -+ UINT32 Reserved2 : 1; // bit 20 -+ UINT32 HighSpeed : 1; // bit 21 -+ UINT32 Sdma : 1; // bit 22 -+ UINT32 SuspRes : 1; // bit 23 -+ UINT32 Voltage33 : 1; // bit 24 -+ UINT32 Voltage30 : 1; // bit 25 -+ UINT32 Voltage18 : 1; // bit 26 -+ UINT32 SysBus64V4 : 1; // bit 27 -+ UINT32 SysBus64V3 : 1; // bit 28 -+ UINT32 AsyncInt : 1; // bit 29 -+ UINT32 SlotType : 2; // bit 30:31 -+ UINT32 Sdr50 : 1; // bit 32 -+ UINT32 Sdr104 : 1; // bit 33 -+ UINT32 Ddr50 : 1; // bit 34 -+ UINT32 Reserved3 : 1; // bit 35 -+ UINT32 DriverTypeA : 1; // bit 36 -+ UINT32 DriverTypeC : 1; // bit 37 -+ UINT32 DriverTypeD : 1; // bit 38 -+ UINT32 DriverType4 : 1; // bit 39 -+ UINT32 TimerCount : 4; // bit 40:43 -+ UINT32 Reserved4 : 1; // bit 44 -+ UINT32 TuningSDR50 : 1; // bit 45 -+ UINT32 RetuningMod : 2; // bit 46:47 -+ UINT32 ClkMultiplier : 8; // bit 48:55 -+ UINT32 Reserved5 : 7; // bit 56:62 -+ UINT32 Hs400 : 1; // bit 63 -+} SD_MMC_HC_SLOT_CAP; -+ -+#endif // __BRCMSTB_SDHCI_DXE_H__ -diff --git a/Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.inf b/Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.inf -new file mode 100644 -index 00000000..9c513a3f ---- /dev/null -+++ b/Silicon/Broadcom/Drivers/BrcmStbSdhciDxe/BrcmStbSdhciDxe.inf -@@ -0,0 +1,39 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = BrcmStbSdhciDxe -+ FILE_GUID = d72a2469-f274-48e1-9bcb-3a28a2a09234 -+ MODULE_TYPE = DXE_DRIVER -+ VERSION_STRING = 1.0 -+ ENTRY_POINT = BrcmStbSdhciDxeInitialize -+ -+[Sources] -+ BrcmStbSdhciDxe.c -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ MdeModulePkg/MdeModulePkg.dec -+ Silicon/Broadcom/BroadcomPkg.dec -+ -+[LibraryClasses] -+ DebugLib -+ IoLib -+ NonDiscoverableDeviceRegistrationLib -+ UefiLib -+ UefiBootServicesTableLib -+ UefiDriverEntryPoint -+ -+[Protocols] -+ gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES -+ gEdkiiSdMmcOverrideProtocolGuid ## PRODUCES -+ gBrcmStbSdhciDeviceProtocolGuid ## CONSUMES -+ -+[Depex] -+ TRUE -diff --git a/Silicon/Broadcom/Include/Protocol/BrcmStbSdhciDevice.h b/Silicon/Broadcom/Include/Protocol/BrcmStbSdhciDevice.h -new file mode 100644 -index 00000000..7837862c ---- /dev/null -+++ b/Silicon/Broadcom/Include/Protocol/BrcmStbSdhciDevice.h -@@ -0,0 +1,47 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BRCMSTB_SDHCI_DEVICE_H__ -+#define __BRCMSTB_SDHCI_DEVICE_H__ -+ -+#include -+#include -+#include -+ -+#define BRCMSTB_SDHCI_DEVICE_PROTOCOL_GUID \ -+ { 0xd6c196f9, 0x9c8c, 0x448f, { 0xbd, 0x21, 0xd9, 0x76, 0xa8, 0x3a, 0x82, 0x7f } } -+ -+typedef struct _BRCMSTB_SDHCI_DEVICE_PROTOCOL BRCMSTB_SDHCI_DEVICE_PROTOCOL; -+ -+typedef -+EFI_STATUS -+(EFIAPI *BRCMSTB_SDHCI_SET_SIGNALING_VOLTAGE) ( -+ IN BRCMSTB_SDHCI_DEVICE_PROTOCOL *This, -+ IN SD_MMC_SIGNALING_VOLTAGE Voltage -+ ); -+ -+struct _BRCMSTB_SDHCI_DEVICE_PROTOCOL { -+ // -+ // Controller platform info -+ // -+ EFI_PHYSICAL_ADDRESS HostAddress; -+ EFI_PHYSICAL_ADDRESS CfgAddress; -+ NON_DISCOVERABLE_DEVICE_DMA_TYPE DmaType; -+ -+ BOOLEAN IsSlotRemovable; -+ -+ // -+ // Optional callback for setting the signaling voltage via -+ // an external regulator. -+ // -+ BRCMSTB_SDHCI_SET_SIGNALING_VOLTAGE SetSignalingVoltage; -+}; -+ -+extern EFI_GUID gBrcmStbSdhciDeviceProtocolGuid; -+ -+#endif // __BRCMSTB_SDHCI_DEVICE_H__ --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0008-Platform-RPi5-Add-initial-ACPI-support.patch b/packages/edk2/patches/platforms/0008-Platform-RPi5-Add-initial-ACPI-support.patch deleted file mode 100644 index 45362a9..0000000 --- a/packages/edk2/patches/platforms/0008-Platform-RPi5-Add-initial-ACPI-support.patch +++ /dev/null @@ -1,1826 +0,0 @@ -From 0f5d150305d726ec55de7ee53490ed2b63c15a23 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 29 Dec 2023 23:04:03 +0200 -Subject: [PATCH 08/16] Platform/RPi5: Add initial ACPI support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Peripherals supported: PL011 debug UART, RP1 USB and Broadcom SDHCI (SD -card + Wi-Fi). - -RP1 is exposed as a generic "module device". The BAR is preprogrammed by -the VPU firmware and all child devices share one level interrupt - INTA# -of the parent PCIe bus. - -XHCI appears to work okay, but there's some subtle corruption happening -under Windows, slowly rendering the boot drive unusable. My guess is -either interrupts getting lost along the way or missing DWC3 core -configuration. - -SDHCI works in Windows, Linux and FreeBSD. Speed mode depends on the OS -and user settings. See the comments left in Dsdt.asl for more details. - -Signed-off-by: Mario Bălănică ---- - .../RaspberryPi/RPi5/AcpiTables/AcpiTables.h | 62 +++ - .../RPi5/AcpiTables/AcpiTables.inf | 55 +++ - .../RaspberryPi/RPi5/AcpiTables/Dbg2.aslc | 85 ++++ - Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl | 368 ++++++++++++++++++ - .../RaspberryPi/RPi5/AcpiTables/Fadt.aslc | 85 ++++ - .../RaspberryPi/RPi5/AcpiTables/Gtdt.aslc | 58 +++ - .../RaspberryPi/RPi5/AcpiTables/Madt.aslc | 71 ++++ - .../RaspberryPi/RPi5/AcpiTables/Pptt.aslc | 219 +++++++++++ - .../RaspberryPi/RPi5/AcpiTables/Spcr.aslc | 74 ++++ - .../RPi5/Drivers/RpiPlatformDxe/ConfigTable.c | 162 ++++++++ - .../RPi5/Drivers/RpiPlatformDxe/ConfigTable.h | 31 ++ - .../Drivers/RpiPlatformDxe/RpiPlatformDxe.c | 102 +++++ - .../Drivers/RpiPlatformDxe/RpiPlatformDxe.inf | 16 +- - .../RpiPlatformDxe/RpiPlatformDxeHii.uni | 44 +++ - .../RpiPlatformDxe/RpiPlatformDxeHii.vfr | 67 ++++ - .../Include/Guid/RpiPlatformFormSetGuid.h | 17 + - .../RPi5/Include/RpiPlatformVarStoreData.h | 22 ++ - Platform/RaspberryPi/RPi5/RPi5.dec | 19 + - Platform/RaspberryPi/RPi5/RPi5.dsc | 3 +- - Platform/RaspberryPi/RPi5/RPi5.fdf | 2 +- - .../Include/IndustryStandard/Bcm2712.h | 9 + - 21 files changed, 1568 insertions(+), 3 deletions(-) - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Dbg2.aslc - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Fadt.aslc - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Gtdt.aslc - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Madt.aslc - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Pptt.aslc - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Spcr.aslc - create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c - create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h - create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni - create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr - create mode 100644 Platform/RaspberryPi/RPi5/Include/Guid/RpiPlatformFormSetGuid.h - create mode 100644 Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h - create mode 100644 Platform/RaspberryPi/RPi5/RPi5.dec - -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h -new file mode 100644 -index 00000000..0b965d39 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h -@@ -0,0 +1,62 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __ACPITABLES_H__ -+#define __ACPITABLES_H__ -+ -+#include -+#include -+#include -+ -+#define EFI_ACPI_OEM_ID {'R','P','I','F','D','N'} -+#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64 ('R','P','I','5',' ',' ',' ',' ') -+#define EFI_ACPI_OEM_REVISION 0x00000200 -+#define EFI_ACPI_CREATOR_ID SIGNATURE_32 ('E','D','K','2') -+#define EFI_ACPI_CREATOR_REVISION 0x00000300 -+ -+// -+// A macro to initialise the common header part of EFI ACPI tables as defined by -+// EFI_ACPI_DESCRIPTION_HEADER structure. -+// -+#define ACPI_HEADER(Signature, Type, Revision) { \ -+ Signature, /* UINT32 Signature */ \ -+ sizeof (Type), /* UINT32 Length */ \ -+ Revision, /* UINT8 Revision */ \ -+ 0, /* UINT8 Checksum */ \ -+ EFI_ACPI_OEM_ID, /* UINT8 OemId[6] */ \ -+ EFI_ACPI_OEM_TABLE_ID, /* UINT64 OemTableId */ \ -+ EFI_ACPI_OEM_REVISION, /* UINT32 OemRevision */ \ -+ EFI_ACPI_CREATOR_ID, /* UINT32 CreatorId */ \ -+ EFI_ACPI_CREATOR_REVISION /* UINT32 CreatorRevision */ \ -+ } -+ -+// -+// Device resource helpers -+// -+#define QWORDMEMORY_BUF(Index, ResourceType) \ -+ QWordMemory (ResourceType,, \ -+ MinFixed, MaxFixed, NonCacheable, ReadWrite, \ -+ 0x0, 0x0, 0x0, 0x0, 0x1,,, RB ## Index) -+ -+#define QWORDMEMORY_SET(Index, Minimum, Length) \ -+ CreateQwordField (RBUF, RB ## Index._MIN, MI ## Index) \ -+ CreateQwordField (RBUF, RB ## Index._MAX, MA ## Index) \ -+ CreateQwordField (RBUF, RB ## Index._LEN, LE ## Index) \ -+ LE ## Index = Length \ -+ MI ## Index = Minimum \ -+ MA ## Index = MI ## Index + LE ## Index - 1 -+ -+// -+// PL011 Debug UART Port -+// -+#define PL011_DEBUG_BASE_ADDRESS FixedPcdGet64 (PcdSerialRegisterBase) -+#define PL011_DEBUG_INTERRUPT FixedPcdGet32 (PL011UartInterrupt) -+#define PL011_DEBUG_LENGTH BCM2712_PL011_LENGTH -+#define PL011_DEBUG_CLOCK_FREQUENCY FixedPcdGet32 (PL011UartClkInHz) -+ -+#endif // __ACPITABLES_H__ -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf -new file mode 100644 -index 00000000..8eef5805 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf -@@ -0,0 +1,55 @@ -+#/** @file -+# -+# ACPI table data and ASL sources required to boot the platform. -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = AcpiTables -+ FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD -+ MODULE_TYPE = USER_DEFINED -+ VERSION_STRING = 1.0 -+ -+[Sources] -+ Dbg2.aslc -+ Dsdt.asl -+ Fadt.aslc -+ Gtdt.aslc -+ Madt.aslc -+ Pptt.aslc -+ Spcr.aslc -+ -+[Packages] -+ ArmPkg/ArmPkg.dec -+ ArmPlatformPkg/ArmPlatformPkg.dec -+ EmbeddedPkg/EmbeddedPkg.dec -+ MdeModulePkg/MdeModulePkg.dec -+ MdePkg/MdePkg.dec -+ Platform/RaspberryPi/RaspberryPi.dec -+ Platform/RaspberryPi/RPi5/RPi5.dec -+ Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec -+ Silicon/Broadcom/Bcm27xx/Bcm27xx.dec -+ -+[FixedPcd] -+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum -+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum -+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum -+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum -+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase -+ gArmTokenSpaceGuid.PcdGicDistributorBase -+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt -+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz -+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase -+ gRaspberryPiTokenSpaceGuid.PcdGicInterruptInterfaceHBase -+ gRaspberryPiTokenSpaceGuid.PcdGicInterruptInterfaceVBase -+ gRaspberryPiTokenSpaceGuid.PcdGicGsivId -+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq0 -+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq1 -+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq2 -+ gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq3 -+ gRpiSiliconTokenSpaceGuid.Rp1PciPeripheralsBar -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Dbg2.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Dbg2.aslc -new file mode 100644 -index 00000000..4f6d3fc6 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Dbg2.aslc -@@ -0,0 +1,85 @@ -+/** @file -+ * -+ * Debug Port Table (DBG2) -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2012-2021, ARM Limited. All rights reserved. -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+ -+#include "AcpiTables.h" -+ -+#define DBG2_NUM_DEBUG_PORTS 1 -+#define DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1 -+#define DBG2_NAMESPACESTRING_FIELD_SIZE 15 -+#define PL011_DEBUG_STR { '\\', '_', 'S', 'B', '.', 'S', 'O', 'C', 'B', '.', 'U', 'R', 'T', '0', 0x00 } -+ -+#pragma pack(1) -+typedef struct { -+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device; -+ EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister; -+ UINT32 AddressSize; -+ UINT8 NameSpaceString[DBG2_NAMESPACESTRING_FIELD_SIZE]; -+} DBG2_DEBUG_DEVICE_INFORMATION; -+ -+typedef struct { -+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description; -+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo[DBG2_NUM_DEBUG_PORTS]; -+} DBG2_TABLE; -+#pragma pack() -+ -+#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \ -+ { \ -+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /* UINT8 Revision */ \ -+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length */ \ -+ NumReg, /* UINT8 NumberofGenericAddressRegisters */ \ -+ DBG2_NAMESPACESTRING_FIELD_SIZE, /* UINT16 NameSpaceStringLength */ \ -+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /* UINT16 NameSpaceStringOffset */ \ -+ 0, /* UINT16 OemDataLength */ \ -+ 0, /* UINT16 OemDataOffset */ \ -+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type */ \ -+ SubType, /* UINT16 Port Subtype */ \ -+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* UINT8 Reserved[2] */ \ -+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \ -+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* UINT16 AddressSize Offset */ \ -+ }, \ -+ ARM_GAS32 (UartBase), /* EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \ -+ UartAddrLen, /* UINT32 AddressSize */ \ -+ UartNameStr /* UINT8 NameSpaceString[MAX_DBG2_NAME_LEN] */ \ -+} -+ -+STATIC DBG2_TABLE Dbg2 = { -+ { -+ ACPI_HEADER ( -+ EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE, -+ DBG2_TABLE, -+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION -+ ), -+ OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo), -+ DBG2_NUM_DEBUG_PORTS /* UINT32 NumberDbgDeviceInfo */ -+ }, -+ { -+ /* -+ * Kernel Debug Port -+ */ -+ DBG2_DEBUG_PORT_DDI ( -+ DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS, -+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART, -+ PL011_DEBUG_BASE_ADDRESS, -+ PL011_DEBUG_LENGTH, -+ PL011_DEBUG_STR -+ ) -+ } -+}; -+ -+// -+// Reference the table being generated to prevent the optimizer from removing -+// the data structure from the executable -+// -+VOID* CONST ReferenceAcpiTable = &Dbg2; -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl -new file mode 100644 -index 00000000..62cacf7c ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl -@@ -0,0 +1,368 @@ -+/** @file -+ * -+ * Differentiated System Definition Table (DSDT) -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+ -+#include "AcpiTables.h" -+ -+DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI5 ", 2) -+{ -+ Scope (\_SB_) -+ { -+ Device (CPU0) { -+ Name (_HID, "ACPI0007") -+ Name (_UID, 0x0) -+ Name (_STA, 0xf) -+ } -+ -+ Device (CPU1) { -+ Name (_HID, "ACPI0007") -+ Name (_UID, 0x1) -+ Name (_STA, 0xf) -+ } -+ -+ Device (CPU2) { -+ Name (_HID, "ACPI0007") -+ Name (_UID, 0x2) -+ Name (_STA, 0xf) -+ } -+ -+ Device (CPU3) { -+ Name (_HID, "ACPI0007") -+ Name (_UID, 0x3) -+ Name (_STA, 0xf) -+ } -+ -+ // -+ // Legacy SOC bus -+ // -+ Device (SOCB) { -+ Name (_HID, "ACPI0004") -+ Name (_UID, 0x0) -+ Name (_CCA, 0x0) -+ -+ Method (_CRS, 0, Serialized) { -+ // -+ // Container devices with _DMA must have _CRS. -+ // TO-DO: Is describing the entire MMIO range in a single resource -+ // enough, or do we need to list each individual resource consumed -+ // by the child devices? -+ // -+ Name (RBUF, ResourceTemplate () { -+ QWORDMEMORY_BUF (00, ResourceProducer) -+ }) -+ QWORDMEMORY_SET (00, BCM2712_LEGACY_BUS_BASE, BCM2712_LEGACY_BUS_LENGTH) -+ Return (RBUF) -+ } -+ -+ Name (_DMA, ResourceTemplate () { -+ // -+ // Only the first GB is available. -+ // Bus 0xC0000000 -> CPU 0x00000000. -+ // -+ QWordMemory (ResourceProducer, -+ PosDecode, -+ MinFixed, -+ MaxFixed, -+ NonCacheable, -+ ReadWrite, -+ 0x0, -+ 0x00000000C0000000, // MIN -+ 0x00000000FFFFFFFF, // MAX -+ 0xFFFFFFFF40000000, // TRA -+ 0x0000000040000000, // LEN -+ , -+ , -+ ) -+ }) -+ -+ // -+ // PL011 Debug UART Port -+ // -+ Device (URT0) { -+ Name (_HID, "ARMH0011") -+ Name (_UID, 0x0) -+ Name (_CCA, 0x0) -+ -+ Method (_CRS, 0x0, Serialized) { -+ Name (RBUF, ResourceTemplate () { -+ QWORDMEMORY_BUF (00, ResourceConsumer) -+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { PL011_DEBUG_INTERRUPT } -+ }) -+ QWORDMEMORY_SET (00, PL011_DEBUG_BASE_ADDRESS, PL011_DEBUG_LENGTH) -+ Return (RBUF) -+ } -+ -+ Name (_DSD, Package () { -+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), -+ Package () { -+ Package () { "clock-frequency", PL011_DEBUG_CLOCK_FREQUENCY } -+ } -+ }) -+ } -+ } // Device (SOCB) -+ -+ Device (RP1B) { -+ Name (_HID, "ACPI0004") -+ Name (_UID, 0x1) -+ -+ // Parent bus is non-coherent -+ Name (_CCA, 0x0) -+ -+ // Firmware mapped BAR -+ Name (PBAR, FixedPcdGet64 (Rp1PciPeripheralsBar)) -+ -+ // Shared level interrupt - PCIE2 INTA# SPI -+ Name (PINT, 261) -+ -+ Include ("Rp1.asi") -+ } -+ -+ // -+ // Broadcom STB SDHCI controllers (Arasan IP) -+ // -+ // There are 2 notable quirks with these controllers: -+ // 1) Broken 1.8v signaling switch: instead it's changed via an external -+ // regulator. Thankfully, Intel Bay Trail had the same issue, so we -+ // can pretend to be one of their affected HCs and reuse the _DSM -+ // workaround. -+ // -+ // 2) Capability claims hardware retuning is supported, but it causes issues. -+ // Windows will crash when switching to SDR50/SDR104. Linux does not appear -+ // to care, but we still override the "sdhci-caps-mask" property just in case. -+ // -+ // Supposedly there's a 32-bit bus access limitation too (inherited from BCM283x), -+ // but no issues have actually been observed under stress test in both Windows -+ // and Linux. Chances are this was fixed in the production BCM2712C0 stepping. -+ // -+ // We provide two compatibility modes: -+ // 1) BRCMSTB _HID + Bay Trail _CID: -+ // - Windows binds to "VEN_8086&DEV_0F14" and has DDR50 with _DSM working. -+ // SDR104/50 modes can be enabled by a sdbus driver override. -+ // -+ // - Linux recognizes "80860F16" but treats the controller as plain SDHCI and -+ // no _DSM, we limit the speed to HS via "sdhci-caps-mask". -+ // -+ // - FreeBSD binds to "80860F16" but does not implement the _DSM nor the _DSD -+ // for caps override, fortunately it just falls back to HS. -+ // -+ // 2) Full Bay Trail _HID: this enables Linux to see the device as proper Bay Trail -+ // and use the _DSM. DDR50 is also enabled by relaxing the caps mask. -+ // -+ // The "Limit UHS-I" option is enabled by default in case OSes are not aware of -+ // the broken retuning (i.e. Windows does not parse _DSD). It disables SDR104/50 -+ // since these modes depend on tuning. -+ // -+ // These will be patched in by the platform driver. -+ // -+ Name (SDCM, 0x0) // Compatibility Mode -+ Name (SDLU, 0x0) // Limit UHS-I -+ -+ Device (SDC0) { -+ Method (_HID) { -+ If (SDCM == ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL) { -+ Return ("80860F16") -+ } Else { -+ Return ("BRCM5D12") -+ } -+ } -+ Name (_CID, Package () { "80860F16", "VEN_8086&DEV_0F14" }) -+ Name (_UID, 0x0) -+ Name (_CCA, 0x0) -+ -+ Method (_CRS, 0x0, Serialized) { -+ Name (RBUF, ResourceTemplate () { -+ QWORDMEMORY_BUF (00, ResourceConsumer) -+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 305 } -+ }) -+ QWORDMEMORY_SET (00, BCM2712_BRCMSTB_SDIO1_HOST_BASE, BCM2712_BRCMSTB_SDIO_HOST_LENGTH) -+ Return (RBUF) -+ } -+ -+ OperationRegion (GPIO, SystemMemory, BCM2712_BRCMSTB_GIO_AON_BASE, BCM2712_BRCMSTB_GIO_AON_LENGTH) -+ Field (GPIO, DWordAcc, NoLock, Preserve) { -+ Offset (0x4), -+ DATA, 32, // BIT3 = GPIO 3, 1.8v switch -+ } -+ -+ Method (_INI, 0, Serialized) { -+ DATA &= ~(1 << 3) -+ } -+ -+ Method (_DSM, 4, Serialized) { -+ // Check the UUID -+ If (Arg0 == ToUUID ("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61")) { -+ // Check the revision -+ If (Arg1 >= 0) { -+ // Check the function index -+ Switch (ToInteger (Arg2)) { -+ // -+ // Supported functions: -+ // Bit 0 - Indicates support for functions other than 0 -+ // Bit 3 - Indicates support to set 1.8V signalling -+ // Bit 4 - Indicates support to set 3.3V signalling -+ // Bit 8 - Indicates support for UHS-I modes -+ // -+ Case (0) { -+ Return (Buffer () { 0x19, 0x01 }) // 0x119 -+ } -+ -+ // Function Index 3: Set 1.8v signalling -+ Case (3) { -+ DATA |= (1 << 3) -+ Return (Buffer () { 0x00 }) -+ } -+ -+ // Function Index 4: Set 3.3v signalling -+ Case (4) { -+ DATA &= ~(1 << 3) -+ Return (Buffer () { 0x00 }) -+ } -+ -+ // -+ // Function Index 8: Supported UHS-I modes -+ // Bit 0 - SDR25 -+ // Bit 1 - DDR50 -+ // Bit 2 - SDR50 -+ // Bit 3 - SDR104 -+ // -+ Case (8) { -+ // Limit UHS-I modes? -+ If (SDLU == 1) { -+ Return (Buffer () { 0x02 }) // DDR50 -+ } Else { -+ Return (Buffer () { 0x0F }) // All -+ } -+ } -+ } // Function index check -+ } // Revision check -+ } // UUID check -+ Return (Buffer () { 0x0 }) -+ } // _DSM -+ -+ Method (_DSD, 0, Serialized) { -+ // Capabilities mask -+ Name (CAPM, 0x0000000000000000) -+ -+ // Start by disabling hardware retuning -+ CAPM |= (1 << 47) | (1 << 46) -+ -+ // Limit UHS-I modes? -+ If (SDLU == 1) { -+ // Disable SDR104, SDR50 -+ CAPM |= (1 << 33) | (1 << 32) -+ -+ If (SDCM != ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL) { -+ // Additionally disable DDR50, Linux can't use -+ // the _DSM for changing voltage in this case. -+ CAPM |= (1 << 34) -+ } -+ } -+ -+ Return (Package () { -+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), -+ Package () { -+ Package () { "sdhci-caps-mask", CAPM } -+ } -+ }) -+ } // _DSD -+ -+ // -+ // Removable SD card -+ // -+ Device (SDMM) { -+ Name (_ADR, 0x0) -+ -+ Method (_RMV) { -+ Return (1) -+ } -+ } -+ } // Device (SDC0) -+ -+ // -+ // This controller drives the SDIO Wi-Fi. -+ // It can only run at DDR50 with fixed signaling voltage, so there's no -+ // need to apply most of the workarounds above. -+ // -+ Device (SDC1) { -+ Name (_HID, "BRCM5D12") -+ Name (_CID, Package () { "80860F16", "VEN_8086&DEV_0F14" }) -+ Name (_UID, 0x1) -+ Name (_CCA, 0x0) -+ -+ Method (_CRS, 0x0, Serialized) { -+ Name (RBUF, ResourceTemplate () { -+ QWORDMEMORY_BUF (00, ResourceConsumer) -+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 306 } -+ }) -+ QWORDMEMORY_SET (00, BCM2712_BRCMSTB_SDIO2_HOST_BASE, BCM2712_BRCMSTB_SDIO_HOST_LENGTH) -+ Return (RBUF) -+ } -+ -+ // -+ // Only needed by Windows. -+ // -+ Method (_DSM, 4, Serialized) { -+ // Check the UUID -+ If (Arg0 == ToUUID ("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61")) { -+ // Check the revision -+ If (Arg1 >= 0) { -+ // Check the function index -+ Switch (ToInteger (Arg2)) { -+ // -+ // Supported functions: -+ // Bit 0 - Indicates support for functions other than 0 -+ // Bit 8 - Indicates support for UHS-I modes -+ // -+ Case (0) { -+ Return (Buffer () { 0x01, 0x01 }) // 0x101 -+ } -+ -+ // -+ // Function Index 8: Supported UHS-I modes -+ // Bit 0 - SDR25 -+ // Bit 1 - DDR50 -+ // Bit 2 - SDR50 -+ // Bit 3 - SDR104 -+ // -+ Case (8) { -+ Return (Buffer () { 0x02 }) // DDR50 -+ } -+ } // Function index check -+ } // Revision check -+ } // UUID check -+ Return (Buffer () { 0x0 }) -+ } // _DSM -+ -+ Method (_DSD, 0x0, Serialized) { -+ Return (Package () { -+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), -+ Package () { -+ // Disable hardware retuning, SDR104, SDR50. -+ Package () { "sdhci-caps-mask", (1 << 47) | (1 << 46) | (1 << 33) | (1 << 32) }, -+ } -+ }) -+ } // _DSD -+ -+ // -+ // Fixed CYW43455 SDIO Wi-Fi -+ // -+ Device (WLAN) { -+ Name (_ADR, 0x1) -+ -+ Method (_RMV) { -+ Return (0) -+ } -+ } -+ } // Device (SDC1) -+ -+ } // Scope (\_SB_) -+} // DefinitionBlock -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Fadt.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Fadt.aslc -new file mode 100644 -index 00000000..9e0a2efc ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Fadt.aslc -@@ -0,0 +1,85 @@ -+/** @file -+ * -+ * Fixed ACPI Description Table (FADT) -+ * -+ * Copyright (c) 2019, Pete Batard -+ * Copyright (c) 2018, Andrey Warkentin -+ * Copyright (c) Microsoft Corporation. All rights reserved. -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+ -+#include "AcpiTables.h" -+ -+EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE Fadt = { -+ ACPI_HEADER ( -+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, -+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE, -+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION -+ ), -+ 0, // UINT32 FirmwareCtrl -+ 0, // UINT32 Dsdt -+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0 -+ EFI_ACPI_6_3_PM_PROFILE_APPLIANCE_PC, // UINT8 PreferredPmProfile -+ 0, // UINT16 SciInt -+ 0, // UINT32 SmiCmd -+ 0, // UINT8 AcpiEnable -+ 0, // UINT8 AcpiDisable -+ 0, // UINT8 S4BiosReq -+ 0, // UINT8 PstateCnt -+ 0, // UINT32 Pm1aEvtBlk -+ 0, // UINT32 Pm1bEvtBlk -+ 0, // UINT32 Pm1aCntBlk -+ 0, // UINT32 Pm1bCntBlk -+ 0, // UINT32 Pm2CntBlk -+ 0, // UINT32 PmTmrBlk -+ 0, // UINT32 Gpe0Blk -+ 0, // UINT32 Gpe1Blk -+ 0, // UINT8 Pm1EvtLen -+ 0, // UINT8 Pm1CntLen -+ 0, // UINT8 Pm2CntLen -+ 0, // UINT8 PmTmrLen -+ 0, // UINT8 Gpe0BlkLen -+ 0, // UINT8 Gpe1BlkLen -+ 0, // UINT8 Gpe1Base -+ 0, // UINT8 CstCnt -+ 0, // UINT16 PLvl2Lat -+ 0, // UINT16 PLvl3Lat -+ 0, // UINT16 FlushSize -+ 0, // UINT16 FlushStride -+ 0, // UINT8 DutyOffset -+ 0, // UINT8 DutyWidth -+ 0, // UINT8 DayAlrm -+ 0, // UINT8 MonAlrm -+ 0, // UINT8 Century -+ EFI_ACPI_RESERVED_WORD, // UINT16 IaPcBootArch (Reserved on ARM) -+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1 -+ EFI_ACPI_6_3_WBINVD | EFI_ACPI_6_3_SLP_BUTTON | // UINT32 Flags -+ EFI_ACPI_6_3_HW_REDUCED_ACPI, -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ResetReg -+ 0, // UINT8 ResetValue -+ EFI_ACPI_6_3_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags -+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision -+ 0, // UINT64 XFirmwareCtrl -+ 0, // UINT64 XDsdt -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe0Blk -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe1Blk -+ NULL_GAS, // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepControlReg -+ NULL_GAS // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepStatusReg -+}; -+ -+// -+// Reference the table being generated to prevent the optimizer from removing the -+// data structure from the executable -+// -+VOID* CONST ReferenceAcpiTable = &Fadt; -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Gtdt.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Gtdt.aslc -new file mode 100644 -index 00000000..679fc947 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Gtdt.aslc -@@ -0,0 +1,58 @@ -+/** @file -+ * -+ * Generic Timer Description Table (GTDT) -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2016 Linaro Ltd. All rights reserved. -+ * Copyright (c) 2012 - 2016, ARM Limited. All rights reserved. -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+ -+#include "AcpiTables.h" -+ -+#define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF -+#define TDT_GLOBAL_FLAGS 0 -+#define GTDT_GTIMER_FLAGS EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY -+ -+#pragma pack (1) -+ -+typedef struct { -+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; -+} EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLES; -+ -+#pragma pack () -+ -+EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = { -+ { -+ ACPI_HEADER( -+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, -+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLES, -+ EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION -+ ), -+ SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress -+ 0, // UINT32 Reserved -+ FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV -+ GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags -+ FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV -+ GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags -+ FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV -+ GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags -+ FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV -+ GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags -+ 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress -+ 0, // UINT32 PlatformTimerCount -+ 0 // UINT32 PlatfromTimerOffset -+ }, -+}; -+ -+// -+// Reference the table being generated to prevent the optimizer -+// from removing the data structure from the executable -+// -+VOID* CONST ReferenceAcpiTable = &Gtdt; -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Madt.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Madt.aslc -new file mode 100644 -index 00000000..8fa96326 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Madt.aslc -@@ -0,0 +1,71 @@ -+/** @file -+ * -+ * Multiple APIC Description Table (MADT) -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2016 Linaro Ltd. All rights reserved. -+ * Copyright (c) 2012 - 2015, ARM Limited. All rights reserved. -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+ -+#include "AcpiTables.h" -+ -+// -+// Multiple APIC Description Table -+// -+#pragma pack (1) -+ -+typedef struct { -+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; -+ EFI_ACPI_6_3_GIC_STRUCTURE GicInterfaces[4]; -+ EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; -+} PI_MULTIPLE_APIC_DESCRIPTION_TABLE; -+ -+#pragma pack () -+ -+PI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { -+ { -+ ACPI_HEADER ( -+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, -+ PI_MULTIPLE_APIC_DESCRIPTION_TABLE, -+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION -+ ), -+ // -+ // MADT specific fields -+ // -+ 0, // LocalApicAddress -+ 0, // Flags -+ }, -+ { -+ EFI_ACPI_6_3_GICC_STRUCTURE_INIT ( -+ 0, 0, GET_MPID(0, 0x000), EFI_ACPI_6_0_GIC_ENABLED, FixedPcdGet32 (PcdGicPmuIrq0), -+ FixedPcdGet64 (PcdGicInterruptInterfaceBase), FixedPcdGet64 (PcdGicInterruptInterfaceVBase), -+ FixedPcdGet64 (PcdGicInterruptInterfaceHBase), FixedPcdGet32 (PcdGicGsivId), 0, 0, 0), -+ EFI_ACPI_6_3_GICC_STRUCTURE_INIT ( -+ 1, 1, GET_MPID(0, 0x100), EFI_ACPI_6_0_GIC_ENABLED, FixedPcdGet32 (PcdGicPmuIrq1), -+ FixedPcdGet64 (PcdGicInterruptInterfaceBase), FixedPcdGet64 (PcdGicInterruptInterfaceVBase), -+ FixedPcdGet64 (PcdGicInterruptInterfaceHBase), FixedPcdGet32 (PcdGicGsivId), 0, 0, 0), -+ EFI_ACPI_6_3_GICC_STRUCTURE_INIT ( -+ 2, 2, GET_MPID(0, 0x200), EFI_ACPI_6_0_GIC_ENABLED, FixedPcdGet32 (PcdGicPmuIrq2), -+ FixedPcdGet64 (PcdGicInterruptInterfaceBase), FixedPcdGet64 (PcdGicInterruptInterfaceVBase), -+ FixedPcdGet64 (PcdGicInterruptInterfaceHBase), FixedPcdGet32 (PcdGicGsivId), 0, 0, 0), -+ EFI_ACPI_6_3_GICC_STRUCTURE_INIT ( -+ 3, 3, GET_MPID(0, 0x300), EFI_ACPI_6_0_GIC_ENABLED, FixedPcdGet32 (PcdGicPmuIrq3), -+ FixedPcdGet64 (PcdGicInterruptInterfaceBase), FixedPcdGet64 (PcdGicInterruptInterfaceVBase), -+ FixedPcdGet64 (PcdGicInterruptInterfaceHBase), FixedPcdGet32 (PcdGicGsivId), 0, 0, 0), -+ }, -+ EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT (0, FixedPcdGet64 (PcdGicDistributorBase), 0, 2) -+}; -+ -+// -+// Reference the table being generated to prevent the optimizer from removing the -+// data structure from the executable -+// -+VOID* CONST ReferenceAcpiTable = &Madt; -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Pptt.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Pptt.aslc -new file mode 100644 -index 00000000..467bf1a7 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Pptt.aslc -@@ -0,0 +1,219 @@ -+/** @file -+ * -+ * BCM2712 Processor Properties Topology Table -+ * -+ * This table is based on the ACPI 6.3 spec because Windows -+ * (tested with build 22621.1992) is not able to properly parse -+ * newer revisions: -+ * - ACPI 6.4 (rev 3) leads to a 0x7E bug check due to the new -+ * Cache ID field in the Cache Type Structure (see Table 5.140). -+ * -+ * It also entirely ignores cache sizes described here, relying on -+ * CCSIDR instead. Fortunately the info there is correct. -+ * -+ * Linux parses and displays all this data correctly. -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include "AcpiTables.h" -+ -+#pragma pack(1) -+typedef struct { -+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; -+ UINT32 L3CacheRef; -+} BCM2712_PPTT_PACKAGE_NODE; -+ -+typedef struct { -+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; -+} BCM2712_PPTT_CLUSTER_NODE; -+ -+typedef struct { -+ EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core; -+ UINT32 L1DCacheRef; -+ UINT32 L1ICacheRef; -+ UINT32 L2CacheRef; -+} BCM2712_PPTT_CORE_NODE; -+ -+typedef struct { -+ EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header; -+ BCM2712_PPTT_PACKAGE_NODE Package; -+ BCM2712_PPTT_CLUSTER_NODE Clusters[1]; -+ BCM2712_PPTT_CORE_NODE Cores[4]; -+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE PackageL3Cache; -+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE A76L1DCache; -+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE A76L1ICache; -+ EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE A76L2Cache; -+} BCM2712_PPTT; -+#pragma pack() -+ -+#define PPTT_DATA_CACHE_ATTRIBUTES \ -+ { \ -+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \ -+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, \ -+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK \ -+ } -+ -+#define PPTT_INST_CACHE_ATTRIBUTES \ -+ { \ -+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ, \ -+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, \ -+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK \ -+ } -+ -+#define PPTT_UNIFIED_CACHE_ATTRIBUTES \ -+ { \ -+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \ -+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, \ -+ EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK \ -+ } -+ -+#define BCM2712_PPTT_CLUSTER_NODE_INIT(ClusterUid) { \ -+ { /* Cluster */ \ -+ EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type */ \ -+ sizeof (BCM2712_PPTT_CLUSTER_NODE), /* Length */ \ -+ { /* Reserved[2] */ \ -+ EFI_ACPI_RESERVED_BYTE, \ -+ EFI_ACPI_RESERVED_BYTE \ -+ }, \ -+ { /* Flags */ \ -+ EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, \ -+ EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, \ -+ EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, \ -+ EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, \ -+ EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, \ -+ }, \ -+ OFFSET_OF (BCM2712_PPTT, Package), /* Parent */ \ -+ ClusterUid, /* AcpiProcessorId */ \ -+ 0 /* NumberOfPrivateResources */ \ -+ } \ -+} -+ -+#define BCM2712_PPTT_CORE_NODE_INIT(ClusterIndex, CoreUid, \ -+ L1DCacheField, L1ICacheField, L2CacheField) { \ -+ { /* Core */ \ -+ EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type */ \ -+ sizeof (BCM2712_PPTT_CORE_NODE), /* Length */ \ -+ { /* Reserved[2] */ \ -+ EFI_ACPI_RESERVED_BYTE, \ -+ EFI_ACPI_RESERVED_BYTE \ -+ }, \ -+ { /* Flags */ \ -+ EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, \ -+ EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, \ -+ EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, \ -+ EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, \ -+ EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, \ -+ }, \ -+ OFFSET_OF (BCM2712_PPTT, \ -+ Clusters[ClusterIndex]), /* Parent */ \ -+ CoreUid, /* AcpiProcessorId */ \ -+ 3 /* NumberOfPrivateResources */ \ -+ }, \ -+ OFFSET_OF (BCM2712_PPTT, L1DCacheField), /* L1DCacheRef */ \ -+ OFFSET_OF (BCM2712_PPTT, L1ICacheField), /* L1ICacheRef */ \ -+ OFFSET_OF (BCM2712_PPTT, L2CacheField) /* L2CacheRef */ \ -+} -+#define BCM2712_PPTT_A76_CORE_NODE_INIT(ClusterIndex, CoreUid) \ -+ BCM2712_PPTT_CORE_NODE_INIT ( \ -+ ClusterIndex, CoreUid, \ -+ A76L1DCache, A76L1ICache, A76L2Cache \ -+ ) -+ -+#define BCM2712_PPTT_CACHE_NODE_INIT(NextLevelOfCache, Size, \ -+ NumberOfSets, Attributes) { \ -+ EFI_ACPI_6_3_PPTT_TYPE_CACHE, /* Type */ \ -+ sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), /* Length */ \ -+ { /* Reserved[2] */ \ -+ EFI_ACPI_RESERVED_BYTE, \ -+ EFI_ACPI_RESERVED_BYTE \ -+ }, \ -+ { /* Flags */ \ -+ EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID, \ -+ EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID, \ -+ EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID, \ -+ EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID, \ -+ EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID, \ -+ EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID, \ -+ EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID \ -+ }, \ -+ NextLevelOfCache, /* NextLevelOfCache */ \ -+ Size, /* Size */ \ -+ NumberOfSets, /* NumberOfSets */ \ -+ Size / NumberOfSets / 64, /* Associativity */ \ -+ Attributes, /* Attributes */ \ -+ 64 /* LineSize */ \ -+} -+ -+STATIC BCM2712_PPTT Pptt = { -+ { -+ ACPI_HEADER ( -+ EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, -+ BCM2712_PPTT, -+ EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION -+ ), -+ }, -+ { -+ { /* Package */ -+ EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type */ -+ sizeof (BCM2712_PPTT_PACKAGE_NODE), /* Length */ -+ { /* Reserved[2] */ -+ EFI_ACPI_RESERVED_BYTE, -+ EFI_ACPI_RESERVED_BYTE -+ }, -+ { /* Flags */ -+ EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, -+ EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, -+ EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, -+ EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, -+ EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, -+ }, -+ 0, /* Parent */ -+ 0, /* AcpiProcessorId */ -+ 1 /* NumberOfPrivateResources */ -+ }, -+ OFFSET_OF (BCM2712_PPTT, PackageL3Cache) -+ }, -+ { /* Clusters */ -+ BCM2712_PPTT_CLUSTER_NODE_INIT (0), /* Big cluster */ -+ }, -+ { /* Cores */ -+ BCM2712_PPTT_A76_CORE_NODE_INIT (0, 0x0), /* 4x Cortex-A76 (Big cluster) */ -+ BCM2712_PPTT_A76_CORE_NODE_INIT (0, 0x1), -+ BCM2712_PPTT_A76_CORE_NODE_INIT (0, 0x2), -+ BCM2712_PPTT_A76_CORE_NODE_INIT (0, 0x3) -+ }, -+ -+ // -+ // Number of sets is likely wrong, but no datasheet to check. -+ // -+ BCM2712_PPTT_CACHE_NODE_INIT ( /* PackageL3Cache */ -+ 0, /* NextLevelOfCache */ -+ SIZE_2MB, /* Size */ -+ 4096, /* NumberOfSets */ -+ PPTT_UNIFIED_CACHE_ATTRIBUTES /* Attributes */ -+ ), -+ BCM2712_PPTT_CACHE_NODE_INIT ( /* A76L1DCache */ -+ OFFSET_OF (BCM2712_PPTT, A76L2Cache), /* NextLevelOfCache */ -+ SIZE_64KB, /* Size */ -+ 256, /* NumberOfSets */ -+ PPTT_DATA_CACHE_ATTRIBUTES /* Attributes */ -+ ), -+ BCM2712_PPTT_CACHE_NODE_INIT ( /* A76L1ICache */ -+ OFFSET_OF (BCM2712_PPTT, A76L2Cache), /* NextLevelOfCache */ -+ SIZE_64KB, /* Size */ -+ 256, /* NumberOfSets */ -+ PPTT_INST_CACHE_ATTRIBUTES /* Attributes */ -+ ), -+ BCM2712_PPTT_CACHE_NODE_INIT ( /* A76L2Cache */ -+ 0, /* NextLevelOfCache */ -+ SIZE_512KB, /* Size */ -+ 1024, /* NumberOfSets */ -+ PPTT_UNIFIED_CACHE_ATTRIBUTES /* Attributes */ -+ ) -+}; -+ -+VOID* CONST ReferenceAcpiTable = &Pptt; -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Spcr.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Spcr.aslc -new file mode 100644 -index 00000000..873d18c8 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Spcr.aslc -@@ -0,0 +1,74 @@ -+/** @file -+ * -+ * Serial Port Console Redirection Table (SPCR) -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2012-2021, ARM Limited. All rights reserved. -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+ -+#include "AcpiTables.h" -+ -+STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = { -+ ACPI_HEADER ( -+ EFI_ACPI_6_3_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, -+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE, -+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION -+ ), -+ // UINT8 InterfaceType; -+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART, -+ // UINT8 Reserved1[3]; -+ { -+ EFI_ACPI_RESERVED_BYTE, -+ EFI_ACPI_RESERVED_BYTE, -+ EFI_ACPI_RESERVED_BYTE -+ }, -+ // EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE BaseAddress; -+ ARM_GAS32 (PL011_DEBUG_BASE_ADDRESS), -+ // UINT8 InterruptType; -+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, -+ // UINT8 Irq; -+ 0, // Not used on ARM -+ // UINT32 GlobalSystemInterrupt; -+ PL011_DEBUG_INTERRUPT, -+ // UINT8 BaudRate; -+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200, -+ // UINT8 Parity; -+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY, -+ // UINT8 StopBits; -+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1, -+ // UINT8 FlowControl; -+ 0, -+ // UINT8 TerminalType; -+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT_UTF8, -+ // UINT8 Reserved2; -+ EFI_ACPI_RESERVED_BYTE, -+ // UINT16 PciDeviceId; -+ 0xFFFF, -+ // UINT16 PciVendorId; -+ 0xFFFF, -+ // UINT8 PciBusNumber; -+ 0x00, -+ // UINT8 PciDeviceNumber; -+ 0x00, -+ // UINT8 PciFunctionNumber; -+ 0x00, -+ // UINT32 PciFlags; -+ 0x00000000, -+ // UINT8 PciSegment; -+ 0x00, -+ // UINT32 Reserved3; -+ EFI_ACPI_RESERVED_DWORD -+}; -+ -+// -+// Reference the table being generated to prevent the optimizer from removing the -+// data structure from the executable -+// -+VOID* CONST ReferenceAcpiTable = &Spcr; -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c -new file mode 100644 -index 00000000..da86e2e0 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c -@@ -0,0 +1,162 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "ConfigTable.h" -+ -+// -+// AcpiTables.inf -+// -+STATIC CONST EFI_GUID mAcpiTableFile = { -+ 0x7E374E25, 0x8E01, 0x4FEE, { 0x87, 0xf2, 0x39, 0x0C, 0x23, 0xC6, 0x06, 0xCD } -+}; -+ -+STATIC ACPI_SD_COMPAT_MODE_VARSTORE_DATA AcpiSdCompatMode; -+STATIC ACPI_SD_LIMIT_UHS_VARSTORE_DATA AcpiSdLimitUhs; -+ -+STATIC -+VOID -+EFIAPI -+DsdtFixupSd ( -+ IN EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol, -+ IN EFI_ACPI_HANDLE TableHandle -+ ) -+{ -+ EFI_STATUS Status; -+ -+ Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle, -+ "\\_SB.SDCM", AcpiSdCompatMode.Value); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to patch AcpiSdCompatMode.\n", __func__)); -+ } -+ -+ Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle, -+ "\\_SB.SDLU", AcpiSdLimitUhs.Value); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to patch AcpiSdLimitUhs.\n", __func__)); -+ } -+} -+ -+STATIC -+EFI_STATUS -+EFIAPI -+ApplyDsdtFixups ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol; -+ EFI_ACPI_DESCRIPTION_HEADER *Table; -+ UINTN TableKey; -+ UINTN TableIndex; -+ EFI_ACPI_HANDLE TableHandle; -+ -+ Status = gBS->LocateProtocol ( -+ &gEfiAcpiSdtProtocolGuid, -+ NULL, -+ (VOID **)&AcpiSdtProtocol); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Couldn't locate gEfiAcpiSdtProtocolGuid!\n", __func__)); -+ return Status; -+ } -+ -+ TableIndex = 0; -+ Status = AcpiLocateTableBySignature ( -+ AcpiSdtProtocol, -+ EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE, -+ &TableIndex, -+ &Table, -+ &TableKey); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Couldn't locate ACPI DSDT table!\n", __func__)); -+ return Status; -+ } -+ -+ Status = AcpiSdtProtocol->OpenSdt (TableKey, &TableHandle); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Couldn't open ACPI DSDT table!\n", __func__)); -+ AcpiSdtProtocol->Close (TableHandle); -+ return Status; -+ } -+ -+ DsdtFixupSd (AcpiSdtProtocol, TableHandle); -+ -+ AcpiSdtProtocol->Close (TableHandle); -+ AcpiUpdateChecksum ((UINT8 *)Table, Table->Length); -+ -+ return EFI_SUCCESS; -+} -+ -+VOID -+EFIAPI -+ApplyConfigTableVariables ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ -+ Status = LocateAndInstallAcpiFromFvConditional (&mAcpiTableFile, NULL); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables!\n")); -+ return; -+ } -+ -+ Status = ApplyDsdtFixups (); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to apply ACPI DSDT fixups!\n")); -+ } -+} -+ -+VOID -+EFIAPI -+SetupConfigTableVariables ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ UINTN Size; -+ -+ AcpiSdCompatMode.Value = ACPI_SD_COMPAT_MODE_DEFAULT; -+ AcpiSdLimitUhs.Value = ACPI_SD_LIMIT_UHS_DEFAULT; -+ -+ Size = sizeof (ACPI_SD_COMPAT_MODE_VARSTORE_DATA); -+ Status = gRT->GetVariable (L"AcpiSdCompatMode", -+ &gRpiPlatformFormSetGuid, -+ NULL, &Size, &AcpiSdCompatMode); -+ if (EFI_ERROR (Status)) { -+ Status = gRT->SetVariable ( -+ L"AcpiSdCompatMode", -+ &gRpiPlatformFormSetGuid, -+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, -+ Size, -+ &AcpiSdCompatMode); -+ ASSERT_EFI_ERROR (Status); -+ } -+ -+ Size = sizeof (ACPI_SD_LIMIT_UHS_VARSTORE_DATA); -+ Status = gRT->GetVariable (L"AcpiSdLimitUhs", -+ &gRpiPlatformFormSetGuid, -+ NULL, &Size, &AcpiSdLimitUhs); -+ if (EFI_ERROR (Status)) { -+ Status = gRT->SetVariable ( -+ L"AcpiSdLimitUhs", -+ &gRpiPlatformFormSetGuid, -+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, -+ Size, -+ &AcpiSdLimitUhs); -+ ASSERT_EFI_ERROR (Status); -+ } -+} -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h -new file mode 100644 -index 00000000..8dadc409 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h -@@ -0,0 +1,31 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __RPI_PLATFORM_CONFIG_TABLE_H__ -+#define __RPI_PLATFORM_CONFIG_TABLE_H__ -+ -+#include -+ -+#define ACPI_SD_COMPAT_MODE_DEFAULT ACPI_SD_COMPAT_MODE_BRCMSTB_BAYTRAIL -+#define ACPI_SD_LIMIT_UHS_DEFAULT TRUE -+ -+#ifndef VFRCOMPILE -+VOID -+EFIAPI -+ApplyConfigTableVariables ( -+ VOID -+ ); -+ -+VOID -+EFIAPI -+SetupConfigTableVariables ( -+ VOID -+ ); -+#endif // VFRCOMPILE -+ -+#endif // __RPI_PLATFORM_CONFIG_TABLE_H__ -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c -index 5d993266..c0601b39 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c -@@ -7,9 +7,101 @@ - **/ - - #include -+#include -+#include -+#include -+#include -+#include - -+#include "ConfigTable.h" - #include "Peripherals.h" - -+extern UINT8 RpiPlatformDxeHiiBin[]; -+extern UINT8 RpiPlatformDxeStrings[]; -+ -+typedef struct { -+ VENDOR_DEVICE_PATH VendorDevicePath; -+ EFI_DEVICE_PATH_PROTOCOL End; -+} HII_VENDOR_DEVICE_PATH; -+ -+STATIC HII_VENDOR_DEVICE_PATH mVendorDevicePath = { -+ { -+ { -+ HARDWARE_DEVICE_PATH, -+ HW_VENDOR_DP, -+ { -+ (UINT8)(sizeof (VENDOR_DEVICE_PATH)), -+ (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8) -+ } -+ }, -+ RPI_PLATFORM_FORMSET_GUID -+ }, -+ { -+ END_DEVICE_PATH_TYPE, -+ END_ENTIRE_DEVICE_PATH_SUBTYPE, -+ { -+ (UINT8)(END_DEVICE_PATH_LENGTH), -+ (UINT8)((END_DEVICE_PATH_LENGTH) >> 8) -+ } -+ } -+}; -+ -+STATIC -+EFI_STATUS -+EFIAPI -+InstallHiiPages ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_HII_HANDLE HiiHandle; -+ EFI_HANDLE DriverHandle; -+ -+ DriverHandle = NULL; -+ Status = gBS->InstallMultipleProtocolInterfaces (&DriverHandle, -+ &gEfiDevicePathProtocolGuid, -+ &mVendorDevicePath, -+ NULL); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ HiiHandle = HiiAddPackages (&gRpiPlatformFormSetGuid, -+ DriverHandle, -+ RpiPlatformDxeStrings, -+ RpiPlatformDxeHiiBin, -+ NULL); -+ -+ if (HiiHandle == NULL) { -+ gBS->UninstallMultipleProtocolInterfaces (DriverHandle, -+ &gEfiDevicePathProtocolGuid, -+ &mVendorDevicePath, -+ NULL); -+ return EFI_OUT_OF_RESOURCES; -+ } -+ return EFI_SUCCESS; -+} -+ -+STATIC -+VOID -+EFIAPI -+SetupVariables ( -+ VOID -+ ) -+{ -+ SetupConfigTableVariables (); -+} -+ -+STATIC -+VOID -+EFIAPI -+ApplyVariables ( -+ VOID -+ ) -+{ -+ ApplyConfigTableVariables (); -+} -+ - EFI_STATUS - EFIAPI - RpiPlatformDxeEntryPoint ( -@@ -17,7 +109,17 @@ RpiPlatformDxeEntryPoint ( - IN EFI_SYSTEM_TABLE *SystemTable - ) - { -+ EFI_STATUS Status; -+ -+ SetupVariables (); -+ ApplyVariables (); -+ - SetupPeripherals (); - -+ Status = InstallHiiPages (); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Couldn't install HII pages. Status=%r\n", __func__, Status)); -+ } -+ - return EFI_SUCCESS; - } -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -index 7292ca30..b1cb4303 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -@@ -16,6 +16,9 @@ - - [Sources] - RpiPlatformDxe.c -+ RpiPlatformDxeHii.uni -+ RpiPlatformDxeHii.vfr -+ ConfigTable.c - Peripherals.c - - [Packages] -@@ -23,18 +26,29 @@ - MdeModulePkg/MdeModulePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - Platform/RaspberryPi/RaspberryPi.dec -+ Platform/RaspberryPi/RPi5/RPi5.dec - Silicon/Broadcom/BroadcomPkg.dec - Silicon/Broadcom/Bcm27xx/Bcm27xx.dec - - [LibraryClasses] -+ AcpiLib - DebugLib -+ DevicePathLib -+ HiiLib - UefiLib - UefiBootServicesTableLib -+ UefiRuntimeServicesTableLib - UefiDriverEntryPoint - Bcm2712GpioLib - -+[Guids] -+ gRpiPlatformFormSetGuid -+ - [Protocols] -+ gEfiAcpiSdtProtocolGuid ## CONSUMES - gBrcmStbSdhciDeviceProtocolGuid ## PRODUCES - - [Depex] -- TRUE -+ gEfiVariableArchProtocolGuid -+ AND gEfiVariableWriteArchProtocolGuid -+ AND gEfiAcpiSdtProtocolGuid -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni -new file mode 100644 -index 00000000..7f362922 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni -@@ -0,0 +1,44 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#langdef en-US "English" -+ -+#string STR_NULL_STRING #language en-US "" -+ -+#string STR_FORM_SET_TITLE #language en-US "Raspberry Pi Configuration" -+#string STR_FORM_SET_TITLE_HELP #language en-US "Configure various platform settings." -+#string STR_FORM_SET_TITLE_SUBTITLE #language en-US "Configuration Options" -+ -+/* -+ * ACPI / Device Tree configuration -+ */ -+#string STR_CONFIG_TABLE_FORM_TITLE #language en-US "ACPI / Device Tree" -+#string STR_CONFIG_TABLE_FORM_HELP #language en-US "Configure the ACPI and Device Tree system tables support." -+ -+#string STR_CONFIG_TABLE_ACPI_SUBTITLE #language en-US "ACPI Configuration" -+ -+#string STR_ACPI_SD_SUBTITLE #language en-US "Broadcom SD Host Controller" -+ -+#string STR_ACPI_SD_COMPAT_MODE_PROMPT #language en-US "Compatibility Mode" -+#string STR_ACPI_SD_COMPAT_MODE_HELP #language en-US "Configure how the device presents to the OS.\n\n" -+ "This SD controller shares some quirks with the Intel Bay Trail series and can reuse its existing OS driver support.\n" -+ "The modes available are:\n" -+ " - BRCMSTB + Bay Trail: the device is exposed primarily as a Broadcom controller but compatible with Bay Trail. Provides maximum compatibility at reduced speed, while allowing OSes to provide tailored driver support in the future. Validated with Windows, Linux and FreeBSD.\n" -+ " - Full Bay Trail: the device is exposed as fully compliant to Bay Trail. This is only necessary for Linux to use the appropriate workarounds and unlock higher speeds (DDR50). However, it will prevent drivers from identifying the device as Broadcom and potentially offering more specific support." -+ -+#string STR_ACPI_SD_COMPAT_BRCMSTB_BAYTRAIL #language en-US "BRCMSTB + Bay Trail" -+#string STR_ACPI_SD_COMPAT_FULL_BAYTRAIL #language en-US "Full Bay Trail" -+ -+#string STR_ACPI_SD_LIMIT_UHS_PROMPT #language en-US "Limit UHS-I Modes" -+#string STR_ACPI_SD_LIMIT_UHS_HELP #language en-US "Limit UHS-I modes to the maximum supported default.\n\n" -+ "Due to another bug in the SD controller, modes that require tuning (SDR104/50) need hardware retuning to be disabled by the host driver.\n\n" -+ "For Windows: speed is limited to DDR50. Disabling this limit is not safe and will crash the system when an UHS-I SDR card is connected. A 3rd party driver is required instead.\n\n" -+ "For Linux:\n" -+ "- in 'BRCMSTB + Bay Trail' mode, speed is limited to HS. Disabling this limit is not possible.\n" -+ "- in 'Full Bay Trail' mode, speed is increased to DDR50. It also becomes possible to disable all other UHS-I limitations.\n\n" -+ "For FreeBSD: speed falls back to HS. This option has no effect." -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr -new file mode 100644 -index 00000000..65163f10 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr -@@ -0,0 +1,67 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+ -+#include "ConfigTable.h" -+ -+formset -+ guid = RPI_PLATFORM_FORMSET_GUID, -+ title = STRING_TOKEN(STR_FORM_SET_TITLE), -+ help = STRING_TOKEN(STR_FORM_SET_TITLE_HELP), -+ classguid = EFI_HII_PLATFORM_SETUP_FORMSET_GUID, -+ -+ efivarstore ACPI_SD_COMPAT_MODE_VARSTORE_DATA, -+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -+ name = AcpiSdCompatMode, -+ guid = RPI_PLATFORM_FORMSET_GUID; -+ -+ efivarstore ACPI_SD_LIMIT_UHS_VARSTORE_DATA, -+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -+ name = AcpiSdLimitUhs, -+ guid = RPI_PLATFORM_FORMSET_GUID; -+ -+ form formid = 1, -+ title = STRING_TOKEN(STR_FORM_SET_TITLE); -+ -+ subtitle text = STRING_TOKEN(STR_FORM_SET_TITLE_SUBTITLE); -+ subtitle text = STRING_TOKEN(STR_NULL_STRING); -+ -+ goto 0x1000, -+ prompt = STRING_TOKEN(STR_CONFIG_TABLE_FORM_TITLE), -+ help = STRING_TOKEN(STR_CONFIG_TABLE_FORM_HELP); -+ endform; -+ -+ form formid = 0x1000, -+ title = STRING_TOKEN(STR_CONFIG_TABLE_FORM_TITLE); -+ -+ subtitle text = STRING_TOKEN(STR_CONFIG_TABLE_ACPI_SUBTITLE); -+ -+ subtitle text = STRING_TOKEN(STR_NULL_STRING); -+ subtitle text = STRING_TOKEN(STR_ACPI_SD_SUBTITLE); -+ -+ oneof varid = AcpiSdCompatMode.Value, -+ prompt = STRING_TOKEN(STR_ACPI_SD_COMPAT_MODE_PROMPT), -+ help = STRING_TOKEN(STR_ACPI_SD_COMPAT_MODE_HELP), -+ flags = NUMERIC_SIZE_1 | INTERACTIVE | RESET_REQUIRED, -+ default = ACPI_SD_COMPAT_MODE_DEFAULT, -+ option text = STRING_TOKEN(STR_ACPI_SD_COMPAT_BRCMSTB_BAYTRAIL), value = ACPI_SD_COMPAT_MODE_BRCMSTB_BAYTRAIL, flags = 0; -+ option text = STRING_TOKEN(STR_ACPI_SD_COMPAT_FULL_BAYTRAIL), value = ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL, flags = 0; -+ endoneof; -+ -+ checkbox varid = AcpiSdLimitUhs.Value, -+ prompt = STRING_TOKEN(STR_ACPI_SD_LIMIT_UHS_PROMPT), -+ help = STRING_TOKEN(STR_ACPI_SD_LIMIT_UHS_HELP), -+ flags = CHECKBOX_DEFAULT | CHECKBOX_DEFAULT_MFG | RESET_REQUIRED, -+ default = ACPI_SD_LIMIT_UHS_DEFAULT, -+ endcheckbox; -+ endform; -+endformset; -diff --git a/Platform/RaspberryPi/RPi5/Include/Guid/RpiPlatformFormSetGuid.h b/Platform/RaspberryPi/RPi5/Include/Guid/RpiPlatformFormSetGuid.h -new file mode 100644 -index 00000000..72953798 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Include/Guid/RpiPlatformFormSetGuid.h -@@ -0,0 +1,17 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __RPI_PLATFORM_FORMSET_GUID_H__ -+#define __RPI_PLATFORM_FORMSET_GUID_H__ -+ -+#define RPI_PLATFORM_FORMSET_GUID \ -+ { 0x677a7ac5, 0x7d92, 0x4288, { 0x8b, 0xf0, 0x97, 0x04, 0x81, 0x02, 0xd1, 0x1c } } -+ -+extern EFI_GUID gRpiPlatformFormSetGuid; -+ -+#endif // __RPI_PLATFORM_FORMSET_GUID_H__ -diff --git a/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h b/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h -new file mode 100644 -index 00000000..374ecb09 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h -@@ -0,0 +1,22 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __RPI_PLATFORM_VARSTORE_DATA_H__ -+#define __RPI_PLATFORM_VARSTORE_DATA_H__ -+ -+#define ACPI_SD_COMPAT_MODE_BRCMSTB_BAYTRAIL 0 -+#define ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL 1 -+typedef struct { -+ UINT8 Value; -+} ACPI_SD_COMPAT_MODE_VARSTORE_DATA; -+ -+typedef struct { -+ BOOLEAN Value; -+} ACPI_SD_LIMIT_UHS_VARSTORE_DATA; -+ -+#endif // __RPI_PLATFORM_VARSTORE_DATA_H__ -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dec b/Platform/RaspberryPi/RPi5/RPi5.dec -new file mode 100644 -index 00000000..90f63f51 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/RPi5.dec -@@ -0,0 +1,19 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ DEC_SPECIFICATION = 0x0001001A -+ PACKAGE_NAME = RPi5 -+ PACKAGE_GUID = d4f34c69-5f19-4dbc-a4cb-02163197e35e -+ PACKAGE_VERSION = 1.0 -+ -+[Includes] -+ Include -+ -+[Guids] -+ gRpiPlatformFormSetGuid = { 0x677a7ac5, 0x7d92, 0x4288, { 0x8b, 0xf0, 0x97, 0x04, 0x81, 0x02, 0xd1, 0x1c } } -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 0a97e317..f8e08de2 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -416,6 +416,7 @@ - - # UARTs - gArmPlatformTokenSpaceGuid.PL011UartClkInHz|44000000 -+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt|153 - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x107d001000 - -@@ -581,7 +582,7 @@ - # - MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf - MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf -- # Platform/RaspberryPi/AcpiTables/AcpiTables.inf -+ Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf - - # - # SMBIOS Support -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index ba19551b..bfe6a90e 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -241,7 +241,7 @@ READ_LOCK_STATUS = TRUE - # - INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf - INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf -- # INF RuleOverride = ACPITABLE Platform/RaspberryPi/AcpiTables/AcpiTables.inf -+ INF RuleOverride = ACPITABLE Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf - - # - # SMBIOS Support -diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -index c5365141..c1d1f22f 100644 ---- a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -+++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -@@ -9,6 +9,15 @@ - #ifndef __BCM2712_H__ - #define __BCM2712_H__ - -+#define BCM2712_IO_BASE 0x1000000000 -+#define BCM2712_IO_LENGTH 0x1000000000 -+ -+#define BCM2712_LEGACY_BUS_BASE 0x107c000000 -+#define BCM2712_LEGACY_BUS_LENGTH 0x4000000 -+ -+#define BCM2712_PL011_UART0_BASE 0x107d001000 -+#define BCM2712_PL011_LENGTH 0x200 -+ - #define BCM2712_BRCMSTB_GIO_BASE 0x107d508500 - #define BCM2712_BRCMSTB_GIO_LENGTH 0x40 - #define BCM2712_BRCMSTB_GIO_AON_BASE 0x107d517c00 --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0009-Platform-RPi5-Add-real-time-clock-support.patch b/packages/edk2/patches/platforms/0009-Platform-RPi5-Add-real-time-clock-support.patch deleted file mode 100644 index eb95a8d..0000000 --- a/packages/edk2/patches/platforms/0009-Platform-RPi5-Add-real-time-clock-support.patch +++ /dev/null @@ -1,611 +0,0 @@ -From d9b5815d797260ca8c8af1f8cca19e85c8c32a09 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 29 Dec 2023 23:29:47 +0200 -Subject: [PATCH 09/16] Platform/RPi5: Add real-time clock support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Working get/set time and wake up alarm within UEFI. - -Signed-off-by: Mario Bălănică ---- - .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c | 110 ++++++- - .../Include/IndustryStandard/RpiMbox.h | 2 + - .../Include/Protocol/RpiFirmware.h | 28 ++ - .../RaspberryPi/Library/RpiRtcLib/RpiRtcLib.c | 305 ++++++++++++++++++ - .../Library/RpiRtcLib/RpiRtcLib.inf | 42 +++ - Platform/RaspberryPi/RPi5/RPi5.dsc | 2 +- - 6 files changed, 487 insertions(+), 2 deletions(-) - create mode 100644 Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.c - create mode 100644 Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.inf - -diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -index 9077f077..b432e828 100644 ---- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -+++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -@@ -1,5 +1,6 @@ - /** @file - * -+ * Copyright (c) 2023, Mario Bălănică - * Copyright (c) 2020, Pete Batard - * Copyright (c) 2019, ARM Limited. All rights reserved. - * Copyright (c) 2017-2020, Andrei Warkentin -@@ -1332,6 +1333,111 @@ RpiFirmwareNotifyGpioSetCfg ( - return Status; - } - -+ -+#pragma pack() -+typedef struct { -+ UINT32 Register; -+ UINT32 Value; -+} RPI_FW_RTC_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_RTC_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_RTC_CMD; -+#pragma pack() -+ -+STATIC -+EFI_STATUS -+EFIAPI -+RpiFirmwareGetRtc ( -+ IN RASPBERRY_PI_RTC_REGISTER Register, -+ OUT UINT32 *Value -+ ) -+{ -+ RPI_FW_RTC_CMD *Cmd; -+ EFI_STATUS Status; -+ UINT32 Result; -+ -+ if (!AcquireSpinLockOrFail (&mMailboxLock)) { -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ return EFI_DEVICE_ERROR; -+ } -+ -+ Cmd = mDmaBuffer; -+ ZeroMem (Cmd, sizeof (*Cmd)); -+ -+ Cmd->BufferHead.BufferSize = sizeof (*Cmd); -+ Cmd->BufferHead.Response = 0; -+ Cmd->TagHead.TagId = RPI_MBOX_GET_RTC_REG; -+ Cmd->TagHead.TagSize = sizeof (Cmd->TagBody); -+ Cmd->TagHead.TagValueSize = 0; -+ Cmd->TagBody.Register = Register; -+ Cmd->TagBody.Value = 0; -+ Cmd->EndTag = 0; -+ -+ Status = MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_CHANNEL, &Result); -+ -+ if (EFI_ERROR (Status) || -+ Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { -+ DEBUG ((DEBUG_ERROR, -+ "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -+ __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ Status = EFI_DEVICE_ERROR; -+ } else { -+ *Value = Cmd->TagBody.Value; -+ } -+ -+ ReleaseSpinLock (&mMailboxLock); -+ -+ return Status; -+} -+ -+STATIC -+EFI_STATUS -+EFIAPI -+RpiFirmwareSetRtc ( -+ IN RASPBERRY_PI_RTC_REGISTER Register, -+ IN UINT32 Value -+ ) -+{ -+ RPI_FW_RTC_CMD *Cmd; -+ EFI_STATUS Status; -+ UINT32 Result; -+ -+ if (!AcquireSpinLockOrFail (&mMailboxLock)) { -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ return EFI_DEVICE_ERROR; -+ } -+ -+ Cmd = mDmaBuffer; -+ ZeroMem (Cmd, sizeof (*Cmd)); -+ -+ Cmd->BufferHead.BufferSize = sizeof (*Cmd); -+ Cmd->BufferHead.Response = 0; -+ Cmd->TagHead.TagId = RPI_MBOX_SET_RTC_REG; -+ Cmd->TagHead.TagSize = sizeof (Cmd->TagBody); -+ Cmd->TagHead.TagValueSize = 0; -+ Cmd->TagBody.Register = Register; -+ Cmd->TagBody.Value = Value; -+ Cmd->EndTag = 0; -+ -+ Status = MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_CHANNEL, &Result); -+ -+ if (EFI_ERROR (Status) || -+ Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { -+ DEBUG ((DEBUG_ERROR, -+ "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -+ __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ Status = EFI_DEVICE_ERROR; -+ } -+ -+ ReleaseSpinLock (&mMailboxLock); -+ -+ return Status; -+} -+ - STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwareProtocol = { - RpiFirmwareSetPowerState, - RpiFirmwareGetMacAddress, -@@ -1352,7 +1458,9 @@ STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwareProtocol = { - RpiFirmwareNotifyXhciReset, - RpiFirmwareGetCurrentClockState, - RpiFirmwareSetClockState, -- RpiFirmwareNotifyGpioSetCfg -+ RpiFirmwareNotifyGpioSetCfg, -+ RpiFirmwareGetRtc, -+ RpiFirmwareSetRtc, - }; - - /** -diff --git a/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h b/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h -index 551c2b82..916b7442 100644 ---- a/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h -+++ b/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h -@@ -93,6 +93,7 @@ - #define RPI_MBOX_GET_POE_HAT_VAL 0x00030049 - #define RPI_MBOX_SET_POE_HAT_VAL 0x00030050 - #define RPI_MBOX_NOTIFY_XHCI_RESET 0x00030058 -+#define RPI_MBOX_GET_RTC_REG 0x00030087 - - #define RPI_MBOX_SET_CLOCK_STATE 0x00038001 - #define RPI_MBOX_SET_CLOCK_RATE 0x00038002 -@@ -104,6 +105,7 @@ - #define RPI_MBOX_SET_SDHOST_CLOCK 0x00038042 - #define RPI_MBOX_SET_GPIO_CONFIG 0x00038043 - #define RPI_MBOX_SET_PERIPH_REG 0x00038045 -+#define RPI_MBOX_SET_RTC_REG 0x00038087 - - #define RPI_MBOX_ALLOC_FB 0x00040001 - #define RPI_MBOX_FB_BLANK 0x00040002 -diff --git a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h b/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h -index 86bf1687..92ab7f84 100644 ---- a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h -+++ b/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h -@@ -1,5 +1,6 @@ - /** @file - * -+ * Copyright (c) 2023, Mario Bălănică - * Copyright (c) 2019, ARM Limited. All rights reserved. - * Copyright (c) 2017 - 2020, Andrei Warkentin - * Copyright (c) 2016, Linaro Limited. All rights reserved. -@@ -14,6 +15,17 @@ - #define RASPBERRY_PI_FIRMWARE_PROTOL_GUID \ - { 0x0ACA9535, 0x7AD0, 0x4286, { 0xB0, 0x2E, 0x87, 0xFA, 0x7E, 0x2A, 0x57, 0x11 } } - -+typedef enum { -+ RpiRtcTime = 0, -+ RpiRtcAlarm, -+ RpiRtcAlarmPending, -+ RpiRtcAlarmEnable, -+ RpiRtcBatteryChargeVoltage, -+ RpiRtcBatteryChargeVoltageMin, -+ RpiRtcBatteryChargeVoltageMax, -+ RpiRtcBatteryVoltage, -+} RASPBERRY_PI_RTC_REGISTER; -+ - typedef - EFI_STATUS - (EFIAPI *SET_POWER_STATE) ( -@@ -141,6 +153,20 @@ EFI_STATUS - UINTN State - ); - -+typedef -+EFI_STATUS -+(EFIAPI *GET_RTC) ( -+ IN RASPBERRY_PI_RTC_REGISTER Register, -+ OUT UINT32 *Value -+ ); -+ -+typedef -+EFI_STATUS -+(EFIAPI *SET_RTC) ( -+ IN RASPBERRY_PI_RTC_REGISTER Register, -+ IN UINT32 Value -+ ); -+ - typedef struct { - SET_POWER_STATE SetPowerState; - GET_MAC_ADDRESS GetMacAddress; -@@ -162,6 +188,8 @@ typedef struct { - GET_CLOCK_STATE GetClockState; - SET_CLOCK_STATE SetClockState; - GPIO_SET_CFG SetGpioConfig; -+ GET_RTC GetRtc; -+ SET_RTC SetRtc; - } RASPBERRY_PI_FIRMWARE_PROTOCOL; - - extern EFI_GUID gRaspberryPiFirmwareProtocolGuid; -diff --git a/Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.c b/Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.c -new file mode 100644 -index 00000000..298b3678 ---- /dev/null -+++ b/Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.c -@@ -0,0 +1,305 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol; -+ -+STATIC -+VOID -+EFIAPI -+OffsetTimeZoneEpoch ( -+ IN EFI_TIME *Time, -+ IN OUT UINT32 *EpochSeconds, -+ IN BOOLEAN Add -+ ) -+{ -+ // -+ // Adjust for the correct time zone -+ // The timezone setting also reflects the DST setting of the clock -+ // -+ if (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE) { -+ *EpochSeconds += (Add ? 1 : -1) * Time->TimeZone * SEC_PER_MIN; -+ } else if ((Time->Daylight & EFI_TIME_IN_DAYLIGHT) == EFI_TIME_IN_DAYLIGHT) { -+ // Convert to adjusted time, i.e. spring forwards one hour -+ *EpochSeconds += (Add ? 1 : -1) * SEC_PER_HOUR; -+ } -+} -+ -+/** -+ Returns the current time and date information, and the time-keeping capabilities -+ of the hardware platform. -+ -+ @param Time A pointer to storage to receive a snapshot of the current time. -+ @param Capabilities An optional pointer to a buffer to receive the real time clock -+ device's capabilities. -+ -+ @retval EFI_SUCCESS The operation completed successfully. -+ @retval EFI_INVALID_PARAMETER Time is NULL. -+ @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error. -+ @retval EFI_SECURITY_VIOLATION The time could not be retrieved due to an authentication failure. -+ -+**/ -+EFI_STATUS -+EFIAPI -+LibGetTime ( -+ OUT EFI_TIME *Time, -+ OUT EFI_TIME_CAPABILITIES *Capabilities -+ ) -+{ -+ EFI_STATUS Status; -+ UINT32 EpochSeconds; -+ -+ if (Time == NULL) { -+ return EFI_INVALID_PARAMETER; -+ } -+ -+ Status = mFwProtocol->GetRtc (RpiRtcTime, &EpochSeconds); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ OffsetTimeZoneEpoch (Time, &EpochSeconds, TRUE); -+ -+ EpochToEfiTime (EpochSeconds, Time); -+ -+ return EFI_SUCCESS; -+} -+ -+/** -+ Sets the current local time and date information. -+ -+ @param Time A pointer to the current time. -+ -+ @retval EFI_SUCCESS The operation completed successfully. -+ @retval EFI_INVALID_PARAMETER A time field is out of range. -+ @retval EFI_DEVICE_ERROR The time could not be set due to hardware error. -+ -+**/ -+EFI_STATUS -+EFIAPI -+LibSetTime ( -+ IN EFI_TIME *Time -+ ) -+{ -+ EFI_STATUS Status; -+ UINT32 EpochSeconds; -+ -+ if (Time == NULL || !IsTimeValid (Time)) { -+ return EFI_UNSUPPORTED; -+ } -+ -+ EpochSeconds = (UINT32)EfiTimeToEpoch (Time); -+ -+ OffsetTimeZoneEpoch (Time, &EpochSeconds, FALSE); -+ -+ Status = mFwProtocol->SetRtc (RpiRtcTime, EpochSeconds); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ return EFI_SUCCESS; -+} -+ -+/** -+ Returns the current wakeup alarm clock setting. -+ -+ @param Enabled Indicates if the alarm is currently enabled or disabled. -+ @param Pending Indicates if the alarm signal is pending and requires acknowledgement. -+ @param Time The current alarm setting. -+ -+ @retval EFI_SUCCESS The alarm settings were returned. -+ @retval EFI_INVALID_PARAMETER Any parameter is NULL. -+ @retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error. -+ -+**/ -+EFI_STATUS -+EFIAPI -+LibGetWakeupTime ( -+ OUT BOOLEAN *Enabled, -+ OUT BOOLEAN *Pending, -+ OUT EFI_TIME *Time -+ ) -+{ -+ EFI_STATUS Status; -+ UINT32 EpochSeconds; -+ UINT32 EnableVal; -+ UINT32 PendingVal; -+ -+ if (Time == NULL || Enabled == NULL || Pending == NULL) { -+ return EFI_INVALID_PARAMETER; -+ } -+ -+ Status = mFwProtocol->GetRtc (RpiRtcAlarmEnable, &EnableVal); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ Status = mFwProtocol->GetRtc (RpiRtcAlarmPending, &PendingVal); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ *Enabled = EnableVal; -+ *Pending = PendingVal; -+ -+ if (*Pending) { -+ // Acknowledge alarm -+ Status = mFwProtocol->SetRtc (RpiRtcAlarmPending, TRUE); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ } -+ -+ Status = mFwProtocol->GetRtc (RpiRtcAlarm, &EpochSeconds); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ OffsetTimeZoneEpoch (Time, &EpochSeconds, TRUE); -+ -+ EpochToEfiTime (EpochSeconds, Time); -+ -+ return EFI_SUCCESS; -+} -+ -+/** -+ Sets the system wakeup alarm clock time. -+ -+ @param Enabled Enable or disable the wakeup alarm. -+ @param Time If Enable is TRUE, the time to set the wakeup alarm for. -+ -+ @retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If -+ Enable is FALSE, then the wakeup alarm was disabled. -+ @retval EFI_INVALID_PARAMETER A time field is out of range. -+ @retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error. -+ @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform. -+ -+**/ -+EFI_STATUS -+EFIAPI -+LibSetWakeupTime ( -+ IN BOOLEAN Enabled, -+ OUT EFI_TIME *Time -+ ) -+{ -+ EFI_STATUS Status; -+ UINT32 EpochSeconds; -+ -+ if (Enabled) { -+ if (Time == NULL || !IsTimeValid (Time)) { -+ return EFI_INVALID_PARAMETER; -+ } -+ -+ EpochSeconds = (UINT32)EfiTimeToEpoch (Time); -+ -+ OffsetTimeZoneEpoch (Time, &EpochSeconds, FALSE); -+ -+ Status = mFwProtocol->SetRtc (RpiRtcAlarm, EpochSeconds); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ } -+ -+ Status = mFwProtocol->SetRtc (RpiRtcAlarmEnable, Enabled); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ return EFI_SUCCESS; -+} -+ -+/** -+ Fixup internal data so that EFI can be call in virtual mode. -+ Call the passed in Child Notify event and convert any pointers in -+ lib to virtual mode. -+ -+ @param[in] Event The Event that is being processed -+ @param[in] Context Event Context -+ -+**/ -+STATIC -+VOID -+EFIAPI -+VirtualAddressChangeNotify ( -+ IN EFI_EVENT Event, -+ IN VOID *Context -+ ) -+{ -+ EfiConvertPointer (0x0, (VOID **)&mFwProtocol); -+} -+ -+/** -+ This is the declaration of an EFI image entry point. This can be the entry point to an application -+ written to this specification, an EFI boot service driver, or an EFI runtime driver. -+ -+ @param ImageHandle Handle that identifies the loaded image. -+ @param SystemTable System Table for this image. -+ -+ @retval EFI_SUCCESS The operation completed successfully. -+ -+**/ -+EFI_STATUS -+EFIAPI -+LibRtcInitialize ( -+ IN EFI_HANDLE ImageHandle, -+ IN EFI_SYSTEM_TABLE *SystemTable -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_TIME Time; -+ EFI_EVENT VirtualAddressChangeEvent; -+ -+ Status = gBS->LocateProtocol ( -+ &gRaspberryPiFirmwareProtocolGuid, -+ NULL, -+ (VOID **)&mFwProtocol); -+ ASSERT_EFI_ERROR (Status); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ Status = gBS->CreateEventEx ( -+ EVT_NOTIFY_SIGNAL, -+ TPL_NOTIFY, -+ VirtualAddressChangeNotify, -+ NULL, -+ &gEfiEventVirtualAddressChangeGuid, -+ &VirtualAddressChangeEvent); -+ ASSERT_EFI_ERROR (Status); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ // -+ // Initial RTC time starts off at Epoch = 0, which is out -+ // of UEFI's bounds. Update it to the firmware build time. -+ // -+ Status = LibGetTime (&Time, NULL); -+ if (EFI_ERROR(Status)) { -+ return Status; -+ } -+ -+ if (!IsTimeValid (&Time)) { -+ EpochToEfiTime (BUILD_EPOCH, &Time); -+ Status = LibSetTime (&Time); -+ if (EFI_ERROR(Status)) { -+ return Status; -+ } -+ } -+ -+ return EFI_SUCCESS; -+} -diff --git a/Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.inf b/Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.inf -new file mode 100644 -index 00000000..f271f39c ---- /dev/null -+++ b/Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.inf -@@ -0,0 +1,42 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001A -+ BASE_NAME = RpiRtcLib -+ FILE_GUID = 2c823916-13b7-48f3-bb6d-a8cf438b91fd -+ MODULE_TYPE = BASE -+ VERSION_STRING = 1.0 -+ LIBRARY_CLASS = RealTimeClockLib -+ -+[Sources.common] -+ RpiRtcLib.c -+ -+[Packages] -+ EmbeddedPkg/EmbeddedPkg.dec -+ MdePkg/MdePkg.dec -+ Platform/RaspberryPi/RaspberryPi.dec -+ -+[LibraryClasses] -+ DebugLib -+ TimeBaseLib -+ UefiBootServicesTableLib -+ UefiRuntimeLib -+ -+[Guids] -+ gEfiEventVirtualAddressChangeGuid -+ -+[Protocols] -+ gRaspberryPiFirmwareProtocolGuid ## CONSUMES -+ -+[Depex] -+ gRaspberryPiFirmwareProtocolGuid -+ -+# Current usage of this library expects GCC in a UNIX-like shell environment with the date command -+[BuildOptions] -+ GCC:*_*_*_CC_FLAGS = -DBUILD_EPOCH=`date +%s` -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index f8e08de2..f2a1992e 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -547,7 +547,7 @@ - EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf - EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf { - -- RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf -+ RealTimeClockLib|Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.inf - } - EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0010-Platform-RaspberryPi-Enable-runtime-use-of-RpiFirmwa.patch b/packages/edk2/patches/platforms/0010-Platform-RaspberryPi-Enable-runtime-use-of-RpiFirmwa.patch deleted file mode 100644 index 7da10fd..0000000 --- a/packages/edk2/patches/platforms/0010-Platform-RaspberryPi-Enable-runtime-use-of-RpiFirmwa.patch +++ /dev/null @@ -1,245 +0,0 @@ -From eeb78653af963f45e371e2ac5ce09e1445158642 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 29 Dec 2023 23:49:33 +0200 -Subject: [PATCH 10/16] Platform/RaspberryPi: Enable runtime use of - RpiFirmwareDxe -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Mario Bălănică ---- - .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c | 91 ++++++++++++++++--- - .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf | 8 +- - 2 files changed, 87 insertions(+), 12 deletions(-) - -diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -index b432e828..64db6506 100644 ---- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -+++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -@@ -16,25 +16,29 @@ - #include - #include - #include -+#include - #include -+#include - #include - #include - #include - #include -+#include - - #include - #include - - #include - --#define MBOX_BASE_ADDRESS PcdGet64 (PcdFwMailboxBaseAddress) -- - // - // The number of statically allocated buffer pages - // - #define NUM_PAGES 1 - -+STATIC UINTN mMboxBaseAddress; -+ - STATIC VOID *mDmaBuffer; -+STATIC UINTN mDmaBufferSize; - STATIC VOID *mDmaBufferMapping; - STATIC UINTN mDmaBufferBusAddress; - -@@ -54,12 +58,12 @@ DrainMailbox ( - // - Tries = 0; - do { -- Val = MmioRead32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_STATUS_OFFSET); -+ Val = MmioRead32 (mMboxBaseAddress + BCM2836_MBOX_STATUS_OFFSET); - if (Val & (1U << BCM2836_MBOX_STATUS_EMPTY)) { - return TRUE; - } - ArmDataSynchronizationBarrier (); -- MmioRead32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_READ_OFFSET); -+ MmioRead32 (mMboxBaseAddress + BCM2836_MBOX_READ_OFFSET); - } while (++Tries < RPI_MBOX_MAX_TRIES); - - return FALSE; -@@ -79,7 +83,7 @@ MailboxWaitForStatusCleared ( - // - Tries = 0; - do { -- Val = MmioRead32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_STATUS_OFFSET); -+ Val = MmioRead32 (mMboxBaseAddress + BCM2836_MBOX_STATUS_OFFSET); - if ((Val & StatusMask) == 0) { - return TRUE; - } -@@ -119,12 +123,20 @@ MailboxTransaction ( - return EFI_TIMEOUT; - } - -+ // -+ // The DMA buffer is initially mapped as WC/Normal-NC, but it -+ // somehow ends up being cached at runtime. -+ // -+ if (EfiAtRuntime ()) { -+ WriteBackDataCacheRange (mDmaBuffer, mDmaBufferSize); -+ } -+ - ArmDataSynchronizationBarrier (); - - // - // Start the mailbox transaction - // -- MmioWrite32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_WRITE_OFFSET, -+ MmioWrite32 (mMboxBaseAddress + BCM2836_MBOX_WRITE_OFFSET, - (UINT32)((UINTN)mDmaBufferBusAddress | Channel)); - - ArmDataSynchronizationBarrier (); -@@ -138,11 +150,15 @@ MailboxTransaction ( - return EFI_TIMEOUT; - } - -+ if (EfiAtRuntime ()) { -+ InvalidateDataCacheRange (mDmaBuffer, mDmaBufferSize); -+ } -+ - // - // Read back the result - // - ArmDataSynchronizationBarrier (); -- *Result = MmioRead32 (MBOX_BASE_ADDRESS + BCM2836_MBOX_READ_OFFSET); -+ *Result = MmioRead32 (mMboxBaseAddress + BCM2836_MBOX_READ_OFFSET); - ArmDataSynchronizationBarrier (); - - return EFI_SUCCESS; -@@ -1463,6 +1479,20 @@ STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwareProtocol = { - RpiFirmwareSetRtc, - }; - -+STATIC -+VOID -+EFIAPI -+RpiFirmwareVirtualAddressChangeNotify ( -+ IN EFI_EVENT Event, -+ IN VOID *Context -+ ) -+{ -+ EfiConvertPointer (0x0, (VOID **)&mMboxBaseAddress); -+ EfiConvertPointer (0x0, (VOID **)&mDmaBuffer); -+ EfiConvertPointer (0x0, (VOID **)&mRpiFirmwareProtocol.GetRtc); -+ EfiConvertPointer (0x0, (VOID **)&mRpiFirmwareProtocol.SetRtc); -+} -+ - /** - Initialize the state information for the CPU Architectural Protocol - -@@ -1481,7 +1511,10 @@ RpiFirmwareDxeInitialize ( - ) - { - EFI_STATUS Status; -- UINTN BufferSize; -+ UINTN AlignedMboxAddress; -+ EFI_EVENT VirtualAddressChangeEvent = NULL; -+ -+ mMboxBaseAddress = PcdGet64 (PcdFwMailboxBaseAddress); - - // - // We only need one of these -@@ -1490,14 +1523,14 @@ RpiFirmwareDxeInitialize ( - - InitializeSpinLock (&mMailboxLock); - -- Status = DmaAllocateBuffer (EfiBootServicesData, NUM_PAGES, &mDmaBuffer); -+ Status = DmaAllocateBuffer (EfiRuntimeServicesData, NUM_PAGES, &mDmaBuffer); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: failed to allocate DMA buffer (Status == %r)\n", __FUNCTION__)); - return Status; - } - -- BufferSize = EFI_PAGES_TO_SIZE (NUM_PAGES); -- Status = DmaMap (MapOperationBusMasterCommonBuffer, mDmaBuffer, &BufferSize, -+ mDmaBufferSize = EFI_PAGES_TO_SIZE (NUM_PAGES); -+ Status = DmaMap (MapOperationBusMasterCommonBuffer, mDmaBuffer, &mDmaBufferSize, - &mDmaBufferBusAddress, &mDmaBufferMapping); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: failed to map DMA buffer (Status == %r)\n", __FUNCTION__)); -@@ -1520,6 +1553,42 @@ RpiFirmwareDxeInitialize ( - goto UnmapBuffer; - } - -+ AlignedMboxAddress = mMboxBaseAddress & ~(EFI_PAGE_SIZE - 1); -+ -+ Status = gDS->AddMemorySpace ( -+ EfiGcdMemoryTypeMemoryMappedIo, -+ AlignedMboxAddress, -+ EFI_PAGE_SIZE, -+ EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: AddMemorySpace failed. Status=%r\n", -+ __FUNCTION__, Status)); -+ goto UnmapBuffer; -+ } -+ -+ Status = gDS->SetMemorySpaceAttributes ( -+ AlignedMboxAddress, -+ EFI_PAGE_SIZE, -+ EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: SetMemorySpaceAttributes failed. Status=%r\n", -+ __FUNCTION__, Status)); -+ goto UnmapBuffer; -+ } -+ -+ Status = gBS->CreateEventEx ( -+ EVT_NOTIFY_SIGNAL, -+ TPL_NOTIFY, -+ RpiFirmwareVirtualAddressChangeNotify, -+ NULL, -+ &gEfiEventVirtualAddressChangeGuid, -+ &VirtualAddressChangeEvent); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: failed to register for virtual address change. Status=%r\n", -+ __func__, Status)); -+ goto UnmapBuffer; -+ } -+ - return EFI_SUCCESS; - - UnmapBuffer: -diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -index 08acc4b3..1ab8d0b7 100644 ---- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -+++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf -@@ -11,7 +11,7 @@ - INF_VERSION = 0x0001001A - BASE_NAME = RpiFirmwareDxe - FILE_GUID = 6d4628df-49a0-4b67-a325-d5af35c65745 -- MODULE_TYPE = DXE_DRIVER -+ MODULE_TYPE = DXE_RUNTIME_DRIVER - VERSION_STRING = 1.0 - ENTRY_POINT = RpiFirmwareDxeInitialize - -@@ -29,13 +29,19 @@ - ArmLib - BaseLib - BaseMemoryLib -+ CacheMaintenanceLib - DebugLib - DmaLib -+ DxeServicesTableLib - IoLib - SynchronizationLib - UefiBootServicesTableLib - UefiDriverEntryPoint - UefiLib -+ UefiRuntimeLib -+ -+[Guids] -+ gEfiEventVirtualAddressChangeGuid - - [Protocols] - gRaspberryPiFirmwareProtocolGuid ## PRODUCES --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0011-Platform-RaspberryPi-Add-option-to-disable-EFI-Memor.patch b/packages/edk2/patches/platforms/0011-Platform-RaspberryPi-Add-option-to-disable-EFI-Memor.patch deleted file mode 100644 index 1e29191..0000000 --- a/packages/edk2/patches/platforms/0011-Platform-RaspberryPi-Add-option-to-disable-EFI-Memor.patch +++ /dev/null @@ -1,511 +0,0 @@ -From 207315a9fadbfbe7de68cec9e47a0a9be8fea882 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Sun, 31 Dec 2023 21:04:23 +0200 -Subject: [PATCH 11/16] =?UTF-8?q?=EF=BB=BFPlatform/RaspberryPi:=20Add=20op?= - =?UTF-8?q?tion=20to=20disable=20EFI=20Memory=20Attribute=20Protocol?= -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Introduce a driver that allows disabling this protocol via a HII option. -Default is enabled, which can also be overridden at build time by -changing `gRaspberryPiTokenSpaceGuid.PcdMemoryAttributeEnabledDefault`. - -This should probably be done in core EDK2 though, it's clear that it -will take distros more time to catch up and suddenly breaking -compatibility like this isn't great for end users. - -Signed-off-by: Mario Bălănică ---- - .../MemoryAttributeManagerDxe.c | 180 ++++++++++++++++++ - .../MemoryAttributeManagerDxe.h | 22 +++ - .../MemoryAttributeManagerDxe.inf | 47 +++++ - .../MemoryAttributeManagerDxeHii.uni | 17 ++ - .../MemoryAttributeManagerDxeHii.vfr | 35 ++++ - .../Guid/MemoryAttributeManagerFormSet.h | 17 ++ - Platform/RaspberryPi/RPi3/RPi3.dsc | 5 + - Platform/RaspberryPi/RPi3/RPi3.fdf | 5 + - Platform/RaspberryPi/RPi4/RPi4.dsc | 5 + - Platform/RaspberryPi/RPi4/RPi4.fdf | 5 + - Platform/RaspberryPi/RPi5/RPi5.dsc | 5 + - Platform/RaspberryPi/RPi5/RPi5.fdf | 5 + - Platform/RaspberryPi/RaspberryPi.dec | 2 + - 13 files changed, 350 insertions(+) - create mode 100644 Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.c - create mode 100644 Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.h - create mode 100644 Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf - create mode 100644 Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxeHii.uni - create mode 100644 Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxeHii.vfr - create mode 100644 Platform/RaspberryPi/Include/Guid/MemoryAttributeManagerFormSet.h - -diff --git a/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.c b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.c -new file mode 100644 -index 00000000..0c6f6e28 ---- /dev/null -+++ b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.c -@@ -0,0 +1,180 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "MemoryAttributeManagerDxe.h" -+ -+extern UINT8 MemoryAttributeManagerDxeHiiBin[]; -+extern UINT8 MemoryAttributeManagerDxeStrings[]; -+ -+typedef struct { -+ VENDOR_DEVICE_PATH VendorDevicePath; -+ EFI_DEVICE_PATH_PROTOCOL End; -+} HII_VENDOR_DEVICE_PATH; -+ -+STATIC HII_VENDOR_DEVICE_PATH mVendorDevicePath = { -+ { -+ { -+ HARDWARE_DEVICE_PATH, -+ HW_VENDOR_DP, -+ { -+ (UINT8)(sizeof (VENDOR_DEVICE_PATH)), -+ (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8) -+ } -+ }, -+ MEMORY_ATTRIBUTE_MANAGER_FORMSET_GUID -+ }, -+ { -+ END_DEVICE_PATH_TYPE, -+ END_ENTIRE_DEVICE_PATH_SUBTYPE, -+ { -+ (UINT8)(END_DEVICE_PATH_LENGTH), -+ (UINT8)((END_DEVICE_PATH_LENGTH) >> 8) -+ } -+ } -+}; -+ -+STATIC -+EFI_STATUS -+EFIAPI -+InstallHiiPages ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_HII_HANDLE HiiHandle; -+ EFI_HANDLE DriverHandle; -+ -+ DriverHandle = NULL; -+ Status = gBS->InstallMultipleProtocolInterfaces ( -+ &DriverHandle, -+ &gEfiDevicePathProtocolGuid, -+ &mVendorDevicePath, -+ NULL -+ ); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ HiiHandle = HiiAddPackages ( -+ &gMemoryAttributeManagerFormSetGuid, -+ DriverHandle, -+ MemoryAttributeManagerDxeStrings, -+ MemoryAttributeManagerDxeHiiBin, -+ NULL -+ ); -+ -+ if (HiiHandle == NULL) { -+ gBS->UninstallMultipleProtocolInterfaces ( -+ DriverHandle, -+ &gEfiDevicePathProtocolGuid, -+ &mVendorDevicePath, -+ NULL -+ ); -+ return EFI_OUT_OF_RESOURCES; -+ } -+ -+ return EFI_SUCCESS; -+} -+ -+/** -+ This function uninstalls the recently added EFI_MEMORY_ATTRIBUTE_PROTOCOL -+ to workaround older versions of OS loaders/shims using it incorrectly and -+ throwing a Synchronous Exception. -+ See: -+ - https://github.com/microsoft/mu_silicon_arm_tiano/issues/124 -+ - https://edk2.groups.io/g/devel/topic/99631663 -+**/ -+STATIC -+VOID -+UninstallEfiMemoryAttributeProtocol ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_HANDLE Handle; -+ UINTN Size; -+ VOID *MemoryAttributeProtocol; -+ -+ Size = sizeof (Handle); -+ Status = gBS->LocateHandle ( -+ ByProtocol, -+ &gEfiMemoryAttributeProtocolGuid, -+ NULL, -+ &Size, -+ &Handle -+ ); -+ if (EFI_ERROR (Status)) { -+ ASSERT (Status == EFI_NOT_FOUND); -+ return; -+ } -+ -+ Status = gBS->HandleProtocol ( -+ Handle, -+ &gEfiMemoryAttributeProtocolGuid, -+ &MemoryAttributeProtocol -+ ); -+ ASSERT_EFI_ERROR (Status); -+ if (EFI_ERROR (Status)) { -+ return; -+ } -+ -+ Status = gBS->UninstallProtocolInterface ( -+ Handle, -+ &gEfiMemoryAttributeProtocolGuid, -+ MemoryAttributeProtocol -+ ); -+ ASSERT_EFI_ERROR (Status); -+ -+ DEBUG ((DEBUG_INFO, "%a: Done!\n", __func__)); -+} -+ -+EFI_STATUS -+EFIAPI -+MemoryAttributeManagerInitialize ( -+ IN EFI_HANDLE ImageHandle, -+ IN EFI_SYSTEM_TABLE *SystemTable -+ ) -+{ -+ EFI_STATUS Status; -+ UINTN Size; -+ MEMORY_ATTRIBUTE_MANAGER_VARSTORE_DATA Config; -+ -+ Config.Enabled = PROTOCOL_ENABLED_DEFAULT; -+ -+ Size = sizeof (MEMORY_ATTRIBUTE_MANAGER_VARSTORE_DATA); -+ Status = gRT->GetVariable ( -+ MEMORY_ATTRIBUTE_MANAGER_DATA_VAR_NAME, -+ &gMemoryAttributeManagerFormSetGuid, -+ NULL, -+ &Size, -+ &Config -+ ); -+ if (EFI_ERROR (Status)) { -+ Status = gRT->SetVariable ( -+ MEMORY_ATTRIBUTE_MANAGER_DATA_VAR_NAME, -+ &gMemoryAttributeManagerFormSetGuid, -+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS, -+ Size, -+ &Config -+ ); -+ ASSERT_EFI_ERROR (Status); -+ } -+ -+ if (!Config.Enabled) { -+ UninstallEfiMemoryAttributeProtocol (); -+ } -+ -+ return InstallHiiPages (); -+} -diff --git a/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.h b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.h -new file mode 100644 -index 00000000..9db0568d ---- /dev/null -+++ b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.h -@@ -0,0 +1,22 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __MEMORY_ATTRIBUTE_MANAGER_DXE_H__ -+#define __MEMORY_ATTRIBUTE_MANAGER_DXE_H__ -+ -+#include -+ -+#define PROTOCOL_ENABLED_DEFAULT FixedPcdGetBool(PcdMemoryAttributeEnabledDefault) -+ -+#define MEMORY_ATTRIBUTE_MANAGER_DATA_VAR_NAME L"MemoryAttributeManagerData" -+ -+typedef struct { -+ BOOLEAN Enabled; -+} MEMORY_ATTRIBUTE_MANAGER_VARSTORE_DATA; -+ -+#endif // __MEMORY_ATTRIBUTE_MANAGER_DXE_H__ -diff --git a/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf -new file mode 100644 -index 00000000..ae36810d ---- /dev/null -+++ b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf -@@ -0,0 +1,47 @@ -+#/** @file -+# -+# Copyright (c) 2023, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001B -+ BASE_NAME = MemoryAttributeManagerDxe -+ FILE_GUID = 5319346b-66ad-433a-9a91-f7fc286bc9a1 -+ MODULE_TYPE = DXE_DRIVER -+ VERSION_STRING = 1.0 -+ ENTRY_POINT = MemoryAttributeManagerInitialize -+ -+[Sources] -+ MemoryAttributeManagerDxe.c -+ MemoryAttributeManagerDxeHii.uni -+ MemoryAttributeManagerDxeHii.vfr -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ MdeModulePkg/MdeModulePkg.dec -+ Platform/RaspberryPi/RaspberryPi.dec -+ -+[LibraryClasses] -+ DebugLib -+ DevicePathLib -+ HiiLib -+ UefiBootServicesTableLib -+ UefiRuntimeServicesTableLib -+ UefiDriverEntryPoint -+ -+[Guids] -+ gMemoryAttributeManagerFormSetGuid -+ -+[Protocols] -+ gEfiMemoryAttributeProtocolGuid -+ -+[Pcd] -+ gRaspberryPiTokenSpaceGuid.PcdMemoryAttributeEnabledDefault -+ -+[Depex] -+ gEfiVariableArchProtocolGuid -+ AND gEfiVariableWriteArchProtocolGuid -+ AND gEfiMemoryAttributeProtocolGuid -diff --git a/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxeHii.uni b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxeHii.uni -new file mode 100644 -index 00000000..f78ed725 ---- /dev/null -+++ b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxeHii.uni -@@ -0,0 +1,17 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#langdef en-US "English" -+ -+#string STR_NULL_STRING #language en-US "" -+ -+#string STR_FORM_SET_TITLE #language en-US "EFI Memory Attribute Protocol" -+#string STR_FORM_SET_TITLE_HELP #language en-US "Configure the state of the EFI Memory Attribute Protocol." -+ -+#string STR_ENABLE_PROTOCOL_PROMPT #language en-US "Enable Protocol" -+#string STR_ENABLE_PROTOCOL_HELP #language en-US "Some OS loader versions do not properly support the memory attribute protocol and may cause a Synchronous Exception. This option can be disabled to work around the issue." -diff --git a/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxeHii.vfr b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxeHii.vfr -new file mode 100644 -index 00000000..cdf2be8b ---- /dev/null -+++ b/Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxeHii.vfr -@@ -0,0 +1,35 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+ -+#include "MemoryAttributeManagerDxe.h" -+ -+formset -+ guid = MEMORY_ATTRIBUTE_MANAGER_FORMSET_GUID, -+ title = STRING_TOKEN(STR_FORM_SET_TITLE), -+ help = STRING_TOKEN(STR_FORM_SET_TITLE_HELP), -+ classguid = EFI_HII_PLATFORM_SETUP_FORMSET_GUID, -+ -+ efivarstore MEMORY_ATTRIBUTE_MANAGER_VARSTORE_DATA, -+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE, -+ name = MemoryAttributeManagerData, -+ guid = MEMORY_ATTRIBUTE_MANAGER_FORMSET_GUID; -+ -+ form formid = 1, -+ title = STRING_TOKEN(STR_FORM_SET_TITLE); -+ -+ checkbox varid = MemoryAttributeManagerData.Enabled, -+ prompt = STRING_TOKEN(STR_ENABLE_PROTOCOL_PROMPT), -+ help = STRING_TOKEN(STR_ENABLE_PROTOCOL_HELP), -+ flags = CHECKBOX_DEFAULT | CHECKBOX_DEFAULT_MFG | RESET_REQUIRED, -+ default = PROTOCOL_ENABLED_DEFAULT, -+ endcheckbox; -+ endform; -+endformset; -diff --git a/Platform/RaspberryPi/Include/Guid/MemoryAttributeManagerFormSet.h b/Platform/RaspberryPi/Include/Guid/MemoryAttributeManagerFormSet.h -new file mode 100644 -index 00000000..b480f313 ---- /dev/null -+++ b/Platform/RaspberryPi/Include/Guid/MemoryAttributeManagerFormSet.h -@@ -0,0 +1,17 @@ -+/** @file -+ * -+ * Copyright (c) 2023, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __MEMORY_ATTRIBUTE_MANAGER_FORMSET_H__ -+#define __MEMORY_ATTRIBUTE_MANAGER_FORMSET_H__ -+ -+#define MEMORY_ATTRIBUTE_MANAGER_FORMSET_GUID \ -+ { 0xefab3427, 0x4793, 0x4e9e, { 0xaa, 0x29, 0x88, 0x0c, 0x9a, 0x77, 0x5b, 0x5f } } -+ -+extern EFI_GUID gMemoryAttributeManagerFormSetGuid; -+ -+#endif // __MEMORY_ATTRIBUTE_MANAGER_FORMSET_H__ -diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3/RPi3.dsc -index 9c549ac7..99762f20 100644 ---- a/Platform/RaspberryPi/RPi3/RPi3.dsc -+++ b/Platform/RaspberryPi/RPi3/RPi3.dsc -@@ -736,6 +736,11 @@ - # - Silicon/Broadcom/Bcm283x/Drivers/Bcm2835RngDxe/Bcm2835RngDxe.inf - -+ # -+ # EFI Memory Attribute Protocol Manager -+ # -+ Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf -+ - # - # UEFI application (Shell Embedded Boot Loader) - # -diff --git a/Platform/RaspberryPi/RPi3/RPi3.fdf b/Platform/RaspberryPi/RPi3/RPi3.fdf -index 3c569f57..ae1e0628 100644 ---- a/Platform/RaspberryPi/RPi3/RPi3.fdf -+++ b/Platform/RaspberryPi/RPi3/RPi3.fdf -@@ -230,6 +230,11 @@ READ_LOCK_STATUS = TRUE - INF FatPkg/EnhancedFatDxe/Fat.inf - INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - -+ # -+ # EFI Memory Attribute Protocol Manager -+ # -+ INF Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf -+ - # - # UEFI application (Shell Embedded Boot Loader) - # -diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc -index ba839fd1..a48092c1 100644 ---- a/Platform/RaspberryPi/RPi4/RPi4.dsc -+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc -@@ -782,6 +782,11 @@ - # - MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf - -+ # -+ # EFI Memory Attribute Protocol Manager -+ # -+ Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf -+ - # - # UEFI application (Shell Embedded Boot Loader) - # -diff --git a/Platform/RaspberryPi/RPi4/RPi4.fdf b/Platform/RaspberryPi/RPi4/RPi4.fdf -index 81692776..4f2fc5bd 100644 ---- a/Platform/RaspberryPi/RPi4/RPi4.fdf -+++ b/Platform/RaspberryPi/RPi4/RPi4.fdf -@@ -227,6 +227,11 @@ READ_LOCK_STATUS = TRUE - INF FatPkg/EnhancedFatDxe/Fat.inf - INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - -+ # -+ # EFI Memory Attribute Protocol Manager -+ # -+ INF Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf -+ - # - # UEFI application (Shell Embedded Boot Loader) - # -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index f2a1992e..15f6e1a3 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -668,6 +668,11 @@ - # - MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf - -+ # -+ # EFI Memory Attribute Protocol Manager -+ # -+ Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf -+ - # - # UEFI application (Shell Embedded Boot Loader) - # -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index bfe6a90e..1507e39d 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -228,6 +228,11 @@ READ_LOCK_STATUS = TRUE - INF FatPkg/EnhancedFatDxe/Fat.inf - INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - -+ # -+ # EFI Memory Attribute Protocol Manager -+ # -+ INF Platform/RaspberryPi/Drivers/MemoryAttributeManagerDxe/MemoryAttributeManagerDxe.inf -+ - # - # UEFI application (Shell Embedded Boot Loader) - # -diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/RaspberryPi.dec -index d0025cf6..0c636cbf 100644 ---- a/Platform/RaspberryPi/RaspberryPi.dec -+++ b/Platform/RaspberryPi/RaspberryPi.dec -@@ -26,6 +26,7 @@ - gRaspberryPiTokenSpaceGuid = {0xCD7CC258, 0x31DB, 0x11E6, {0x9F, 0xD3, 0x63, 0xB0, 0xB8, 0xEE, 0xD6, 0xB5}} - gRaspberryPiEventResetGuid = {0xCD7CC258, 0x31DB, 0x11E6, {0x9F, 0xD3, 0x63, 0xB4, 0xB4, 0xE4, 0xD4, 0xB4}} - gConfigDxeFormSetGuid = {0xCD7CC258, 0x31DB, 0x22E6, {0x9F, 0x22, 0x63, 0xB0, 0xB8, 0xEE, 0xD6, 0xB5}} -+ gMemoryAttributeManagerFormSetGuid = { 0xefab3427, 0x4793, 0x4e9e, { 0xaa, 0x29, 0x88, 0x0c, 0x9a, 0x77, 0x5b, 0x5f } } - - [PcdsFixedAtBuild.common] - # -@@ -75,3 +76,4 @@ - gRaspberryPiTokenSpaceGuid.PcdXhciPci|0|UINT32|0x00000022 - gRaspberryPiTokenSpaceGuid.PcdMiniUartClockRate|0|UINT32|0x00000023 - gRaspberryPiTokenSpaceGuid.PcdXhciReload|0|UINT32|0x00000024 -+ gRaspberryPiTokenSpaceGuid.PcdMemoryAttributeEnabledDefault|TRUE|BOOLEAN|0x00000025 --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0012-Platform-RPi5-Enable-RNG.patch b/packages/edk2/patches/platforms/0012-Platform-RPi5-Enable-RNG.patch deleted file mode 100644 index dc6cf99..0000000 --- a/packages/edk2/patches/platforms/0012-Platform-RPi5-Enable-RNG.patch +++ /dev/null @@ -1,197 +0,0 @@ -From 8d8d28f2e5f2c2d0ceb8ac6695575608d6d3eda5 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 5 Jan 2024 19:17:57 +0200 -Subject: [PATCH 12/16] Platform/RPi5: Enable RNG -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Mario Bălănică ---- - Platform/RaspberryPi/RPi4/RPi4.dsc | 5 +++++ - Platform/RaspberryPi/RPi5/RPi5.dsc | 7 +++++- - Platform/RaspberryPi/RPi5/RPi5.fdf | 2 +- - Silicon/Broadcom/Bcm283x/Bcm283x.dec | 1 + - .../Drivers/Bcm2838RngDxe/Bcm2838RngDxe.c | 14 +++++++----- - .../Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf | 2 +- - .../Include/IndustryStandard/Bcm2838Rng.h | 22 ++++++++----------- - 7 files changed, 32 insertions(+), 21 deletions(-) - -diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc -index a48092c1..02aae204 100644 ---- a/Platform/RaspberryPi/RPi4/RPi4.dsc -+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc -@@ -461,6 +461,11 @@ - # - gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress|0xfe00b880 - -+ # -+ # RNG -+ # -+ gBcm283xTokenSpaceGuid.PcdBcm2838RngBaseAddress|0x7e104000 -+ - # - # Fixed CPU settings. - # -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 15f6e1a3..4f128fe0 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -438,6 +438,11 @@ - # - gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress|0x107c013880 - -+ # -+ # RNG -+ # -+ gBcm283xTokenSpaceGuid.PcdBcm2838RngBaseAddress|0x107d208000 -+ - # - # RP1 BAR1 preconfigured by the VPU - # -@@ -643,7 +648,7 @@ - # - # RNG - # -- # Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf -+ Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf - - # - # PCI Support -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index 1507e39d..4a5a05f6 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -278,7 +278,7 @@ READ_LOCK_STATUS = TRUE - # - # RNG - # -- # INF Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf -+ INF Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf - - # - # PCI Support -diff --git a/Silicon/Broadcom/Bcm283x/Bcm283x.dec b/Silicon/Broadcom/Bcm283x/Bcm283x.dec -index 5b839b00..c4f40216 100644 ---- a/Silicon/Broadcom/Bcm283x/Bcm283x.dec -+++ b/Silicon/Broadcom/Bcm283x/Bcm283x.dec -@@ -21,3 +21,4 @@ - - [PcdsFixedAtBuild.common] - gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress|0x0|UINT32|0x00000001 -+ gBcm283xTokenSpaceGuid.PcdBcm2838RngBaseAddress|0x0|UINT64|0x00000002 -diff --git a/Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.c b/Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.c -index 5737876e..ec4ecc0a 100644 ---- a/Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.c -+++ b/Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.c -@@ -24,6 +24,8 @@ - #define RNG_WARMUP_COUNT 0x40000 - #define RNG_MAX_RETRIES 0x100 // arbitrary upper bound - -+STATIC EFI_PHYSICAL_ADDRESS mRngBase; -+ - /** - Returns information about the random number generation implementation. - -@@ -110,7 +112,7 @@ Bcm2838RngReadValue ( - - ASSERT (Val != NULL); - -- Avail = MmioRead32 (RNG_FIFO_COUNT) & RNG_FIFO_DATA_AVAIL_MASK; -+ Avail = MmioRead32 (mRngBase + RNG_FIFO_COUNT) & RNG_FIFO_DATA_AVAIL_MASK; - - // - // If we don't have a value ready, wait 1 us and retry. -@@ -131,13 +133,13 @@ Bcm2838RngReadValue ( - // - for (i = 0; Avail < 1 && i < RNG_MAX_RETRIES; i++) { - MicroSecondDelay (1); -- Avail = MmioRead32 (RNG_FIFO_COUNT) & RNG_FIFO_DATA_AVAIL_MASK; -+ Avail = MmioRead32 (mRngBase + RNG_FIFO_COUNT) & RNG_FIFO_DATA_AVAIL_MASK; - } - if (Avail < 1) { - return EFI_NOT_READY; - } - -- *Val = MmioRead32 (RNG_FIFO_DATA); -+ *Val = MmioRead32 (mRngBase + RNG_FIFO_DATA); - - return EFI_SUCCESS; - } -@@ -246,6 +248,8 @@ Bcm2838RngEntryPoint ( - { - EFI_STATUS Status; - -+ mRngBase = PcdGet64 (PcdBcm2838RngBaseAddress); -+ - Status = gBS->InstallMultipleProtocolInterfaces (&ImageHandle, - &gEfiRngProtocolGuid, &mBcm2838RngProtocol, - NULL); -@@ -257,7 +261,7 @@ Bcm2838RngEntryPoint ( - // This results in the RNG holding off from populating any value into the - // FIFO until the value below has been reached in RNG_BIT_COUNT. - // -- MmioWrite32 (RNG_BIT_COUNT_THRESHOLD, RNG_WARMUP_COUNT); -+ MmioWrite32 (mRngBase + RNG_BIT_COUNT_THRESHOLD, RNG_WARMUP_COUNT); - - // - // We would disable RNG interrupts here... if we had access to the datasheet. -@@ -278,7 +282,7 @@ Bcm2838RngEntryPoint ( - // instead of single bits, which may be unintended. But since we don't have - // any public documentation on what each of these bits do, we follow suit. - // -- MmioWrite32 (RNG_CTRL, -+ MmioWrite32 (mRngBase + RNG_CTRL, - RNG_CTRL_ENABLE_MASK | (3 << RNG_CTRL_SAMPLE_RATE_DIVISOR_SHIFT)); - - return EFI_SUCCESS; -diff --git a/Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf b/Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf -index fdc1b257..dadd5765 100644 ---- a/Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf -+++ b/Silicon/Broadcom/Bcm283x/Drivers/Bcm2838RngDxe/Bcm2838RngDxe.inf -@@ -40,7 +40,7 @@ - gEfiRngAlgorithmRaw - - [FixedPcd] -- gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress -+ gBcm283xTokenSpaceGuid.PcdBcm2838RngBaseAddress - - [Depex] - TRUE -diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2838Rng.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2838Rng.h -index 003866fa..8b321151 100644 ---- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2838Rng.h -+++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2838Rng.h -@@ -9,19 +9,15 @@ - #ifndef BCM2838_RNG_H__ - #define BCM2838_RNG_H__ - --#define BCM2838_RNG_OFFSET 0x00104000 --#define RNG_BASE_ADDRESS ((FixedPcdGet64 (PcdBcm283xRegistersAddress)) \ -- + BCM2838_RNG_OFFSET) -- --#define RNG_CTRL (RNG_BASE_ADDRESS + 0x0) --#define RNG_STATUS (RNG_BASE_ADDRESS + 0x4) --#define RNG_DATA (RNG_BASE_ADDRESS + 0x8) --#define RNG_BIT_COUNT (RNG_BASE_ADDRESS + 0xc) --#define RNG_BIT_COUNT_THRESHOLD (RNG_BASE_ADDRESS + 0x10) --#define RNG_INT_STATUS (RNG_BASE_ADDRESS + 0x18) --#define RNG_INT_ENABLE (RNG_BASE_ADDRESS + 0x1c) --#define RNG_FIFO_DATA (RNG_BASE_ADDRESS + 0x20) --#define RNG_FIFO_COUNT (RNG_BASE_ADDRESS + 0x24) -+#define RNG_CTRL 0x0 -+#define RNG_STATUS 0x4 -+#define RNG_DATA 0x8 -+#define RNG_BIT_COUNT 0xc -+#define RNG_BIT_COUNT_THRESHOLD 0x10 -+#define RNG_INT_STATUS 0x18 -+#define RNG_INT_ENABLE 0x1c -+#define RNG_FIFO_DATA 0x20 -+#define RNG_FIFO_COUNT 0x24 - - #define RNG_CTRL_ENABLE_MASK 0x1fff - #define RNG_CTRL_SAMPLE_RATE_DIVISOR_SHIFT 13 // Unmasked bits from above --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0013-Platform-RPi5-Add-FDT-system-table-support.patch b/packages/edk2/patches/platforms/0013-Platform-RPi5-Add-FDT-system-table-support.patch deleted file mode 100644 index d3e2c2f..0000000 --- a/packages/edk2/patches/platforms/0013-Platform-RPi5-Add-FDT-system-table-support.patch +++ /dev/null @@ -1,389 +0,0 @@ -From cc780563b58b849e002358eaccf4afabcc6065da Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 5 Jan 2024 19:30:54 +0200 -Subject: [PATCH 13/16] =?UTF-8?q?=EF=BB=BFPlatform/RPi5:=20Add=20FDT=20sys?= - =?UTF-8?q?tem=20table=20support?= -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Mario Bălănică ---- - Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c | 62 +++++++++------- - .../RaspberryPi/Drivers/FdtDxe/FdtDxe.inf | 4 +- - .../RPi5/Drivers/RpiPlatformDxe/ConfigTable.c | 17 +++++ - .../Drivers/RpiPlatformDxe/RpiPlatformDxe.inf | 3 + - .../RpiPlatformDxe/RpiPlatformDxeHii.uni | 12 +++- - .../RpiPlatformDxe/RpiPlatformDxeHii.vfr | 71 ++++++++++++------- - Platform/RaspberryPi/RPi5/RPi5.dsc | 11 ++- - Platform/RaspberryPi/RPi5/RPi5.fdf | 2 +- - 8 files changed, 125 insertions(+), 57 deletions(-) - -diff --git a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c -index fadf262f..5ad3c708 100644 ---- a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c -+++ b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c -@@ -9,8 +9,11 @@ - #include - - #include -+#include -+#include - #include - #include -+#include - #include - #include - #include -@@ -22,6 +25,7 @@ - STATIC VOID *mFdtImage; - - STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol; -+STATIC UINT32 mBoardRevision; - - STATIC - EFI_STATUS -@@ -461,9 +465,15 @@ FdtDxeInitialize ( - (VOID**)&mFwProtocol); - ASSERT_EFI_ERROR (Status); - -- FdtImage = (VOID*)(UINTN)PcdGet32 (PcdFdtBaseAddress); -- Retval = fdt_check_header (FdtImage); -- if (Retval != 0) { -+ Status = BoardInfoGetRevisionCode (&mBoardRevision); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, -+ "%a: Failed to get board revision code. Status=%r\n", -+ __func__, Status)); -+ } -+ -+ FdtImage = FdtPlatformGetBase (); -+ if (FdtImage == NULL) { - /* - * Any one of: - * - Invalid config.txt device_tree_address (not PcdFdtBaseAddress) -@@ -497,39 +507,41 @@ FdtDxeInitialize ( - * These are all best-effort. - */ - -- Status = SanitizePSCI (); -- if (EFI_ERROR (Status)) { -- Print (L"Failed to sanitize PSCI: %r\n", Status); -- } -- - Status = CleanMemoryNodes (); - if (EFI_ERROR (Status)) { -- Print (L"Failed to clean memory nodes: %r\n", Status); -+ DEBUG ((DEBUG_ERROR, "Failed to clean memory nodes: %r\n", Status)); - } - - Status = CleanSimpleFramebuffer (); - if (EFI_ERROR (Status)) { -- Print (L"Failed to clean frame buffer: %r\n", Status); -+ DEBUG ((DEBUG_ERROR, "Failed to clean frame buffer: %r\n", Status)); - } - -- Status = FixEthernetAliases (); -- if (EFI_ERROR (Status)) { -- Print (L"Failed to fix ethernet aliases: %r\n", Status); -- } -+ if (BoardRevisionGetModelFamily (mBoardRevision) < 5) { -+ Status = SanitizePSCI (); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "Failed to sanitize PSCI: %r\n", Status)); -+ } - -- Status = UpdateMacAddress (); -- if (EFI_ERROR (Status)) { -- Print (L"Failed to update MAC address: %r\n", Status); -- } -+ Status = FixEthernetAliases (); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "Failed to fix ethernet aliases: %r\n", Status)); -+ } - -- Status = AddUsbCompatibleProperty (); -- if (EFI_ERROR (Status)) { -- Print (L"Failed to update USB compatible properties: %r\n", Status); -- } -+ Status = UpdateMacAddress (); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "Failed to update MAC address: %r\n", Status)); -+ } - -- SyncPcie (); -- if (EFI_ERROR (Status)) { -- Print (L"Failed to update PCIe address ranges: %r\n", Status); -+ Status = AddUsbCompatibleProperty (); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "Failed to update USB compatible properties: %r\n", Status)); -+ } -+ -+ Status = SyncPcie (); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "Failed to update PCIe address ranges: %r\n", Status)); -+ } - } - - DEBUG ((DEBUG_INFO, "Installed devicetree at address %p\n", mFdtImage)); -diff --git a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -index 90e138af..1ea2fe40 100644 ---- a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -+++ b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -@@ -27,9 +27,12 @@ - - [LibraryClasses] - BaseLib -+ BoardInfoLib -+ BoardRevisionHelperLib - DebugLib - DxeServicesLib - FdtLib -+ FdtPlatformLib - MemoryAllocationLib - UefiBootServicesTableLib - UefiDriverEntryPoint -@@ -50,7 +53,6 @@ - gBcm27xxTokenSpaceGuid.PcdBcm27xxPciBusMmioLen - gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr - -- - [Pcd] - gRaspberryPiTokenSpaceGuid.PcdSystemTableMode - gRaspberryPiTokenSpaceGuid.PcdXhciReload -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c -index da86e2e0..9aadb325 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - - #include "ConfigTable.h" - -@@ -108,6 +109,12 @@ ApplyConfigTableVariables ( - { - EFI_STATUS Status; - -+ if (PcdGet32 (PcdSystemTableMode) != SYSTEM_TABLE_MODE_ACPI -+ && PcdGet32 (PcdSystemTableMode) != SYSTEM_TABLE_MODE_BOTH) { -+ // FDT is taken care of by FdtDxe. -+ return; -+ } -+ - Status = LocateAndInstallAcpiFromFvConditional (&mAcpiTableFile, NULL); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables!\n")); -@@ -128,6 +135,7 @@ SetupConfigTableVariables ( - { - EFI_STATUS Status; - UINTN Size; -+ UINT32 Var32; - - AcpiSdCompatMode.Value = ACPI_SD_COMPAT_MODE_DEFAULT; - AcpiSdLimitUhs.Value = ACPI_SD_LIMIT_UHS_DEFAULT; -@@ -159,4 +167,13 @@ SetupConfigTableVariables ( - &AcpiSdLimitUhs); - ASSERT_EFI_ERROR (Status); - } -+ -+ Size = sizeof (UINT32); -+ Status = gRT->GetVariable (L"SystemTableMode", -+ &gRpiPlatformFormSetGuid, -+ NULL, &Size, &Var32); -+ if (EFI_ERROR (Status)) { -+ Status = PcdSet32S (PcdSystemTableMode, PcdGet32 (PcdSystemTableMode)); -+ ASSERT_EFI_ERROR (Status); -+ } - } -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -index b1cb4303..6bb48c3f 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -@@ -48,6 +48,9 @@ - gEfiAcpiSdtProtocolGuid ## CONSUMES - gBrcmStbSdhciDeviceProtocolGuid ## PRODUCES - -+[Pcd] -+ gRaspberryPiTokenSpaceGuid.PcdSystemTableMode -+ - [Depex] - gEfiVariableArchProtocolGuid - AND gEfiVariableWriteArchProtocolGuid -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni -index 7f362922..5cb460f6 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni -@@ -17,10 +17,16 @@ - /* - * ACPI / Device Tree configuration - */ --#string STR_CONFIG_TABLE_FORM_TITLE #language en-US "ACPI / Device Tree" --#string STR_CONFIG_TABLE_FORM_HELP #language en-US "Configure the ACPI and Device Tree system tables support." -+#string STR_SYSTEM_TABLE_FORM_TITLE #language en-US "ACPI / Device Tree" -+#string STR_SYSTEM_TABLE_FORM_HELP #language en-US "Configure the ACPI and Device Tree system tables support." - --#string STR_CONFIG_TABLE_ACPI_SUBTITLE #language en-US "ACPI Configuration" -+#string STR_SYSTEM_TABLE_MODE_PROMPT #language en-US "System Table Mode" -+#string STR_SYSTEM_TABLE_MODE_HELP #language en-US "Choose what system tables to expose to the OS.\n\nACPI - provides basic hardware support (USB, SD) for most OS/kernel versions.\n\nDevice Tree - provides extensive hardware support specific to a kernel version.\nUEFI hands over the DTB and overlays passed by the VPU firmware, which reside in the boot partition.\n\nIf both are exposed, the OS will decide which one to use." -+#string STR_SYSTEM_TABLE_MODE_ACPI #language en-US "ACPI" -+#string STR_SYSTEM_TABLE_MODE_FDT #language en-US "Device Tree" -+#string STR_SYSTEM_TABLE_MODE_ACPI_FDT #language en-US "Both" -+ -+#string STR_SYSTEM_TABLE_ACPI_SUBTITLE #language en-US "ACPI Configuration" - - #string STR_ACPI_SD_SUBTITLE #language en-US "Broadcom SD Host Controller" - -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr -index 65163f10..e5ee4b3e 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - - #include "ConfigTable.h" - -@@ -19,15 +20,20 @@ formset - help = STRING_TOKEN(STR_FORM_SET_TITLE_HELP), - classguid = EFI_HII_PLATFORM_SETUP_FORMSET_GUID, - -+ efivarstore SYSTEM_TABLE_MODE_VARSTORE_DATA, -+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -+ name = SystemTableMode, -+ guid = RPI_PLATFORM_FORMSET_GUID; -+ - efivarstore ACPI_SD_COMPAT_MODE_VARSTORE_DATA, -- attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -- name = AcpiSdCompatMode, -- guid = RPI_PLATFORM_FORMSET_GUID; -+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -+ name = AcpiSdCompatMode, -+ guid = RPI_PLATFORM_FORMSET_GUID; - - efivarstore ACPI_SD_LIMIT_UHS_VARSTORE_DATA, -- attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -- name = AcpiSdLimitUhs, -- guid = RPI_PLATFORM_FORMSET_GUID; -+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -+ name = AcpiSdLimitUhs, -+ guid = RPI_PLATFORM_FORMSET_GUID; - - form formid = 1, - title = STRING_TOKEN(STR_FORM_SET_TITLE); -@@ -36,32 +42,45 @@ formset - subtitle text = STRING_TOKEN(STR_NULL_STRING); - - goto 0x1000, -- prompt = STRING_TOKEN(STR_CONFIG_TABLE_FORM_TITLE), -- help = STRING_TOKEN(STR_CONFIG_TABLE_FORM_HELP); -+ prompt = STRING_TOKEN(STR_SYSTEM_TABLE_FORM_TITLE), -+ help = STRING_TOKEN(STR_SYSTEM_TABLE_FORM_HELP); - endform; - - form formid = 0x1000, -- title = STRING_TOKEN(STR_CONFIG_TABLE_FORM_TITLE); -+ title = STRING_TOKEN(STR_SYSTEM_TABLE_FORM_TITLE); -+ -+ oneof varid = SystemTableMode.Mode, -+ prompt = STRING_TOKEN(STR_SYSTEM_TABLE_MODE_PROMPT), -+ help = STRING_TOKEN(STR_SYSTEM_TABLE_MODE_HELP), -+ flags = NUMERIC_SIZE_4 | INTERACTIVE | RESET_REQUIRED, -+ default = SYSTEM_TABLE_MODE_ACPI, -+ option text = STRING_TOKEN(STR_SYSTEM_TABLE_MODE_ACPI), value = SYSTEM_TABLE_MODE_ACPI, flags = 0; -+ option text = STRING_TOKEN(STR_SYSTEM_TABLE_MODE_FDT), value = SYSTEM_TABLE_MODE_DT, flags = 0; -+ option text = STRING_TOKEN(STR_SYSTEM_TABLE_MODE_ACPI_FDT), value = SYSTEM_TABLE_MODE_BOTH, flags = 0; -+ endoneof; - -- subtitle text = STRING_TOKEN(STR_CONFIG_TABLE_ACPI_SUBTITLE); -+ suppressif (get(SystemTableMode.Mode) != SYSTEM_TABLE_MODE_ACPI AND get(SystemTableMode.Mode) != SYSTEM_TABLE_MODE_BOTH); -+ subtitle text = STRING_TOKEN(STR_NULL_STRING); -+ subtitle text = STRING_TOKEN(STR_SYSTEM_TABLE_ACPI_SUBTITLE); - -- subtitle text = STRING_TOKEN(STR_NULL_STRING); -- subtitle text = STRING_TOKEN(STR_ACPI_SD_SUBTITLE); -+ subtitle text = STRING_TOKEN(STR_NULL_STRING); -+ subtitle text = STRING_TOKEN(STR_ACPI_SD_SUBTITLE); - -- oneof varid = AcpiSdCompatMode.Value, -- prompt = STRING_TOKEN(STR_ACPI_SD_COMPAT_MODE_PROMPT), -- help = STRING_TOKEN(STR_ACPI_SD_COMPAT_MODE_HELP), -- flags = NUMERIC_SIZE_1 | INTERACTIVE | RESET_REQUIRED, -- default = ACPI_SD_COMPAT_MODE_DEFAULT, -- option text = STRING_TOKEN(STR_ACPI_SD_COMPAT_BRCMSTB_BAYTRAIL), value = ACPI_SD_COMPAT_MODE_BRCMSTB_BAYTRAIL, flags = 0; -- option text = STRING_TOKEN(STR_ACPI_SD_COMPAT_FULL_BAYTRAIL), value = ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL, flags = 0; -- endoneof; -+ oneof varid = AcpiSdCompatMode.Value, -+ prompt = STRING_TOKEN(STR_ACPI_SD_COMPAT_MODE_PROMPT), -+ help = STRING_TOKEN(STR_ACPI_SD_COMPAT_MODE_HELP), -+ flags = NUMERIC_SIZE_1 | INTERACTIVE | RESET_REQUIRED, -+ default = ACPI_SD_COMPAT_MODE_DEFAULT, -+ option text = STRING_TOKEN(STR_ACPI_SD_COMPAT_BRCMSTB_BAYTRAIL), value = ACPI_SD_COMPAT_MODE_BRCMSTB_BAYTRAIL, flags = 0; -+ option text = STRING_TOKEN(STR_ACPI_SD_COMPAT_FULL_BAYTRAIL), value = ACPI_SD_COMPAT_MODE_FULL_BAYTRAIL, flags = 0; -+ endoneof; - -- checkbox varid = AcpiSdLimitUhs.Value, -- prompt = STRING_TOKEN(STR_ACPI_SD_LIMIT_UHS_PROMPT), -- help = STRING_TOKEN(STR_ACPI_SD_LIMIT_UHS_HELP), -- flags = CHECKBOX_DEFAULT | CHECKBOX_DEFAULT_MFG | RESET_REQUIRED, -- default = ACPI_SD_LIMIT_UHS_DEFAULT, -- endcheckbox; -+ checkbox varid = AcpiSdLimitUhs.Value, -+ prompt = STRING_TOKEN(STR_ACPI_SD_LIMIT_UHS_PROMPT), -+ help = STRING_TOKEN(STR_ACPI_SD_LIMIT_UHS_HELP), -+ flags = CHECKBOX_DEFAULT | CHECKBOX_DEFAULT_MFG | RESET_REQUIRED, -+ default = ACPI_SD_LIMIT_UHS_DEFAULT, -+ endcheckbox; -+ endif; - endform; - endformset; -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 4f128fe0..63e86be3 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -474,6 +474,15 @@ - # - gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspberryPiTokenSpaceGuid|0x0|0 - -+ # -+ # Device Tree and ACPI selection. -+ # -+ # 0 - SYSTEM_TABLE_MODE_ACPI (default) -+ # 1 - SYSTEM_TABLE_MODE_BOTH -+ # 2 - SYSTEM_TABLE_MODE_DT -+ # -+ gRaspberryPiTokenSpaceGuid.PcdSystemTableMode|L"SystemTableMode"|gRpiPlatformFormSetGuid|0x0|0 -+ - # - # Common UEFI ones. - # -@@ -569,7 +578,7 @@ - ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf - Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -- # Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -+ Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf - ArmPkg/Drivers/TimerDxe/TimerDxe.inf - MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - MdeModulePkg/Universal/EbcDxe/EbcDxe.inf -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index 4a5a05f6..a00b3d98 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -215,7 +215,7 @@ READ_LOCK_STATUS = TRUE - INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - INF Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf - INF Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -- # INF Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -+ INF Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf - INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf - INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0014-Platform-RPi5-Add-PCIe-support.patch b/packages/edk2/patches/platforms/0014-Platform-RPi5-Add-PCIe-support.patch deleted file mode 100644 index 1de29cf..0000000 --- a/packages/edk2/patches/platforms/0014-Platform-RPi5-Add-PCIe-support.patch +++ /dev/null @@ -1,5825 +0,0 @@ -From 6e7fd9d3093cc6bf927058315adf0f1ae1a55c22 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 15 Mar 2024 02:57:08 +0200 -Subject: [PATCH 14/16] Platform/RPi5: Add PCIe support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This introduces PCIe support to both UEFI and ACPI. - -Moreover, it also fixes RP1 USB corruption issues, caused by the -bridge's non-prefetchable memory aperture essentially creating a hole in -the PCIe's view of system RAM (mapped 1:1), through which inbound (DMA) -traffic could not pass anymore. - -Therefore, we now reserve up to 1 GB of RAM for 32-bit BARs, which is -automatically reclaimed depending on how much space the connected -devices actually consume. A minimum of 5 MBs are reserved by RP1. -This is only done when ACPI is enabled; FDT uses DMA translation and can -map the entire RAM. - -ECAM is still a small 4 KB window, so only a single device function can -be exposed to Windows and Linux. This is possible thanks to a few OS -workarounds: -- for Windows: "NXPMX6" OEM ID in FADT, bus 0 in MCFG is limited to -devfn 0. - -- for Linux: "AMAZON" OEM ID + "GRAVITON" OEM Table ID in MCFG. An -"AMZN0001" device with _UID matching the RC segment number returns the -ECAM window in _CRS. - -TF-A implements the DEN0115 spec, enabling FreeBSD, NetBSD and ESXi to -scan the entire config space. - -The compatibility mode used can be configured in the setup menu. Default -is "Auto (NXPMX6 / Arm DEN0115)", which selects the NXPMX6 mode when -Windows is booted and DEN0115 for other OSes. - -Tested with NVME and SATA boot + some Wi-Fi cards. - -Signed-off-by: Mario Bălănică ---- - .../RaspberryPi/RPi5/AcpiTables/AcpiTables.h | 55 +- - .../RPi5/AcpiTables/AcpiTables.inf | 4 +- - Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl | 93 +- - .../RaspberryPi/RPi5/AcpiTables/Mcfg.aslc | 51 + - .../RPi5/AcpiTables/PcieCommon.asi | 107 ++ - .../RPi5/Drivers/RpiPlatformDxe/ConfigTable.c | 754 ++++++++- - .../RPi5/Drivers/RpiPlatformDxe/ConfigTable.h | 14 +- - .../RPi5/Drivers/RpiPlatformDxe/Peripherals.c | 78 +- - .../RPi5/Drivers/RpiPlatformDxe/Peripherals.h | 25 +- - .../Drivers/RpiPlatformDxe/RpiPlatformDxe.c | 18 +- - .../Drivers/RpiPlatformDxe/RpiPlatformDxe.h | 15 + - .../Drivers/RpiPlatformDxe/RpiPlatformDxe.inf | 16 +- - .../RpiPlatformDxe/RpiPlatformDxeHii.uni | 40 +- - .../RpiPlatformDxe/RpiPlatformDxeHii.vfr | 70 +- - .../RaspberryPi/RPi5/Include/Rpi5McfgTable.h | 23 + - .../RPi5/Include/RpiPlatformVarStoreData.h | 15 +- - .../RPi5/Library/PlatformLib/RaspberryPiMem.c | 35 +- - Platform/RaspberryPi/RPi5/RPi5.dsc | 20 +- - Platform/RaspberryPi/RPi5/RPi5.fdf | 4 +- - Silicon/Broadcom/Bcm27xx/Bcm27xx.dec | 4 + - .../Include/Bcm2712PcieControllerSettings.h | 27 + - .../Include/IndustryStandard/Bcm2712.h | 16 +- - .../Include/IndustryStandard/Bcm2712Pcie.h | 206 +++ - .../Include/Protocol/Bcm2712PciePlatform.h | 28 + - .../Bcm2712PciHostBridge.c | 478 ++++++ - .../Bcm2712PciHostBridge.h | 33 + - .../Bcm2712PciHostBridgeLib.c | 326 ++++ - .../Bcm2712PciHostBridgeLib.inf | 38 + - .../Bcm2712PciSegmentLib/PciSegmentLib.c | 1456 +++++++++++++++++ - .../Bcm2712PciSegmentLib/PciSegmentLib.inf | 31 + - .../Drivers/Rp1BusDxe/ComponentName.c | 323 ++++ - .../Drivers/Rp1BusDxe/Rp1BusDxe.c | 463 +++++- - .../Drivers/Rp1BusDxe/Rp1BusDxe.h | 34 + - .../Drivers/Rp1BusDxe/Rp1BusDxe.inf | 11 +- - .../RpiSiliconPkg/Include/Protocol/Rp1Bus.h | 29 + - .../RaspberryPi/RpiSiliconPkg/Include/Rp1.h | 7 +- - .../RpiSiliconPkg/RpiSiliconPkg.dec | 6 +- - 37 files changed, 4831 insertions(+), 122 deletions(-) - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/Mcfg.aslc - create mode 100644 Platform/RaspberryPi/RPi5/AcpiTables/PcieCommon.asi - create mode 100644 Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.h - create mode 100644 Platform/RaspberryPi/RPi5/Include/Rpi5McfgTable.h - create mode 100644 Silicon/Broadcom/Bcm27xx/Include/Bcm2712PcieControllerSettings.h - create mode 100644 Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pcie.h - create mode 100644 Silicon/Broadcom/Bcm27xx/Include/Protocol/Bcm2712PciePlatform.h - create mode 100644 Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridge.c - create mode 100644 Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridge.h - create mode 100644 Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridgeLib.c - create mode 100644 Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridgeLib.inf - create mode 100644 Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciSegmentLib/PciSegmentLib.c - create mode 100644 Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciSegmentLib/PciSegmentLib.inf - create mode 100644 Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/ComponentName.c - create mode 100644 Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.h - create mode 100644 Silicon/RaspberryPi/RpiSiliconPkg/Include/Protocol/Rp1Bus.h - -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h -index 0b965d39..2035a3d3 100644 ---- a/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.h -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -35,6 +35,14 @@ - EFI_ACPI_CREATOR_REVISION /* UINT32 CreatorRevision */ \ - } - -+// -+// Default values for patching, to avoid compiler optimizations. -+// -+#define ACPI_PATCH_QWORD_VALUE 0xABCDEF0123456789 -+#define ACPI_PATCH_DWORD_VALUE 0xABCDEF01 -+#define ACPI_PATCH_WORD_VALUE 0xABCD -+#define ACPI_PATCH_BYTE_VALUE 0xAB -+ - // - // Device resource helpers - // -@@ -43,12 +51,49 @@ - MinFixed, MaxFixed, NonCacheable, ReadWrite, \ - 0x0, 0x0, 0x0, 0x0, 0x1,,, RB ## Index) - --#define QWORDMEMORY_SET(Index, Minimum, Length) \ -- CreateQwordField (RBUF, RB ## Index._MIN, MI ## Index) \ -- CreateQwordField (RBUF, RB ## Index._MAX, MA ## Index) \ -- CreateQwordField (RBUF, RB ## Index._LEN, LE ## Index) \ -+#define QWORDIO_BUF(Index, ResourceType) \ -+ QWordIO (ResourceType, \ -+ MinFixed, MaxFixed, PosDecode, EntireRange, \ -+ 0x0, 0x0, 0x0, 0x0, 0x1,,, RB ## Index) -+ -+#define DWORDMEMORY_BUF(Index, ResourceType) \ -+ DWordMemory (ResourceType,, \ -+ MinFixed, MaxFixed, NonCacheable, ReadWrite, \ -+ 0x0, 0x0, 0x0, 0x0, 0x1,,, RB ## Index) -+ -+#define WORDBUSNUMBER_BUF(Index, ResourceType) \ -+ WordBusNumber (ResourceType, \ -+ MinFixed, MaxFixed, PosDecode, \ -+ 0x0, 0x0, 0x0, 0x0, 0x1,,, RB ## Index) -+ -+#define QWORD_SET(Index, Minimum, Length, Translation) \ -+ CreateQWordField (RBUF, RB ## Index._MIN, MI ## Index) \ -+ CreateQWordField (RBUF, RB ## Index._MAX, MA ## Index) \ -+ CreateQWordField (RBUF, RB ## Index._TRA, TR ## Index) \ -+ CreateQWordField (RBUF, RB ## Index._LEN, LE ## Index) \ -+ LE ## Index = Length \ -+ MI ## Index = Minimum \ -+ TR ## Index = Translation \ -+ MA ## Index = MI ## Index + LE ## Index - 1 -+ -+#define DWORD_SET(Index, Minimum, Length, Translation) \ -+ CreateDWordField (RBUF, RB ## Index._MIN, MI ## Index) \ -+ CreateDWordField (RBUF, RB ## Index._MAX, MA ## Index) \ -+ CreateDWordField (RBUF, RB ## Index._TRA, TR ## Index) \ -+ CreateDWordField (RBUF, RB ## Index._LEN, LE ## Index) \ -+ LE ## Index = Length \ -+ MI ## Index = Minimum \ -+ TR ## Index = Translation \ -+ MA ## Index = MI ## Index + LE ## Index - 1 -+ -+#define WORD_SET(Index, Minimum, Length, Translation) \ -+ CreateWordField (RBUF, RB ## Index._MIN, MI ## Index) \ -+ CreateWordField (RBUF, RB ## Index._MAX, MA ## Index) \ -+ CreateWordField (RBUF, RB ## Index._TRA, TR ## Index) \ -+ CreateWordField (RBUF, RB ## Index._LEN, LE ## Index) \ - LE ## Index = Length \ - MI ## Index = Minimum \ -+ TR ## Index = Translation \ - MA ## Index = MI ## Index + LE ## Index - 1 - - // -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf -index 8eef5805..b3ad9787 100644 ---- a/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf -@@ -2,7 +2,7 @@ - # - # ACPI table data and ASL sources required to boot the platform. - # --# Copyright (c) 2023, Mario Bălănică -+# Copyright (c) 2023-2024, Mario Bălănică - # - # SPDX-License-Identifier: BSD-2-Clause-Patent - # -@@ -23,6 +23,7 @@ - Madt.aslc - Pptt.aslc - Spcr.aslc -+ Mcfg.aslc - - [Packages] - ArmPkg/ArmPkg.dec -@@ -52,4 +53,3 @@ - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq1 - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq2 - gRaspberryPiTokenSpaceGuid.PcdGicPmuIrq3 -- gRpiSiliconTokenSpaceGuid.Rp1PciPeripheralsBar -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl -index 62cacf7c..77d41efe 100644 ---- a/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Dsdt.asl -@@ -2,7 +2,7 @@ - * - * Differentiated System Definition Table (DSDT) - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -59,7 +59,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI5 ", 2) - Name (RBUF, ResourceTemplate () { - QWORDMEMORY_BUF (00, ResourceProducer) - }) -- QWORDMEMORY_SET (00, BCM2712_LEGACY_BUS_BASE, BCM2712_LEGACY_BUS_LENGTH) -+ QWORD_SET (00, BCM2712_LEGACY_BUS_BASE, BCM2712_LEGACY_BUS_LENGTH, 0) - Return (RBUF) - } - -@@ -97,7 +97,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI5 ", 2) - QWORDMEMORY_BUF (00, ResourceConsumer) - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { PL011_DEBUG_INTERRUPT } - }) -- QWORDMEMORY_SET (00, PL011_DEBUG_BASE_ADDRESS, PL011_DEBUG_LENGTH) -+ QWORD_SET (00, PL011_DEBUG_BASE_ADDRESS, PL011_DEBUG_LENGTH, 0) - Return (RBUF) - } - -@@ -110,6 +110,78 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI5 ", 2) - } - } // Device (SOCB) - -+ // -+ // PCIe Root Complexes -+ // -+ // These (and _STA) are patched by the platform driver: -+ // -+ Name (PBMA, ACPI_PATCH_BYTE_VALUE) -+ Name (BB32, ACPI_PATCH_QWORD_VALUE) -+ Name (MS32, ACPI_PATCH_QWORD_VALUE) -+ -+ Device (PCI0) { -+ Name (_SEG, 0) -+ Name (_STA, 0xF) -+ -+ Name (CFGB, BCM2712_BRCMSTB_PCIE0_BASE) -+ Name (CFGS, BCM2712_BRCMSTB_PCIE_LENGTH) -+ Name (MB32, BCM2712_BRCMSTB_PCIE0_CPU_MEM_BASE) -+ Name (MB64, BCM2712_BRCMSTB_PCIE0_CPU_MEM64_BASE) -+ Name (MS64, BCM2712_BRCMSTB_PCIE_MEM64_SIZE) -+ -+ Name (_PRT, Package () { -+ Package (4) { 0x0FFFF, 0, 0, 241 }, -+ Package (4) { 0x0FFFF, 1, 0, 242 }, -+ Package (4) { 0x0FFFF, 2, 0, 243 }, -+ Package (4) { 0x0FFFF, 3, 0, 244 } -+ }) -+ -+ Include ("PcieCommon.asi") -+ } -+ -+ Device (PCI1) { -+ Name (_SEG, 1) -+ Name (_STA, 0xF) -+ -+ Name (CFGB, BCM2712_BRCMSTB_PCIE1_BASE) -+ Name (CFGS, BCM2712_BRCMSTB_PCIE_LENGTH) -+ Name (MB32, BCM2712_BRCMSTB_PCIE1_CPU_MEM_BASE) -+ Name (MB64, BCM2712_BRCMSTB_PCIE1_CPU_MEM64_BASE) -+ Name (MS64, BCM2712_BRCMSTB_PCIE_MEM64_SIZE) -+ -+ Name (_PRT, Package () { -+ Package (4) { 0x0FFFF, 0, 0, 251 }, -+ Package (4) { 0x0FFFF, 1, 0, 252 }, -+ Package (4) { 0x0FFFF, 2, 0, 253 }, -+ Package (4) { 0x0FFFF, 3, 0, 254 } -+ }) -+ -+ Include ("PcieCommon.asi") -+ } -+ -+ Device (PCI2) { -+ Name (_SEG, 2) -+ Name (_STA, 0xF) -+ -+ Name (CFGB, BCM2712_BRCMSTB_PCIE2_BASE) -+ Name (CFGS, BCM2712_BRCMSTB_PCIE_LENGTH) -+ Name (MB32, BCM2712_BRCMSTB_PCIE2_CPU_MEM_BASE) -+ Name (MB64, BCM2712_BRCMSTB_PCIE2_CPU_MEM64_BASE) -+ Name (MS64, BCM2712_BRCMSTB_PCIE_MEM64_SIZE) -+ -+ Name (_PRT, Package () { -+ Package (4) { 0x0FFFF, 0, 0, 261 }, -+ Package (4) { 0x0FFFF, 1, 0, 262 }, -+ Package (4) { 0x0FFFF, 2, 0, 263 }, -+ Package (4) { 0x0FFFF, 3, 0, 264 } -+ }) -+ -+ Include ("PcieCommon.asi") -+ } -+ -+ // -+ // RP1 I/O Bridge -+ // - Device (RP1B) { - Name (_HID, "ACPI0004") - Name (_UID, 0x1) -@@ -117,12 +189,19 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI5 ", 2) - // Parent bus is non-coherent - Name (_CCA, 0x0) - -- // Firmware mapped BAR -- Name (PBAR, FixedPcdGet64 (Rp1PciPeripheralsBar)) -+ // Firmware mapped BAR - patched by platform driver -+ Name (PBAR, ACPI_PATCH_QWORD_VALUE) - - // Shared level interrupt - PCIE2 INTA# SPI - Name (PINT, 261) - -+ Method (_STA) { -+ If (PBAR == ACPI_PATCH_QWORD_VALUE) { -+ Return (0x0) -+ } -+ Return (0xF) -+ } -+ - Include ("Rp1.asi") - } - -@@ -183,7 +262,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI5 ", 2) - QWORDMEMORY_BUF (00, ResourceConsumer) - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 305 } - }) -- QWORDMEMORY_SET (00, BCM2712_BRCMSTB_SDIO1_HOST_BASE, BCM2712_BRCMSTB_SDIO_HOST_LENGTH) -+ QWORD_SET (00, BCM2712_BRCMSTB_SDIO1_HOST_BASE, BCM2712_BRCMSTB_SDIO_HOST_LENGTH, 0) - Return (RBUF) - } - -@@ -303,7 +382,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI5 ", 2) - QWORDMEMORY_BUF (00, ResourceConsumer) - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 306 } - }) -- QWORDMEMORY_SET (00, BCM2712_BRCMSTB_SDIO2_HOST_BASE, BCM2712_BRCMSTB_SDIO_HOST_LENGTH) -+ QWORD_SET (00, BCM2712_BRCMSTB_SDIO2_HOST_BASE, BCM2712_BRCMSTB_SDIO_HOST_LENGTH, 0) - Return (RBUF) - } - -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/Mcfg.aslc b/Platform/RaspberryPi/RPi5/AcpiTables/Mcfg.aslc -new file mode 100644 -index 00000000..ed0fb512 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/Mcfg.aslc -@@ -0,0 +1,51 @@ -+/** @file -+ * -+ * PCI Express Memory-mapped Configuration Space base address description table (MCFG) -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+ -+#include "AcpiTables.h" -+ -+// -+// MCFG is patched by RpiPlatformDxe. -+// -+RPI5_MCFG_TABLE Mcfg = { -+ { -+ ACPI_HEADER ( -+ EFI_ACPI_6_4_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE, -+ RPI5_MCFG_TABLE, -+ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION -+ ), -+ }, -+ { -+ { -+ BCM2712_BRCMSTB_PCIE0_BASE + PCIE_EXT_CFG_DATA, -+ 0, // PciSegmentNumber -+ 0, // PciBusMin -+ 0, // PciBusMax -+ 0 // Reserved -+ }, -+ { -+ BCM2712_BRCMSTB_PCIE1_BASE + PCIE_EXT_CFG_DATA, -+ 1, // PciSegmentNumber -+ 0, // PciBusMin -+ 0, // PciBusMax -+ 0 // Reserved -+ }, -+ { -+ BCM2712_BRCMSTB_PCIE2_BASE + PCIE_EXT_CFG_DATA, -+ 2, // PciSegmentNumber -+ 0, // PciBusMin -+ 0, // PciBusMax -+ 0 // Reserved -+ } -+ } -+}; -+ -+VOID* CONST ReferenceAcpiTable = &Mcfg; -diff --git a/Platform/RaspberryPi/RPi5/AcpiTables/PcieCommon.asi b/Platform/RaspberryPi/RPi5/AcpiTables/PcieCommon.asi -new file mode 100644 -index 00000000..630e94ab ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/AcpiTables/PcieCommon.asi -@@ -0,0 +1,107 @@ -+/* @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ */ -+ -+#include -+ -+// -+// PBMA - Max Bus Number -+// CFGB - RC Base -+// CFGS - RC Size -+// MB32 - 32-bit memory base -+// BB32 - 32-bit memory bus base -+// MS32 - 32-bit memory size -+// MB64 - 64-bit memory base -+// MS64 - 64-bit memory size -+// -+Name (_HID, "PNP0A08") -+Name (_CID, "PNP0A03") -+Name (_CCA, 0) -+Name (_BBN, 0) -+Method (_UID) { -+ Return (_SEG) -+} -+ -+Method (_INI, 0, Serialized) { -+ OperationRegion (OCFG, SystemMemory, CFGB + PCIE_EXT_CFG_INDEX, 0x4) -+ Field (OCFG, DWordAcc, NoLock, Preserve) { -+ CFGI, 32 -+ } -+ // -+ // Ensure the small ECAM window is pointing at BDF 01:00.0, -+ // for OSes that can only consume a single-function device. -+ // -+ CFGI = 0x00100000 -+} -+ -+Method (_CRS, 0, Serialized) { -+ Name (RBUF, ResourceTemplate () { -+ WORDBUSNUMBER_BUF (00, ResourceProducer) -+ QWORDMEMORY_BUF (01, ResourceProducer) -+ QWORDMEMORY_BUF (02, ResourceProducer) -+ }) -+ WORD_SET (00, _BBN, (PBMA - _BBN) + 1, 0) -+ QWORD_SET (01, BB32, MS32, MB32 - BB32) -+ QWORD_SET (02, MB64, MS64, 0) -+ Return (RBUF) -+} -+ -+Device (RES0) { -+ Name (_HID, "AMZN0001") -+ Name (_CID, "PNP0C02") -+ Method (_UID) { -+ Return (_SEG) -+ } -+ Method (_CRS, 0, Serialized) { -+ Name (RBUF, ResourceTemplate () { -+ QWORDMEMORY_BUF (00, ResourceConsumer) -+ }) -+ QWORD_SET (00, CFGB + PCIE_EXT_CFG_DATA, 0x1000, 0) -+ Return (RBUF) -+ } -+} -+ -+Name (SUPP, Zero) // PCI _OSC Support Field value -+Name (CTRL, Zero) // PCI _OSC Control Field value -+ -+Method (_OSC, 4) { -+ If (Arg0 == ToUUID ("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { -+ // Create DWord-adressable fields from the Capabilities Buffer -+ CreateDWordField (Arg3, 0, CDW1) -+ CreateDWordField (Arg3, 4, CDW2) -+ CreateDWordField (Arg3, 8, CDW3) -+ -+ // Save Capabilities DWord2 & 3 -+ SUPP = CDW2 -+ CTRL = CDW3 -+ -+ // Mask out native hot plug control -+ CTRL &= 0x1E -+ -+ // Always allow native PME, AER and Capability Structure control -+ // Never allow SHPC and LTR control -+ CTRL &= 0x1D -+ -+ // Unknown revision -+ If (Arg1 != 1) { -+ Cdw1 |= 0x08 -+ } -+ -+ // Capabilities bits were masked -+ If (CDW3 != CTRL) { -+ CDW1 |= 0x10 -+ } -+ -+ // Update DWORD3 in the buffer -+ CDW3 = CTRL -+ Return (Arg3) -+ } Else { -+ // Unrecognized UUID -+ CDW1 |= 4 -+ Return (Arg3) -+ } -+} -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c -index 9aadb325..bc61e804 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.c -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -8,15 +8,27 @@ - - #include - #include -+#include -+#include - #include -+#include -+#include - #include -+#include -+#include -+#include - #include - #include - #include -+#include -+#include - #include -+#include - #include - - #include "ConfigTable.h" -+#include "RpiPlatformDxe.h" -+#include "Peripherals.h" - - // - // AcpiTables.inf -@@ -28,6 +40,122 @@ STATIC CONST EFI_GUID mAcpiTableFile = { - STATIC ACPI_SD_COMPAT_MODE_VARSTORE_DATA AcpiSdCompatMode; - STATIC ACPI_SD_LIMIT_UHS_VARSTORE_DATA AcpiSdLimitUhs; - -+STATIC ACPI_PCIE_ECAM_COMPAT_MODE_VARSTORE_DATA AcpiPcieEcamCompatMode; -+STATIC ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_VARSTORE_DATA AcpiPcie32BitBarSpaceSizeMB; -+ -+STATIC BOOLEAN mIsAcpiEnabled; -+STATIC EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol; -+STATIC EFI_ACPI_DESCRIPTION_HEADER *mDsdtTable; -+ -+STATIC UINT64 mAcpiPciMem32Base; -+STATIC UINT64 mAcpiPciMem32Size; -+ -+STATIC EFI_EXIT_BOOT_SERVICES mOriginalExitBootServices; -+ -+typedef enum { -+ AcpiOsUnknown = 0, -+ AcpiOsWindows, -+} ACPI_OS_BOOT_TYPE; -+ -+#define SDT_PATTERN_LEN (AML_NAME_SEG_SIZE + 1) -+ -+// -+// Simple NameOp integer patcher. -+// Does not allocate memory and can be safely used at ExitBootServices. -+// -+STATIC -+EFI_STATUS -+EFIAPI -+AcpiUpdateSdtNameInteger ( -+ IN EFI_ACPI_DESCRIPTION_HEADER *AcpiTable, -+ IN CHAR8 Name[AML_NAME_SEG_SIZE], -+ IN UINTN Value -+ ) -+{ -+ UINTN Index; -+ CHAR8 Pattern[SDT_PATTERN_LEN]; -+ UINT8 *SdtPtr; -+ UINT32 DataSize; -+ UINT32 ValueOffset; -+ -+ if (AcpiTable->Length <= SDT_PATTERN_LEN) { -+ return EFI_INVALID_PARAMETER; -+ } -+ -+ SdtPtr = (UINT8 *)AcpiTable; -+ // -+ // Do a single NameOp variable replacement. These are of the -+ // form "08 XXXX SIZE VAL", where SIZE is: 0A=byte, 0B=word, 0C=dword, -+ // XXXX is the name and VAL is the value. -+ // -+ Pattern[0] = AML_NAME_OP; -+ CopyMem (Pattern + 1, Name, AML_NAME_SEG_SIZE); -+ -+ ValueOffset = SDT_PATTERN_LEN + 1; -+ -+ for (Index = 0; Index < (AcpiTable->Length - SDT_PATTERN_LEN); Index++) { -+ if (CompareMem (SdtPtr + Index, Pattern, SDT_PATTERN_LEN) == 0) { -+ switch (SdtPtr[Index + SDT_PATTERN_LEN]) { -+ case AML_QWORD_PREFIX: -+ DataSize = sizeof (UINT64); -+ break; -+ case AML_DWORD_PREFIX: -+ DataSize = sizeof (UINT32); -+ break; -+ case AML_WORD_PREFIX: -+ DataSize = sizeof (UINT16); -+ break; -+ case AML_ONE_OP: -+ case AML_ZERO_OP: -+ ValueOffset--; -+ // Fallthrough -+ case AML_BYTE_PREFIX: -+ DataSize = sizeof (UINT8); -+ break; -+ default: -+ return EFI_UNSUPPORTED; -+ } -+ -+ CopyMem (SdtPtr + Index + ValueOffset, &Value, DataSize); -+ return EFI_SUCCESS; -+ } -+ } -+ -+ return EFI_NOT_FOUND; -+} -+ -+STATIC -+VOID -+EFIAPI -+DsdtFixupStatus ( -+ IN EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol, -+ IN EFI_ACPI_HANDLE TableHandle -+ ) -+{ -+ EFI_STATUS Status; -+ UINTN Index; -+ -+ struct { -+ CHAR8 *ObjectPath; -+ BOOLEAN Enabled; -+ } DevStatus[] = { -+ { "\\_SB.PCI0._STA", FALSE }, // Not exposed -+ { "\\_SB.PCI1._STA", mPciePlatform.Settings[1].Enabled }, // Configurable -+ { "\\_SB.PCI2._STA", FALSE }, // Reserved by RP1 -+ }; -+ -+ for (Index = 0; Index < ARRAY_SIZE (DevStatus); Index++) { -+ if (DevStatus[Index].Enabled == FALSE) { -+ Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle, -+ DevStatus[Index].ObjectPath, 0x0); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to patch %a. Status=%r\n", -+ __func__, DevStatus[Index].ObjectPath, Status)); -+ } -+ } -+ } -+} -+ - STATIC - VOID - EFIAPI -@@ -51,79 +179,613 @@ DsdtFixupSd ( - } - } - -+STATIC -+VOID -+EFIAPI -+DsdtFixupRp1 ( -+ IN EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol, -+ IN EFI_ACPI_HANDLE TableHandle -+ ) -+{ -+ EFI_STATUS Status; -+ RP1_BUS_PROTOCOL *Rp1Bus; -+ UINTN HandleCount; -+ EFI_HANDLE *Handles; -+ -+ HandleCount = 0; -+ Handles = NULL; -+ Rp1Bus = NULL; -+ -+ Status = gBS->LocateHandleBuffer ( -+ ByProtocol, -+ &gRp1BusProtocolGuid, -+ NULL, -+ &HandleCount, -+ &Handles -+ ); -+ if (EFI_ERROR (Status)) { -+ DEBUG (( -+ DEBUG_WARN, -+ "%a: Failed to locate RP1 instance! Status=%r\n", -+ __func__, -+ Status -+ )); -+ return; -+ } -+ -+ if (HandleCount > 1) { -+ DEBUG ((DEBUG_WARN, "%a: Only one RP1 instance is supported!\n", __func__)); -+ } -+ -+ Status = gBS->HandleProtocol ( -+ Handles[0], -+ &gRp1BusProtocolGuid, -+ (VOID **)&Rp1Bus -+ ); -+ FreePool (Handles); -+ -+ if (EFI_ERROR (Status)) { -+ DEBUG (( -+ DEBUG_WARN, -+ "%a: Failed to get RP1 bus protocol! Status=%r\n", -+ __func__, -+ Status -+ )); -+ return; -+ } -+ -+ Status = AcpiAmlObjectUpdateInteger ( -+ AcpiSdtProtocol, -+ TableHandle, -+ "\\_SB.RP1B.PBAR", -+ Rp1Bus->GetPeripheralBase (Rp1Bus) -+ ); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to patch PBAR. Status=%r\n", __func__, Status)); -+ } -+} -+ -+STATIC -+VOID -+EFIAPI -+DsdtFixupPcie ( -+ IN EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol, -+ IN EFI_ACPI_HANDLE TableHandle -+ ) -+{ -+ EFI_STATUS Status; -+ -+ Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle, -+ "\\_SB.BB32", mAcpiPciMem32Base); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to patch BB32.\n", __func__)); -+ } -+ -+ Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle, -+ "\\_SB.MS32", mAcpiPciMem32Size); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to patch MS32.\n", __func__)); -+ } -+} -+ -+STATIC -+EFI_STATUS -+EFIAPI -+AcpiFixupPcieEcam ( -+ IN ACPI_OS_BOOT_TYPE OsType -+ ) -+{ -+ EFI_STATUS Status; -+ UINTN Index; -+ RPI5_MCFG_TABLE *McfgTable; -+ EFI_ACPI_DESCRIPTION_HEADER *FadtTable; -+ UINTN TableKey; -+ UINT32 PcieEcamMode; -+ UINT8 PcieBusMax; -+ -+ Index = 0; -+ Status = AcpiLocateTableBySignature ( -+ mAcpiSdtProtocol, -+ EFI_ACPI_6_4_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE, -+ &Index, -+ (EFI_ACPI_DESCRIPTION_HEADER **)&McfgTable, -+ &TableKey); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Couldn't locate ACPI MCFG table! Status=%r\n", -+ __func__, Status)); -+ return Status; -+ } -+ -+ PcieEcamMode = AcpiPcieEcamCompatMode.Value; -+ -+ if (PcieEcamMode == ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_DEN0115 || -+ PcieEcamMode == ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_GRAVITON) { -+ if (OsType == AcpiOsWindows) { -+ PcieEcamMode = ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6; -+ } else { -+ PcieEcamMode &= ~ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6; -+ } -+ } -+ -+ switch (PcieEcamMode) { -+ case ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6: -+ PcieBusMax = 0; -+ -+ Index = 0; -+ Status = AcpiLocateTableBySignature ( -+ mAcpiSdtProtocol, -+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, -+ &Index, -+ &FadtTable, -+ &TableKey); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Couldn't locate ACPI FADT table! Status=%r\n", -+ __func__, Status)); -+ return Status; -+ } -+ -+ CopyMem (FadtTable->OemId, "NXPMX6", sizeof (FadtTable->OemId)); -+ AcpiUpdateChecksum ((UINT8 *)FadtTable, FadtTable->Length); -+ break; -+ -+ case ACPI_PCIE_ECAM_COMPAT_MODE_GRAVITON: -+ PcieBusMax = 0; -+ -+ CopyMem (McfgTable->Header.Header.OemId, "AMAZON", sizeof (McfgTable->Header.Header.OemId)); -+ McfgTable->Header.Header.OemTableId = SIGNATURE_64 ('G','R','A','V','I','T','O','N'); -+ McfgTable->Header.Header.OemRevision = 0; -+ -+ // -+ // The ECAM window of the single function exposed on bus 0 is obtained -+ // from the "AMZN0001" device in DSDT. -+ // This causes a conflict with the region described in MCFG, but since -+ // the latter is superfluous, we can simply point it to a bogus region -+ // way above the register space. -+ // -+ for (Index = 0; Index < ARRAY_SIZE (McfgTable->Entries); Index++) { -+ McfgTable->Entries[Index].BaseAddress = BASE_1TB + (Index * SIZE_1MB); -+ } -+ break; -+ -+ default: // ACPI_PCIE_ECAM_COMPAT_MODE_DEN0115 -+ PcieBusMax = PCI_MAX_BUS; -+ -+ // MCFG must be hidden. -+ McfgTable->Header.Header.Signature = 0; -+ break; -+ } -+ -+ AcpiUpdateChecksum ((UINT8 *)McfgTable, McfgTable->Header.Header.Length); -+ -+ AcpiUpdateSdtNameInteger (mDsdtTable, "PBMA", PcieBusMax); -+ -+ return EFI_SUCCESS; -+} -+ -+STATIC -+VOID -+EFIAPI -+AcpiOsBootHandler ( -+ IN ACPI_OS_BOOT_TYPE OsType -+ ) -+{ -+ if ((mAcpiSdtProtocol == NULL) || (mDsdtTable == NULL)) { -+ ASSERT (FALSE); -+ return; -+ } -+ -+ AcpiFixupPcieEcam (OsType); -+ -+ AcpiUpdateChecksum ((UINT8 *)mDsdtTable, mDsdtTable->Length); -+} -+ -+STATIC -+UINTN -+EFIAPI -+FindPeImageBase ( -+ EFI_PHYSICAL_ADDRESS Base -+ ) -+{ -+ EFI_IMAGE_DOS_HEADER *DosHdr; -+ EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; -+ -+ Base &= ~(EFI_PAGE_SIZE - 1); -+ -+ while (Base != 0) { -+ DosHdr = (EFI_IMAGE_DOS_HEADER *)Base; -+ if (DosHdr->e_magic == EFI_IMAGE_DOS_SIGNATURE) { -+ Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)(Base + DosHdr->e_lfanew); -+ if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) { -+ break; -+ } -+ } -+ -+ Base -= EFI_PAGE_SIZE; -+ } -+ -+ return Base; -+} -+ -+STATIC CHAR8 mWinLoadNameStr[] = "winload"; -+#define PDB_NAME_MAX_LENGTH 256 -+ -+STATIC -+BOOLEAN -+EFIAPI -+IsPeImageWinLoader ( -+ IN VOID *PeImage -+ ) -+{ -+ CHAR8 *PdbStr; -+ UINTN WinLoadNameStrLen; -+ UINTN Index; -+ -+ PdbStr = (CHAR8 *)PeCoffLoaderGetPdbPointer (PeImage); -+ if (PdbStr == NULL) { -+ return FALSE; -+ } -+ -+ WinLoadNameStrLen = sizeof (mWinLoadNameStr) - sizeof (CHAR8); -+ -+ for (Index = 0; Index < PDB_NAME_MAX_LENGTH && PdbStr[Index] != '\0'; Index++) { -+ if (AsciiStrnCmp (PdbStr + Index, mWinLoadNameStr, WinLoadNameStrLen) == 0) { -+ return TRUE; -+ } -+ } -+ -+ return FALSE; -+} -+ -+STATIC -+EFI_STATUS -+EFIAPI -+AcpiExitBootServicesHook ( -+ IN EFI_HANDLE ImageHandle, -+ IN UINTN MapKey -+ ) -+{ -+ UINTN ReturnAddress; -+ UINTN OsLoaderAddress; -+ ACPI_OS_BOOT_TYPE OsType; -+ -+ ReturnAddress = (UINTN)RETURN_ADDRESS (0); -+ -+ gBS->ExitBootServices = mOriginalExitBootServices; -+ -+ OsType = AcpiOsUnknown; -+ -+ OsLoaderAddress = FindPeImageBase (ReturnAddress); -+ if (OsLoaderAddress > 0) { -+ if (IsPeImageWinLoader ((VOID *)OsLoaderAddress)) { -+ OsType = AcpiOsWindows; -+ } -+ } -+ -+ AcpiOsBootHandler (OsType); -+ -+ return gBS->ExitBootServices (ImageHandle, MapKey); -+} -+ -+STATIC -+EFI_STATUS -+EFIAPI -+GetPciMem32TotalRange ( -+ OUT UINT64 *Base, -+ OUT UINT64 *Size -+ ) -+{ -+ EFI_STATUS Status; -+ UINTN Index; -+ EFI_HANDLE *Handles; -+ UINTN HandleCount; -+ EFI_PCI_IO_PROTOCOL *PciIo; -+ PCI_TYPE01 PciConfigHeader; -+ UINT32 MemoryBase; -+ UINT32 MinimumMemoryBase; -+ UINT32 MemoryLimit; -+ UINT32 MaximumMemoryLimit; -+ -+ Status = gBS->LocateHandleBuffer ( -+ ByProtocol, -+ &gEfiPciIoProtocolGuid, -+ NULL, -+ &HandleCount, -+ &Handles -+ ); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ MinimumMemoryBase = MAX_UINT32; -+ MaximumMemoryLimit = 0; -+ -+ for (Index = 0; Index < HandleCount; Index++) { -+ Status = gBS->HandleProtocol ( -+ Handles[Index], -+ &gEfiPciIoProtocolGuid, -+ (VOID **)&PciIo -+ ); -+ ASSERT_EFI_ERROR (Status); -+ if (EFI_ERROR (Status)) { -+ continue; -+ } -+ -+ Status = PciIo->Pci.Read ( -+ PciIo, -+ EfiPciIoWidthUint32, -+ 0, -+ sizeof (PciConfigHeader) / sizeof (UINT32), -+ &PciConfigHeader -+ ); -+ if (EFI_ERROR (Status) || -+ (!IS_PCI_P2P (&PciConfigHeader) && -+ !IS_PCI_P2P_SUB (&PciConfigHeader))) -+ { -+ continue; -+ } -+ -+ MemoryBase = 0; -+ PciIo->Pci.Read ( -+ PciIo, -+ EfiPciIoWidthUint16, -+ OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase), -+ 1, -+ &MemoryBase -+ ); -+ MemoryBase <<= 16; -+ -+ if (MinimumMemoryBase > MemoryBase) { -+ MinimumMemoryBase = MemoryBase; -+ } -+ -+ MemoryLimit = 0; -+ PciIo->Pci.Read ( -+ PciIo, -+ EfiPciIoWidthUint16, -+ OFFSET_OF (PCI_TYPE01, Bridge.MemoryLimit), -+ 1, -+ &MemoryLimit -+ ); -+ MemoryLimit <<= 16; -+ -+ if (MaximumMemoryLimit < MemoryLimit) { -+ MaximumMemoryLimit = MemoryLimit; -+ } -+ } -+ -+ FreePool (Handles); -+ -+ if (MaximumMemoryLimit == 0) { -+ return EFI_NOT_FOUND; -+ } -+ -+ *Base = MinimumMemoryBase; -+ *Size = (MaximumMemoryLimit + SIZE_1MB) - MinimumMemoryBase; -+ -+ return EFI_SUCCESS; -+} -+ -+// -+// See Bcm2712PciHostBridgeLib.c for more details. -+// -+STATIC -+VOID -+EFIAPI -+AdjustPciReservedMemory ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ UINT64 MemoryToReclaimBase; -+ UINT64 MemoryToReclaimSize; -+ UINT64 PciMem32Base; -+ UINT64 PciMem32Size; -+ UINT64 PciMem32PreferredSize; -+ -+ // -+ // Initially, we wish to reclaim all system RAM and disable -+ // PCI 32-bit memory if possible. -+ // -+ MemoryToReclaimBase = PCI_RESERVED_MEM32_BASE; -+ MemoryToReclaimSize = PCI_RESERVED_MEM32_SIZE; -+ -+ mAcpiPciMem32Base = MemoryToReclaimBase; -+ mAcpiPciMem32Size = 0; -+ -+ // -+ // Compute the reserved memory size for ACPI boot. -+ // FDT uses DMA translation and does not need any reserved RAM. -+ // -+ if (mIsAcpiEnabled) { -+ Status = GetPciMem32TotalRange (&PciMem32Base, &PciMem32Size); -+ if (EFI_ERROR (Status)) { -+ DEBUG (( -+ DEBUG_ERROR, -+ "%a: Failed to get Mem32 region. Status=%r\n", -+ __func__, -+ Status -+ )); -+ -+ PciMem32Base = mAcpiPciMem32Base; -+ PciMem32Size = mAcpiPciMem32Size; -+ } -+ -+ DEBUG (( -+ DEBUG_INFO, -+ "%a: Mem32 Base: 0x%lx, Size: 0x%lx\n", -+ __func__, -+ PciMem32Base, -+ PciMem32Size -+ )); -+ -+ if ((PciMem32Base < MemoryToReclaimBase) || (PciMem32Size > MemoryToReclaimSize)) { -+ ASSERT (FALSE); -+ DEBUG ((DEBUG_ERROR, "%a: Mem32 region out of reserved bounds!", __func__)); -+ goto ReclaimMemoryExit; -+ } -+ -+ PciMem32PreferredSize = AcpiPcie32BitBarSpaceSizeMB.Value * 1024 * 1024; -+ if (PciMem32PreferredSize <= MemoryToReclaimSize) { -+ if (PciMem32Size < PciMem32PreferredSize) { -+ DEBUG (( -+ DEBUG_INFO, -+ "%a: Mem32 Preferred Size: 0x%lx\n", -+ __func__, -+ PciMem32PreferredSize -+ )); -+ -+ PciMem32Size = PciMem32PreferredSize; -+ } -+ } else { -+ DEBUG (( -+ DEBUG_ERROR, -+ "%a: Mem32 Preferred Size too large: 0x%lx\n", -+ __func__, -+ PciMem32PreferredSize -+ )); -+ } -+ -+ mAcpiPciMem32Base = PciMem32Base; -+ mAcpiPciMem32Size = PciMem32Size; -+ -+ if (PciMem32Size > 0) { -+ MemoryToReclaimBase = PciMem32Base + PciMem32Size; -+ MemoryToReclaimSize = SIZE_4GB - MemoryToReclaimBase; -+ } -+ } -+ -+ReclaimMemoryExit: -+ if ((mSystemMemorySize > PCI_RESERVED_MEM32_BASE) && (MemoryToReclaimSize > 0)) { -+ DEBUG (( -+ DEBUG_INFO, -+ "%a: Reclaiming system RAM - Base: 0x%lx, Size: 0x%lx\n", -+ __func__, -+ MemoryToReclaimBase, -+ MemoryToReclaimSize -+ )); -+ -+ Status = gDS->AddMemorySpace ( -+ EfiGcdMemoryTypeSystemMemory, -+ MemoryToReclaimBase, -+ MemoryToReclaimSize, -+ EFI_MEMORY_WC | EFI_MEMORY_WT | EFI_MEMORY_WB -+ ); -+ ASSERT_EFI_ERROR (Status); -+ if (EFI_ERROR (Status)) { -+ return; -+ } -+ -+ Status = gDS->SetMemorySpaceAttributes ( -+ MemoryToReclaimBase, -+ MemoryToReclaimSize, -+ EFI_MEMORY_WB -+ ); -+ ASSERT_EFI_ERROR (Status); -+ } -+} -+ - STATIC - EFI_STATUS - EFIAPI --ApplyDsdtFixups ( -+InstallAcpiTables ( - VOID - ) - { -- EFI_STATUS Status; -- EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol; -- EFI_ACPI_DESCRIPTION_HEADER *Table; -- UINTN TableKey; -- UINTN TableIndex; -- EFI_ACPI_HANDLE TableHandle; -+ EFI_STATUS Status; -+ UINTN TableKey; -+ UINTN TableIndex; -+ EFI_ACPI_HANDLE TableHandle; - - Status = gBS->LocateProtocol ( - &gEfiAcpiSdtProtocolGuid, - NULL, -- (VOID **)&AcpiSdtProtocol); -+ (VOID **)&mAcpiSdtProtocol -+ ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Couldn't locate gEfiAcpiSdtProtocolGuid!\n", __func__)); - return Status; - } - -+ Status = LocateAndInstallAcpiFromFvConditional (&mAcpiTableFile, NULL); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables!\n")); -+ return Status; -+ } -+ - TableIndex = 0; - Status = AcpiLocateTableBySignature ( -- AcpiSdtProtocol, -+ mAcpiSdtProtocol, - EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE, - &TableIndex, -- &Table, -- &TableKey); -+ &mDsdtTable, -+ &TableKey -+ ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Couldn't locate ACPI DSDT table!\n", __func__)); - return Status; - } - -- Status = AcpiSdtProtocol->OpenSdt (TableKey, &TableHandle); -+ Status = mAcpiSdtProtocol->OpenSdt (TableKey, &TableHandle); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Couldn't open ACPI DSDT table!\n", __func__)); -- AcpiSdtProtocol->Close (TableHandle); -+ mAcpiSdtProtocol->Close (TableHandle); - return Status; - } - -- DsdtFixupSd (AcpiSdtProtocol, TableHandle); -+ DsdtFixupStatus (mAcpiSdtProtocol, TableHandle); -+ DsdtFixupSd (mAcpiSdtProtocol, TableHandle); -+ DsdtFixupRp1 (mAcpiSdtProtocol, TableHandle); -+ DsdtFixupPcie (mAcpiSdtProtocol, TableHandle); - -- AcpiSdtProtocol->Close (TableHandle); -- AcpiUpdateChecksum ((UINT8 *)Table, Table->Length); -+ mAcpiSdtProtocol->Close (TableHandle); - - return EFI_SUCCESS; - } - -+STATIC -+VOID -+EFIAPI -+OnReadyToBoot ( -+ IN EFI_EVENT Event, -+ IN VOID *Context -+ ) -+{ -+ gBS->CloseEvent (Event); -+ -+ AdjustPciReservedMemory (); -+ -+ if (mIsAcpiEnabled) { -+ InstallAcpiTables (); -+ } else { -+ // FDT installation is done by FdtDxe. -+ } -+} -+ - VOID - EFIAPI - ApplyConfigTableVariables ( - VOID - ) - { -- EFI_STATUS Status; -+ EFI_STATUS Status; -+ EFI_EVENT Event; - -- if (PcdGet32 (PcdSystemTableMode) != SYSTEM_TABLE_MODE_ACPI -- && PcdGet32 (PcdSystemTableMode) != SYSTEM_TABLE_MODE_BOTH) { -- // FDT is taken care of by FdtDxe. -- return; -- } -+ mIsAcpiEnabled = PcdGet32 (PcdSystemTableMode) == SYSTEM_TABLE_MODE_ACPI || -+ PcdGet32 (PcdSystemTableMode) == SYSTEM_TABLE_MODE_BOTH; - -- Status = LocateAndInstallAcpiFromFvConditional (&mAcpiTableFile, NULL); -- if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables!\n")); -- return; -- } -+ Status = gBS->CreateEventEx ( -+ EVT_NOTIFY_SIGNAL, -+ TPL_CALLBACK, -+ OnReadyToBoot, -+ NULL, -+ &gEfiEventReadyToBootGuid, -+ &Event -+ ); -+ ASSERT_EFI_ERROR (Status); - -- Status = ApplyDsdtFixups (); -- if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to apply ACPI DSDT fixups!\n")); -+ if (mIsAcpiEnabled) { -+ mOriginalExitBootServices = gBS->ExitBootServices; -+ gBS->ExitBootServices = AcpiExitBootServicesHook; - } - } - -@@ -139,6 +801,8 @@ SetupConfigTableVariables ( - - AcpiSdCompatMode.Value = ACPI_SD_COMPAT_MODE_DEFAULT; - AcpiSdLimitUhs.Value = ACPI_SD_LIMIT_UHS_DEFAULT; -+ AcpiPcieEcamCompatMode.Value = ACPI_PCIE_ECAM_COMPAT_MODE_DEFAULT; -+ AcpiPcie32BitBarSpaceSizeMB.Value = ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_DEFAULT; - - Size = sizeof (ACPI_SD_COMPAT_MODE_VARSTORE_DATA); - Status = gRT->GetVariable (L"AcpiSdCompatMode", -@@ -168,6 +832,34 @@ SetupConfigTableVariables ( - ASSERT_EFI_ERROR (Status); - } - -+ Size = sizeof (ACPI_PCIE_ECAM_COMPAT_MODE_VARSTORE_DATA); -+ Status = gRT->GetVariable (L"AcpiPcieEcamCompatMode", -+ &gRpiPlatformFormSetGuid, -+ NULL, &Size, &AcpiPcieEcamCompatMode); -+ if (EFI_ERROR (Status)) { -+ Status = gRT->SetVariable ( -+ L"AcpiPcieEcamCompatMode", -+ &gRpiPlatformFormSetGuid, -+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, -+ Size, -+ &AcpiPcieEcamCompatMode); -+ ASSERT_EFI_ERROR (Status); -+ } -+ -+ Size = sizeof (ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_VARSTORE_DATA); -+ Status = gRT->GetVariable (L"AcpiPcie32BitBarSpaceSizeMB", -+ &gRpiPlatformFormSetGuid, -+ NULL, &Size, &AcpiPcie32BitBarSpaceSizeMB); -+ if (EFI_ERROR (Status)) { -+ Status = gRT->SetVariable ( -+ L"AcpiPcie32BitBarSpaceSizeMB", -+ &gRpiPlatformFormSetGuid, -+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, -+ Size, -+ &AcpiPcie32BitBarSpaceSizeMB); -+ ASSERT_EFI_ERROR (Status); -+ } -+ - Size = sizeof (UINT32); - Status = gRT->GetVariable (L"SystemTableMode", - &gRpiPlatformFormSetGuid, -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h -index 8dadc409..5aab3689 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/ConfigTable.h -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -11,9 +11,21 @@ - - #include - -+// -+// Must match the reserved memory in PlatformLib/RaspberryPiMem.c -+// -+#define PCI_RESERVED_MEM32_BASE 0xC0000000 // 3 GB -+#define PCI_RESERVED_MEM32_SIZE 0x40000000 // 1 GB -+ - #define ACPI_SD_COMPAT_MODE_DEFAULT ACPI_SD_COMPAT_MODE_BRCMSTB_BAYTRAIL - #define ACPI_SD_LIMIT_UHS_DEFAULT TRUE - -+#define ACPI_PCIE_ECAM_COMPAT_MODE_DEFAULT ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_DEN0115 -+#define ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_MINIMUM 0 -+#define ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_MAXIMUM 1024 // (PCI_RESERVED_MEM32_SIZE / 1024 / 1024) -+#define ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_STEP 1 -+#define ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_DEFAULT ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_MINIMUM -+ - #ifndef VFRCOMPILE - VOID - EFIAPI -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.c -index 7cb08635..994485f7 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.c -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.c -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -12,9 +12,12 @@ - #include - #include - #include -+#include - #include - - #include "Peripherals.h" -+#include "ConfigTable.h" -+#include "RpiPlatformDxe.h" - - STATIC - EFI_STATUS -@@ -90,6 +93,46 @@ InitGpioPinctrls ( - return EFI_SUCCESS; - } - -+BCM2712_PCIE_PLATFORM_PROTOCOL mPciePlatform = { -+ .Mem32BusBase = PCI_RESERVED_MEM32_BASE, -+ .Mem32Size = PCI_RESERVED_MEM32_SIZE, -+ -+ .Settings = { -+ [1] = { // Connector (configurable) -+ .Enabled = PCIE1_SETTINGS_ENABLED_DEFAULT, -+ .MaxLinkSpeed = PCIE1_SETTINGS_MAX_LINK_SPEED_DEFAULT -+ }, -+ [2] = { // RP1 (fixed) -+ .Enabled = TRUE, -+ .MaxLinkSpeed = 2, -+ .RcbMatchMps = TRUE, -+ .VdmToQosMap = 0xbbaa9888 -+ } -+ } -+}; -+ -+STATIC -+EFI_STATUS -+EFIAPI -+RegisterPciePlatform ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_HANDLE Handle = NULL; -+ -+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gBcm2712PciePlatformProtocolGuid); -+ Status = gBS->InstallMultipleProtocolInterfaces ( -+ &Handle, -+ &gBcm2712PciePlatformProtocolGuid, -+ &mPciePlatform, -+ NULL -+ ); -+ ASSERT_EFI_ERROR (Status); -+ -+ return Status; -+} -+ - EFI_STATUS - EFIAPI - SetupPeripherals ( -@@ -99,6 +142,39 @@ SetupPeripherals ( - InitGpioPinctrls (); - - RegisterSdControllers (); -+ RegisterPciePlatform (); - - return EFI_SUCCESS; - } -+ -+VOID -+EFIAPI -+ApplyPeripheralVariables ( -+ VOID -+ ) -+{ -+} -+ -+VOID -+EFIAPI -+SetupPeripheralVariables ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ UINTN Size; -+ -+ Size = sizeof (BCM2712_PCIE_CONTROLLER_SETTINGS); -+ Status = gRT->GetVariable (L"Pcie1Settings", -+ &gRpiPlatformFormSetGuid, -+ NULL, &Size, &mPciePlatform.Settings[1]); -+ if (EFI_ERROR (Status)) { -+ Status = gRT->SetVariable ( -+ L"Pcie1Settings", -+ &gRpiPlatformFormSetGuid, -+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, -+ Size, -+ &mPciePlatform.Settings[1]); -+ ASSERT_EFI_ERROR (Status); -+ } -+} -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.h b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.h -index ef74a44d..3ef14ebc 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.h -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/Peripherals.h -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -9,10 +9,33 @@ - #ifndef __RPI_PLATFORM_PERIPHERALS_H__ - #define __RPI_PLATFORM_PERIPHERALS_H__ - -+#include -+ -+#define PCIE1_SETTINGS_ENABLED_DEFAULT TRUE -+#define PCIE1_SETTINGS_MAX_LINK_SPEED_DEFAULT 2 -+ -+#ifndef VFRCOMPILE -+ #include -+ - EFI_STATUS - EFIAPI - SetupPeripherals ( - VOID - ); - -+VOID -+EFIAPI -+ApplyPeripheralVariables ( -+ VOID -+ ); -+ -+VOID -+EFIAPI -+SetupPeripheralVariables ( -+ VOID -+ ); -+ -+extern BCM2712_PCIE_PLATFORM_PROTOCOL mPciePlatform; -+#endif // VFRCOMPILE -+ - #endif // __RPI_PLATFORM_PERIPHERALS_H__ -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c -index c0601b39..dab20b8e 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.c -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -8,6 +8,8 @@ - - #include - #include -+#include -+#include - #include - #include - #include -@@ -16,6 +18,9 @@ - #include "ConfigTable.h" - #include "Peripherals.h" - -+UINT32 mBoardRevisionCode; -+UINT64 mSystemMemorySize; -+ - extern UINT8 RpiPlatformDxeHiiBin[]; - extern UINT8 RpiPlatformDxeStrings[]; - -@@ -90,6 +95,7 @@ SetupVariables ( - ) - { - SetupConfigTableVariables (); -+ SetupPeripheralVariables (); - } - - STATIC -@@ -100,6 +106,7 @@ ApplyVariables ( - ) - { - ApplyConfigTableVariables (); -+ ApplyPeripheralVariables (); - } - - EFI_STATUS -@@ -111,6 +118,15 @@ RpiPlatformDxeEntryPoint ( - { - EFI_STATUS Status; - -+ Status = BoardInfoGetRevisionCode (&mBoardRevisionCode); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get board revision. Status=%r\n", -+ __func__, Status)); -+ ASSERT (FALSE); -+ } -+ -+ mSystemMemorySize = BoardRevisionGetMemorySize (mBoardRevisionCode); -+ - SetupVariables (); - ApplyVariables (); - -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.h b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.h -new file mode 100644 -index 00000000..448f7a31 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.h -@@ -0,0 +1,15 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __RPI_PLATFORM_DXE_H__ -+#define __RPI_PLATFORM_DXE_H__ -+ -+extern UINT32 mBoardRevisionCode; -+extern UINT64 mSystemMemorySize; -+ -+#endif // __RPI_PLATFORM_DXE_H__ -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -index 6bb48c3f..ca2f12d8 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -@@ -1,6 +1,6 @@ - #/** @file - # --# Copyright (c) 2023, Mario Bălănică -+# Copyright (c) 2023-2024, Mario Bălănică - # - # SPDX-License-Identifier: BSD-2-Clause-Patent - # -@@ -29,24 +29,36 @@ - Platform/RaspberryPi/RPi5/RPi5.dec - Silicon/Broadcom/BroadcomPkg.dec - Silicon/Broadcom/Bcm27xx/Bcm27xx.dec -+ Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec - - [LibraryClasses] - AcpiLib -+ BaseLib -+ BaseMemoryLib -+ Bcm2712GpioLib -+ BoardInfoLib -+ BoardRevisionHelperLib - DebugLib - DevicePathLib -+ DxeServicesTableLib - HiiLib -+ MemoryAllocationLib -+ PeCoffGetEntryPointLib - UefiLib - UefiBootServicesTableLib - UefiRuntimeServicesTableLib - UefiDriverEntryPoint -- Bcm2712GpioLib - - [Guids] - gRpiPlatformFormSetGuid -+ gEfiEventReadyToBootGuid - - [Protocols] - gEfiAcpiSdtProtocolGuid ## CONSUMES - gBrcmStbSdhciDeviceProtocolGuid ## PRODUCES -+ gRp1BusProtocolGuid ## CONSUMES -+ gEfiPciIoProtocolGuid ## CONSUMES -+ gBcm2712PciePlatformProtocolGuid ## PRODUCES - - [Pcd] - gRaspberryPiTokenSpaceGuid.PcdSystemTableMode -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni -index 5cb460f6..0d29271c 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.uni -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -9,6 +9,9 @@ - #langdef en-US "English" - - #string STR_NULL_STRING #language en-US "" -+#string STR_AUTO #language en-US "Auto" -+#string STR_ENABLED #language en-US "Enabled" -+#string STR_DISABLED #language en-US "Disabled" - - #string STR_FORM_SET_TITLE #language en-US "Raspberry Pi Configuration" - #string STR_FORM_SET_TITLE_HELP #language en-US "Configure various platform settings." -@@ -48,3 +51,38 @@ - "- in 'BRCMSTB + Bay Trail' mode, speed is limited to HS. Disabling this limit is not possible.\n" - "- in 'Full Bay Trail' mode, speed is increased to DDR50. It also becomes possible to disable all other UHS-I limitations.\n\n" - "For FreeBSD: speed falls back to HS. This option has no effect." -+ -+#string STR_ACPI_PCIE_SUBTITLE #language en-US "PCI Express" -+ -+#string STR_ACPI_PCIE_ECAM_COMPAT_MODE_PROMPT #language en-US "ECAM Compatibility Mode" -+#string STR_ACPI_PCIE_ECAM_COMPAT_MODE_HELP #language en-US "Choose how to expose the non-standard PCIe configuration space to the OS.\n\n" -+ "Arm DEN0115 - compatible with FreeBSD, NetBSD and ESXi Arm Fling. Exposes the full bus hierarchy.\n\n" -+ "NXPMX6 - compatible with Windows. Exposes a single device function at most.\n\n" -+ "AMAZON GRAVITON - compatible with Linux. Exposes a single device function at most.\n\n" -+ "The Auto modes select NXPMX6 for Windows and fall back to the second option when booting other OSes." -+#string STR_ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_DEN0115 #language en-US "Auto (NXPMX6 / Arm DEN0115)" -+#string STR_ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_GRAVITON #language en-US "Auto (NXPMX6 / AMAZON GRAVITON)" -+#string STR_ACPI_PCIE_ECAM_COMPAT_MODE_DEN0115 #language en-US "Arm DEN0115" -+#string STR_ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6 #language en-US "NXPMX6" -+#string STR_ACPI_PCIE_ECAM_COMPAT_MODE_GRAVITON #language en-US "AMAZON GRAVITON" -+ -+#string STR_ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_PROMPT #language en-US "32-bit BAR Space Preferred Size" -+#string STR_ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_HELP #language en-US "Choose the preferred size (in megabytes) for the non-prefetchable 32-bit BAR space.\n\n" -+ "By default, the firmware automatically reserves the minimum amount required by all devices connected at boot. If you intend to connect devices after the OS has booted, increasing this size might be necessary.\n\n" -+ "Note: reserved space is deducted from system RAM below 4 GB." -+ -+/* -+ * PCI Express configuration -+ */ -+#string STR_PCIE_FORM_TITLE #language en-US "PCI Express" -+#string STR_PCIE_FORM_HELP #language en-US "Configure the PCIe support." -+ -+#string STR_PCIE0_SUBTITLE #language en-US "PCIe Controller #0" -+#string STR_PCIE1_SUBTITLE #language en-US "PCIe Controller #1" -+#string STR_PCIE2_SUBTITLE #language en-US "PCIe Controller #2" -+ -+#string STR_PCIE_LINK_SPEED_PROMPT #language en-US "Link Speed" -+#string STR_PCIE_LINK_SPEED_HELP #language en-US "Choose the maximum supported link speed." -+#string STR_PCIE_LINK_SPEED_GEN1 #language en-US "Gen 1 (2.5 GT/s)" -+#string STR_PCIE_LINK_SPEED_GEN2 #language en-US "Gen 2 (5 GT/s)" -+#string STR_PCIE_LINK_SPEED_GEN3 #language en-US "Gen 3 (8 GT/s)" -diff --git a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr -index e5ee4b3e..71b43219 100644 ---- a/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr -+++ b/Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxeHii.vfr -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -13,6 +13,7 @@ - #include - - #include "ConfigTable.h" -+#include "Peripherals.h" - - formset - guid = RPI_PLATFORM_FORMSET_GUID, -@@ -35,6 +36,21 @@ formset - name = AcpiSdLimitUhs, - guid = RPI_PLATFORM_FORMSET_GUID; - -+ efivarstore ACPI_PCIE_ECAM_COMPAT_MODE_VARSTORE_DATA, -+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -+ name = AcpiPcieEcamCompatMode, -+ guid = RPI_PLATFORM_FORMSET_GUID; -+ -+ efivarstore ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_VARSTORE_DATA, -+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -+ name = AcpiPcie32BitBarSpaceSizeMB, -+ guid = RPI_PLATFORM_FORMSET_GUID; -+ -+ efivarstore BCM2712_PCIE_CONTROLLER_SETTINGS, -+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, -+ name = Pcie1Settings, -+ guid = RPI_PLATFORM_FORMSET_GUID; -+ - form formid = 1, - title = STRING_TOKEN(STR_FORM_SET_TITLE); - -@@ -44,6 +60,10 @@ formset - goto 0x1000, - prompt = STRING_TOKEN(STR_SYSTEM_TABLE_FORM_TITLE), - help = STRING_TOKEN(STR_SYSTEM_TABLE_FORM_HELP); -+ -+ goto 0x1001, -+ prompt = STRING_TOKEN(STR_PCIE_FORM_TITLE), -+ help = STRING_TOKEN(STR_PCIE_FORM_HELP); - endform; - - form formid = 0x1000, -@@ -81,6 +101,54 @@ formset - flags = CHECKBOX_DEFAULT | CHECKBOX_DEFAULT_MFG | RESET_REQUIRED, - default = ACPI_SD_LIMIT_UHS_DEFAULT, - endcheckbox; -+ -+ subtitle text = STRING_TOKEN(STR_NULL_STRING); -+ subtitle text = STRING_TOKEN(STR_ACPI_PCIE_SUBTITLE); -+ -+ oneof varid = AcpiPcieEcamCompatMode.Value, -+ prompt = STRING_TOKEN(STR_ACPI_PCIE_ECAM_COMPAT_MODE_PROMPT), -+ help = STRING_TOKEN(STR_ACPI_PCIE_ECAM_COMPAT_MODE_HELP), -+ flags = NUMERIC_SIZE_4 | INTERACTIVE | RESET_REQUIRED, -+ default = ACPI_PCIE_ECAM_COMPAT_MODE_DEFAULT, -+ option text = STRING_TOKEN(STR_ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_DEN0115), value = ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_DEN0115, flags = 0; -+ option text = STRING_TOKEN(STR_ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_GRAVITON), value = ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_GRAVITON, flags = 0; -+ option text = STRING_TOKEN(STR_ACPI_PCIE_ECAM_COMPAT_MODE_DEN0115), value = ACPI_PCIE_ECAM_COMPAT_MODE_DEN0115, flags = 0; -+ option text = STRING_TOKEN(STR_ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6), value = ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6, flags = 0; -+ option text = STRING_TOKEN(STR_ACPI_PCIE_ECAM_COMPAT_MODE_GRAVITON), value = ACPI_PCIE_ECAM_COMPAT_MODE_GRAVITON, flags = 0; -+ endoneof; -+ -+ numeric varid = AcpiPcie32BitBarSpaceSizeMB.Value, -+ prompt = STRING_TOKEN(STR_ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_PROMPT), -+ help = STRING_TOKEN(STR_ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_HELP), -+ flags = DISPLAY_UINT_DEC | NUMERIC_SIZE_4 | INTERACTIVE | RESET_REQUIRED, -+ minimum = ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_MINIMUM, -+ maximum = ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_MAXIMUM, -+ step = ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_STEP, -+ default = ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_DEFAULT, -+ endnumeric; - endif; - endform; -+ -+ form formid = 0x1001, -+ title = STRING_TOKEN(STR_PCIE_FORM_TITLE); -+ -+ subtitle text = STRING_TOKEN(STR_PCIE1_SUBTITLE); -+ -+ checkbox varid = Pcie1Settings.Enabled, -+ prompt = STRING_TOKEN(STR_ENABLED), -+ help = STRING_TOKEN(STR_NULL_STRING), -+ flags = CHECKBOX_DEFAULT | CHECKBOX_DEFAULT_MFG | RESET_REQUIRED, -+ default = PCIE1_SETTINGS_ENABLED_DEFAULT, -+ endcheckbox; -+ -+ oneof varid = Pcie1Settings.MaxLinkSpeed, -+ prompt = STRING_TOKEN(STR_PCIE_LINK_SPEED_PROMPT), -+ help = STRING_TOKEN(STR_PCIE_LINK_SPEED_HELP), -+ flags = NUMERIC_SIZE_1 | INTERACTIVE | RESET_REQUIRED, -+ default = PCIE1_SETTINGS_MAX_LINK_SPEED_DEFAULT, -+ option text = STRING_TOKEN(STR_PCIE_LINK_SPEED_GEN1), value = 1, flags = 0; -+ option text = STRING_TOKEN(STR_PCIE_LINK_SPEED_GEN2), value = 2, flags = 0; -+ option text = STRING_TOKEN(STR_PCIE_LINK_SPEED_GEN3), value = 3, flags = 0; -+ endoneof; -+ endform; - endformset; -diff --git a/Platform/RaspberryPi/RPi5/Include/Rpi5McfgTable.h b/Platform/RaspberryPi/RPi5/Include/Rpi5McfgTable.h -new file mode 100644 -index 00000000..ea2b4825 ---- /dev/null -+++ b/Platform/RaspberryPi/RPi5/Include/Rpi5McfgTable.h -@@ -0,0 +1,23 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __RPI5_MCFG_TABLE_H__ -+#define __RPI5_MCFG_TABLE_H__ -+ -+#include -+#include -+#include -+ -+#pragma pack(push, 1) -+typedef struct { -+ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header; -+ EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE Entries[BCM2712_BRCMSTB_PCIE_COUNT]; -+} RPI5_MCFG_TABLE; -+#pragma pack(pop) -+ -+#endif // __RPI5_MCFG_TABLE_H__ -diff --git a/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h b/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h -index 374ecb09..5b9bad5c 100644 ---- a/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h -+++ b/Platform/RaspberryPi/RPi5/Include/RpiPlatformVarStoreData.h -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -19,4 +19,17 @@ typedef struct { - BOOLEAN Value; - } ACPI_SD_LIMIT_UHS_VARSTORE_DATA; - -+#define ACPI_PCIE_ECAM_COMPAT_MODE_DEN0115 0x00000001 -+#define ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6 0x00000002 -+#define ACPI_PCIE_ECAM_COMPAT_MODE_GRAVITON 0x00000004 -+#define ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_DEN0115 0x00000003 -+#define ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_GRAVITON 0x00000006 -+typedef struct { -+ UINT32 Value; -+} ACPI_PCIE_ECAM_COMPAT_MODE_VARSTORE_DATA; -+ -+typedef struct { -+ UINT32 Value; -+} ACPI_PCIE_32_BIT_BAR_SPACE_SIZE_MB_VARSTORE_DATA; -+ - #endif // __RPI_PLATFORM_VARSTORE_DATA_H__ -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c b/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c -index a31085d9..98575625 100644 ---- a/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * Copyright (c) 2019, Pete Batard - * Copyright (c) 2017-2018, Andrey Warkentin - * Copyright (c) 2014, Linaro Limited. All rights reserved. -@@ -56,6 +56,8 @@ ArmPlatformGetVirtualMemoryMap ( - EFI_STATUS Status; - UINT32 RevisionCode = 0; - UINT64 TotalMemorySize; -+ UINT64 MemorySizeBelow3GB; -+ UINT64 MemorySizeBelow4GB; - UINTN Index = 0; - ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; - -@@ -78,6 +80,9 @@ ArmPlatformGetVirtualMemoryMap ( - TotalMemorySize = BoardRevisionGetMemorySize (RevisionCode); - DEBUG ((DEBUG_INFO, "Total RAM: 0x%ll08X\n", TotalMemorySize)); - -+ MemorySizeBelow3GB = MIN(TotalMemorySize, 3UL * SIZE_1GB); -+ MemorySizeBelow4GB = MIN(TotalMemorySize, 4UL * SIZE_1GB); -+ - VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages - (EFI_SIZE_TO_PAGES (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) * - MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS)); -@@ -125,14 +130,36 @@ ArmPlatformGetVirtualMemoryMap ( - VirtualMemoryInfo[Index].Type = RPI_MEM_UNMAPPED_REGION; - VirtualMemoryInfo[Index++].Name = L"GPU Reserved"; - -- // System RAM >= 1 GB -- if (TotalMemorySize > SIZE_1GB) { -+ // Memory in the 1GB - 3GB range is always available. -+ if (MemorySizeBelow3GB > SIZE_1GB) { - VirtualMemoryTable[Index].PhysicalBase = SIZE_1GB; - VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Length = MemorySizeBelow3GB - VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; -+ VirtualMemoryInfo[Index].Type = RPI_MEM_BASIC_REGION; -+ VirtualMemoryInfo[Index++].Name = L"Extended System RAM < 3GB"; -+ } -+ -+ // -+ // Memory in the 3GB - 4GB range may be reserved for 32-bit PCIe BAR space. -+ // RpiPlatformDxe can reclaim part of it as system RAM depending on the needs. -+ // -+ if (MemorySizeBelow4GB > 3UL * SIZE_1GB) { -+ VirtualMemoryTable[Index].PhysicalBase = 3UL * SIZE_1GB; -+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Length = MemorySizeBelow4GB - VirtualMemoryTable[Index].PhysicalBase; -+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; -+ VirtualMemoryInfo[Index].Type = RPI_MEM_UNMAPPED_REGION; -+ VirtualMemoryInfo[Index++].Name = L"Extended System RAM < 4GB"; -+ } -+ -+ if (TotalMemorySize > 4UL * SIZE_1GB) { -+ VirtualMemoryTable[Index].PhysicalBase = 4UL * SIZE_1GB; -+ VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; - VirtualMemoryTable[Index].Length = TotalMemorySize - VirtualMemoryTable[Index].PhysicalBase; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; - VirtualMemoryInfo[Index].Type = RPI_MEM_BASIC_REGION; -- VirtualMemoryInfo[Index++].Name = L"System RAM >= 1GB"; -+ VirtualMemoryInfo[Index++].Name = L"Extended System RAM >= 4GB"; - } - - // SoC device registers -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 63e86be3..58eb5dfd 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -1,6 +1,6 @@ - # @file - # --# Copyright (c) 2023, Mario Bălănică -+# Copyright (c) 2023-2024, Mario Bălănică - # Copyright (c) 2011 - 2020, ARM Limited. All rights reserved. - # Copyright (c) 2017 - 2018, Andrei Warkentin - # Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved. -@@ -189,6 +189,9 @@ - - Bcm2712GpioLib|Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.inf - -+ PciHostBridgeLib|Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridgeLib.inf -+ PciSegmentLib|Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciSegmentLib/PciSegmentLib.inf -+ - [LibraryClasses.common.SEC] - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf -@@ -414,6 +417,8 @@ - - gRaspberryPiTokenSpaceGuid.PcdFdtSize|0x20000 - -+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|40 -+ - # UARTs - gArmPlatformTokenSpaceGuid.PL011UartClkInHz|44000000 - gArmPlatformTokenSpaceGuid.PL011UartInterrupt|153 -@@ -443,11 +448,6 @@ - # - gBcm283xTokenSpaceGuid.PcdBcm2838RngBaseAddress|0x107d208000 - -- # -- # RP1 BAR1 preconfigured by the VPU -- # -- gRpiSiliconTokenSpaceGuid.Rp1PciPeripheralsBar|0x1f00000000 -- - ## Default Terminal Type - ## 0-PCANSI, 1-VT100, 2-VT00+, 3-UTF8, 4-TTYTERM - gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 -@@ -663,11 +663,17 @@ - # PCI Support - # - ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf -- # MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf -+ MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf - MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf - MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf - EmbeddedPkg/Drivers/NonCoherentIoMmuDxe/NonCoherentIoMmuDxe.inf { - -+ # -+ # Limit DMA to bottom 3 GB to account for 32-bit BAR space. -+ # We may attempt to reclaim the memory already reserved for this, -+ # so without a hard limit here, devices in UEFI would start running -+ # into corruption issues. -+ # - gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset|0x00000000 - gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit|0xbfffffff - } -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index a00b3d98..552160a0 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -1,6 +1,6 @@ - ## @file - # --# Copyright (c) 2023, Mario Bălănică -+# Copyright (c) 2023-2024, Mario Bălănică - # Copyright (c) 2011 - 2019, ARM Limited. All rights reserved. - # Copyright (c) 2017 - 2018, Andrei Warkentin - # Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved. -@@ -284,7 +284,7 @@ READ_LOCK_STATUS = TRUE - # PCI Support - # - INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf -- # INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf -+ INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf - INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf - INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf - INF EmbeddedPkg/Drivers/NonCoherentIoMmuDxe/NonCoherentIoMmuDxe.inf -diff --git a/Silicon/Broadcom/Bcm27xx/Bcm27xx.dec b/Silicon/Broadcom/Bcm27xx/Bcm27xx.dec -index 2ace631f..6e36f6e3 100644 ---- a/Silicon/Broadcom/Bcm27xx/Bcm27xx.dec -+++ b/Silicon/Broadcom/Bcm27xx/Bcm27xx.dec -@@ -1,5 +1,6 @@ - ## @file - # -+# Copyright (c) 2024, Mario Bălănică - # Copyright (c) 2019, Pete Batard - # - # SPDX-License-Identifier: BSD-2-Clause-Patent -@@ -18,6 +19,9 @@ - [Guids] - gBcm27xxTokenSpaceGuid = {0x44045e56, 0x7056, 0x4be6, {0x88, 0xc0, 0x49, 0x0c, 0x67, 0x90, 0x2f, 0xba}} - -+[Protocols] -+ gBcm2712PciePlatformProtocolGuid = { 0xf411a098, 0xc82b, 0x4920, { 0x90, 0x07, 0xca, 0x70, 0xb3, 0x65, 0x33, 0x89 } } -+ - [PcdsFixedAtBuild.common] - gBcm27xxTokenSpaceGuid.PcdBcm27xxRegistersAddress|0x0|UINT32|0x00000001 - gBcm27xxTokenSpaceGuid.PcdBcm27xxPciRegBase|0x0|UINT32|0x00000002 -diff --git a/Silicon/Broadcom/Bcm27xx/Include/Bcm2712PcieControllerSettings.h b/Silicon/Broadcom/Bcm27xx/Include/Bcm2712PcieControllerSettings.h -new file mode 100644 -index 00000000..da5048e7 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Include/Bcm2712PcieControllerSettings.h -@@ -0,0 +1,27 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BCM2712_PCIE_CONTROLLER_SETTINGS_H__ -+#define __BCM2712_PCIE_CONTROLLER_SETTINGS_H__ -+ -+// -+// This may be used in VFR forms and variable store. -+// -+ -+#pragma pack (1) -+typedef struct { -+ BOOLEAN Enabled; -+ UINT8 MaxLinkSpeed; -+ BOOLEAN AspmSupportL0s; -+ BOOLEAN AspmSupportL1; -+ BOOLEAN RcbMatchMps; -+ UINT32 VdmToQosMap; -+} BCM2712_PCIE_CONTROLLER_SETTINGS; -+#pragma pack() -+ -+#endif // __BCM2712_PCIE_CONTROLLER_SETTINGS_H__ -diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -index c1d1f22f..f2daa41a 100644 ---- a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -+++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -35,4 +35,18 @@ - #define BCM2712_BRCMSTB_SDIO_HOST_LENGTH 0x260 - #define BCM2712_BRCMSTB_SDIO_CFG_LENGTH 0x200 - -+#define BCM2712_BRCMSTB_PCIE0_BASE 0x1000100000 -+#define BCM2712_BRCMSTB_PCIE0_CPU_MEM_BASE 0x1700000000 -+#define BCM2712_BRCMSTB_PCIE0_CPU_MEM64_BASE 0x1400000000 -+#define BCM2712_BRCMSTB_PCIE1_BASE 0x1000110000 -+#define BCM2712_BRCMSTB_PCIE1_CPU_MEM_BASE 0x1b00000000 -+#define BCM2712_BRCMSTB_PCIE1_CPU_MEM64_BASE 0x1800000000 -+#define BCM2712_BRCMSTB_PCIE2_BASE 0x1000120000 -+#define BCM2712_BRCMSTB_PCIE2_CPU_MEM_BASE 0x1f00000000 -+#define BCM2712_BRCMSTB_PCIE2_CPU_MEM64_BASE 0x1c00000000 -+#define BCM2712_BRCMSTB_PCIE_LENGTH 0x9310 -+#define BCM2712_BRCMSTB_PCIE_MEM_SIZE 0xfffffffc -+#define BCM2712_BRCMSTB_PCIE_MEM64_SIZE 0x300000000 -+#define BCM2712_BRCMSTB_PCIE_COUNT 3 -+ - #endif // __BCM2712_H__ -diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pcie.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pcie.h -new file mode 100644 -index 00000000..d751bddd ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pcie.h -@@ -0,0 +1,206 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BCM2712_PCIE_H__ -+#define __BCM2712_PCIE_H__ -+ -+#define BRCM_PCIE_CAP_REGS 0x00ac -+#define PCIE_LINK_CAPABILITIES 0xc -+#define PCIE_LINK_CAPABILITIES_SUPPORTED_LINK_SPEED_MASK 0xf -+#define PCIE_LINK_STATUS 0x12 -+#define PCIE_LINK_STATUS_LINK_SPEED_MASK 0xf -+#define PCIE_LINK_STATUS_LINK_WIDTH_SHIFT 4 -+#define PCIE_LINK_STATUS_LINK_WIDTH_MASK (0x3f << 4) -+#define PCIE_LINK_CONTROL_2 0x30 -+#define PCIE_LINK_CONTROL_2_TARGET_LINK_SPEED_MASK 0xf -+ -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1 0x0188 -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_SHIFT 2 -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK (0x3 << 2) -+#define PCIE_RC_CFG_VENDOR_SPCIFIC_REG1_LITTLE_ENDIAN 0x0 -+ -+#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c -+#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff -+ -+#define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY 0x04dc -+#define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_SHIFT 10 -+#define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK (0x3 << 10) -+#define PCIE_LINK_STATE_L0S BIT0 -+#define PCIE_LINK_STATE_L1 BIT1 -+#define PCIE_LINK_STATE_CLKPM BIT2 -+#define PCIE_LINK_STATE_L1_1 BIT3 -+#define PCIE_LINK_STATE_L1_2 BIT4 -+#define PCIE_LINK_STATE_L1_1_PCIPM BIT5 -+#define PCIE_LINK_STATE_L1_2_PCIPM BIT6 -+ -+#define PCIE_RC_TL_VDM_CTL0 0x0a20 -+#define PCIE_RC_TL_VDM_CTL0_VDM_ENABLED_MASK 0x10000 -+#define PCIE_RC_TL_VDM_CTL0_VDM_IGNORETAG_MASK 0x20000 -+#define PCIE_RC_TL_VDM_CTL0_VDM_IGNOREVNDRID_MASK 0x40000 -+ -+#define PCIE_RC_TL_VDM_CTL1 0x0a0c -+#define PCIE_RC_TL_VDM_CTL1_VDM_VNDRID0_MASK 0x0000ffff -+#define PCIE_RC_TL_VDM_CTL1_VDM_VNDRID1_MASK 0xffff0000 -+ -+#define PCIE_RC_DL_MDIO_ADDR 0x1100 -+#define PCIE_RC_DL_MDIO_CMD_SHIFT 20 -+#define PCIE_RC_DL_MDIO_CMD_MASK (0xfff << 20) -+#define PCIE_RC_DL_MDIO_CMD_READ 0x1 -+#define PCIE_RC_DL_MDIO_CMD_WRITE 0x0 -+#define PCIE_RC_DL_MDIO_PORT_SHIFT 16 -+#define PCIE_RC_DL_MDIO_PORT_MASK (0xf << 16) -+#define PCIE_RC_DL_MDIO_REGAD_SHIFT 0 -+#define PCIE_RC_DL_MDIO_REGAD_MASK (0xffff << 0) -+ -+#define PCIE_RC_DL_MDIO_PACKET(_Port, _Reg, _Cmd) \ -+ (_Port << PCIE_RC_DL_MDIO_PORT_SHIFT | \ -+ _Reg << PCIE_RC_DL_MDIO_REGAD_SHIFT | \ -+ _Cmd << PCIE_RC_DL_MDIO_CMD_SHIFT) -+ -+#define PCIE_RC_DL_MDIO_WR_DATA 0x1104 -+#define PCIE_RC_DL_MDIO_RD_DATA 0x1108 -+#define PCIE_RC_DL_MDIO_DATA_SHIFT 0 -+#define PCIE_RC_DL_MDIO_DATA_MASK (0x7fffffff << 0) -+#define PCIE_RC_DL_MDIO_DATA_DONE_MASK 0x80000000 -+ -+#define PCIE_RC_PL_PHY_CTL_15 0x184c -+#define PCIE_RC_PL_PHY_CTL_15_PM_CLK_PERIOD_MASK 0xff -+ -+#define PCIE_MISC_MISC_CTRL 0x4008 -+#define PCIE_MISC_MISC_CTRL_PCIE_RCB_64B_MODE_MASK 0x80 -+#define PCIE_MISC_MISC_CTRL_PCIE_RCB_MPS_MODE_MASK 0x400 -+#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000 -+#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000 -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_SHIFT 20 -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK (0x3 << 20) -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128 1 -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_256 2 -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_512 3 -+#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_SHIFT 27 -+#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK (0x1f << 27) -+#define PCIE_MISC_MISC_CTRL_SCB1_SIZE_SHIFT 22 -+#define PCIE_MISC_MISC_CTRL_SCB1_SIZE_MASK (0x1f << 22) -+#define PCIE_MISC_MISC_CTRL_SCB2_SIZE_SHIFT 0 -+#define PCIE_MISC_MISC_CTRL_SCB2_SIZE_MASK (0x1f << 0) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 -+ -+#define PCIE_MEM_WIN_LO(_Idx) PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((_Idx) * 8) -+#define PCIE_MEM_WIN_HI(_Idx) PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((_Idx) * 8) -+ -+#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c -+#define PCIE_MISC_RC_BAR1_CONFIG_HI 0x4030 -+ -+#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 -+#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 -+ -+#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c -+#define PCIE_MISC_RC_BAR3_CONFIG_HI 0x4040 -+ -+#define PCIE_MISC_RC_CONFIG_RETRY_TIMEOUT 0x405c -+ -+#define PCIE_MISC_PCIE_CTRL 0x4064 -+#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 -+#define PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK 0x4 -+ -+#define PCIE_MISC_PCIE_STATUS 0x4068 -+#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK 0x20 -+#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK 0x10 -+#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK 0x40 -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_MASK_BITS 12 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_LIMIT_SHIFT 20 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_LIMIT_MASK (0xfff << 20) -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_BASE_SHIFT 4 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_BASE_MASK (0xfff << 4) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_HI_BASE_MASK 0xff -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN_LIMIT_HI_LIMIT_MASK 0xff -+ -+#define PCIE_MEM_WIN_BASE_LIMIT(_Idx) (PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((_Idx) * 4)) -+#define PCIE_MEM_WIN_BASE_HI(_Idx) (PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((_Idx) * 8)) -+#define PCIE_MEM_WIN_LIMIT_HI(_Idx) (PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((_Idx) * 8)) -+ -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4304 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_PERST_ASSERT_MASK 0x8 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 -+#define PCIE_BMIPS_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x00800000 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_L1SS_ENABLE_MASK 0x00200000 -+ -+#define PCIE_MISC_CTRL_1 0x40A0 -+#define PCIE_MISC_CTRL_1_OUTBOUND_TC_MASK 0xf -+#define PCIE_MISC_CTRL_1_OUTBOUND_NO_SNOOP_MASK BIT3 -+#define PCIE_MISC_CTRL_1_OUTBOUND_RO_MASK BIT4 -+#define PCIE_MISC_CTRL_1_EN_VDM_QOS_CONTROL_MASK BIT5 -+ -+#define PCIE_MISC_UBUS_CTRL 0x40a4 -+#define PCIE_MISC_UBUS_CTRL_UBUS_PCIE_REPLY_ERR_DIS_MASK BIT13 -+#define PCIE_MISC_UBUS_CTRL_UBUS_PCIE_REPLY_DECERR_DIS_MASK BIT19 -+ -+#define PCIE_MISC_UBUS_TIMEOUT 0x40A8 -+ -+#define PCIE_MISC_UBUS_BAR1_CONFIG_REMAP_LO 0x40ac -+#define PCIE_MISC_UBUS_BAR1_CONFIG_REMAP_HI 0x40b0 -+ -+#define PCIE_MISC_UBUS_BAR2_CONFIG_REMAP_LO 0x40b4 -+#define PCIE_MISC_UBUS_BAR2_CONFIG_REMAP_HI 0x40b8 -+ -+#define PCIE_MISC_RC_BAR4_CONFIG_LO 0x40d4 -+#define PCIE_MISC_RC_BAR4_CONFIG_HI 0x40d8 -+#define PCIE_MISC_RC_BAR_CONFIG_LO_SIZE_MASK 0x1f -+ -+#define PCIE_IB_WIN_LO(_Idx) \ -+ ((_Idx == 0) ? PCIE_MISC_RC_BAR2_CONFIG_LO \ -+ : PCIE_MISC_RC_BAR4_CONFIG_LO + ((_Idx - 1) * 8)) -+ -+#define PCIE_IB_WIN_HI(_Idx) \ -+ ((_Idx == 0) ? PCIE_MISC_RC_BAR2_CONFIG_HI \ -+ : PCIE_MISC_RC_BAR4_CONFIG_HI + ((_Idx - 1) * 8)) -+ -+#define PCIE_MISC_UBUS_BAR_CONFIG_REMAP_ENABLE BIT0 -+#define PCIE_MISC_UBUS_BAR_CONFIG_REMAP_LO_MASK 0xfffff000 -+#define PCIE_MISC_UBUS_BAR_CONFIG_REMAP_HI_MASK 0xff -+#define PCIE_MISC_UBUS_BAR4_CONFIG_REMAP_LO 0x410c -+#define PCIE_MISC_UBUS_BAR4_CONFIG_REMAP_HI 0x4110 -+ -+#define PCIE_IB_WIN_REMAP_LO(_Idx) \ -+ ((_Idx == 0) ? PCIE_MISC_UBUS_BAR2_CONFIG_REMAP_LO \ -+ : PCIE_MISC_UBUS_BAR4_CONFIG_REMAP_LO + ((_Idx - 1) * 8)) -+ -+#define PCIE_IB_WIN_REMAP_HI(_Idx) \ -+ ((_Idx == 0) ? PCIE_MISC_UBUS_BAR2_CONFIG_REMAP_HI \ -+ : PCIE_MISC_UBUS_BAR4_CONFIG_REMAP_HI + ((_Idx - 1) * 8)) -+ -+#define PCIE_MISC_VDM_PRIORITY_TO_QOS_MAP_HI 0x4164 -+#define PCIE_MISC_VDM_PRIORITY_TO_QOS_MAP_LO 0x4168 -+ -+#define PCIE_MISC_AXI_INTF_CTRL 0x416C -+#define AXI_REQFIFO_EN_QOS_PROPAGATION BIT7 -+ -+#define PCIE_MISC_AXI_READ_ERROR_DATA 0x4170 -+ -+#define PCIE_INTR2_CPU_BASE 0x4400 -+#define PCIE_INTR2_CPU_MASK_SET 0x10 -+#define PCIE_INTR2_CPU_MASK_CLR 0x14 -+ -+#define PCIE_EXT_CFG_DATA 0x8000 -+#define PCIE_EXT_CFG_INDEX 0x9000 -+ -+#define MDIO_PHY_SET_ADDR_OFFSET 0x1f -+ -+#define PCIE_NUM_INBOUND_WINDOWS 8 -+#define PCIE_NUM_OUTBOUND_WINDOWS 4 -+ -+#define PCI_INVALID_ADDRESS 0xffffffff -+ -+#endif // __BCM2712_PCIE_H__ -diff --git a/Silicon/Broadcom/Bcm27xx/Include/Protocol/Bcm2712PciePlatform.h b/Silicon/Broadcom/Bcm27xx/Include/Protocol/Bcm2712PciePlatform.h -new file mode 100644 -index 00000000..467b2d62 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Include/Protocol/Bcm2712PciePlatform.h -@@ -0,0 +1,28 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BCM2712_PCIE_PLATFORM_H__ -+#define __BCM2712_PCIE_PLATFORM_H__ -+ -+#include -+#include -+ -+#define BCM2712_PCIE_PLATFORM_PROTOCOL_GUID \ -+ { 0xf411a098, 0xc82b, 0x4920, { 0x90, 0x07, 0xca, 0x70, 0xb3, 0x65, 0x33, 0x89 } } -+ -+typedef struct _BCM2712_PCIE_PLATFORM_PROTOCOL BCM2712_PCIE_PLATFORM_PROTOCOL; -+ -+struct _BCM2712_PCIE_PLATFORM_PROTOCOL { -+ EFI_PHYSICAL_ADDRESS Mem32BusBase; -+ UINTN Mem32Size; -+ BCM2712_PCIE_CONTROLLER_SETTINGS Settings[BCM2712_BRCMSTB_PCIE_COUNT]; -+}; -+ -+extern EFI_GUID gBcm2712PciePlatformProtocolGuid; -+ -+#endif // __BCM2712_PCIE_PLATFORM_H__ -diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridge.c b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridge.c -new file mode 100644 -index 00000000..b2bfabd4 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridge.c -@@ -0,0 +1,478 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "Bcm2712PciHostBridge.h" -+ -+EFI_STATUS -+PciePhyRead ( -+ IN BCM2712_PCIE_RC *Pcie, -+ IN UINT8 Register, -+ OUT UINT16 *Value -+ ) -+{ -+ UINT32 Retry; -+ UINT32 Data; -+ -+ MmioWrite32 ( -+ Pcie->Base + PCIE_RC_DL_MDIO_ADDR, -+ PCIE_RC_DL_MDIO_PACKET (0, Register, PCIE_RC_DL_MDIO_CMD_READ) -+ ); -+ MmioRead32 (Pcie->Base + PCIE_RC_DL_MDIO_ADDR); -+ -+ for (Retry = 10; Retry > 0; Retry--) { -+ Data = MmioRead32 (Pcie->Base + PCIE_RC_DL_MDIO_RD_DATA); -+ if ((Data & PCIE_RC_DL_MDIO_DATA_DONE_MASK) != 0) { -+ *Value = (Data & PCIE_RC_DL_MDIO_DATA_MASK) >> PCIE_RC_DL_MDIO_DATA_SHIFT; -+ return EFI_SUCCESS; -+ } -+ -+ gBS->Stall (10); -+ } -+ -+ return EFI_TIMEOUT; -+} -+ -+STATIC -+EFI_STATUS -+PciePhyWrite ( -+ IN BCM2712_PCIE_RC *Pcie, -+ IN UINT8 Register, -+ IN UINT16 Value -+ ) -+{ -+ UINT32 Retry; -+ UINT32 Data; -+ -+ MmioWrite32 ( -+ Pcie->Base + PCIE_RC_DL_MDIO_ADDR, -+ PCIE_RC_DL_MDIO_PACKET (0, Register, PCIE_RC_DL_MDIO_CMD_WRITE) -+ ); -+ MmioRead32 (Pcie->Base + PCIE_RC_DL_MDIO_ADDR); -+ MmioWrite32 (Pcie->Base + PCIE_RC_DL_MDIO_WR_DATA, PCIE_RC_DL_MDIO_DATA_DONE_MASK | Value); -+ -+ for (Retry = 10; Retry > 0; Retry--) { -+ Data = MmioRead32 (Pcie->Base + PCIE_RC_DL_MDIO_WR_DATA); -+ if ((Data & PCIE_RC_DL_MDIO_DATA_DONE_MASK) == 0) { -+ return EFI_SUCCESS; -+ } -+ -+ gBS->Stall (10); -+ } -+ -+ return EFI_TIMEOUT; -+} -+ -+STATIC -+VOID -+PcieSetupPhy ( -+ IN BCM2712_PCIE_RC *Pcie -+ ) -+{ -+ // Enable PHY SerDes -+ MmioAnd32 ( -+ Pcie->Base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, -+ ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK -+ ); -+ gBS->Stall (100); -+ -+ // Allow a 54 MHz reference clock -+ PciePhyWrite (Pcie, MDIO_PHY_SET_ADDR_OFFSET, 0x1600); -+ PciePhyWrite (Pcie, 0x16, 0x50b9); -+ PciePhyWrite (Pcie, 0x17, 0xbda1); -+ PciePhyWrite (Pcie, 0x18, 0x0094); -+ PciePhyWrite (Pcie, 0x19, 0x97b4); -+ PciePhyWrite (Pcie, 0x1b, 0x5030); -+ PciePhyWrite (Pcie, 0x1c, 0x5030); -+ PciePhyWrite (Pcie, 0x1e, 0x0007); -+ gBS->Stall (100); -+ -+ // Tweak PM period for 54 MHz clock -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_RC_PL_PHY_CTL_15, -+ ~PCIE_RC_PL_PHY_CTL_15_PM_CLK_PERIOD_MASK, -+ 18 // ns -+ ); -+} -+ -+STATIC -+UINTN -+PcieEncodeInboundSize ( -+ IN UINT64 Size -+ ) -+{ -+ UINTN Log2Size; -+ -+ Log2Size = HighBitSet64 (Size); -+ -+ if ((Log2Size >= 12) && (Log2Size <= 15)) { -+ // 4KB - 32KB -+ return (Log2Size - 12) + 0x1c; -+ } else if ((Log2Size >= 16) && (Log2Size <= 36)) { -+ // 64KB - 64GB -+ return Log2Size - 15; -+ } -+ -+ return 0; -+} -+ -+STATIC -+VOID -+PcieSetupInboundWindow ( -+ IN BCM2712_PCIE_RC *Pcie, -+ IN UINT32 Index, -+ IN EFI_PHYSICAL_ADDRESS CpuBase, -+ IN EFI_PHYSICAL_ADDRESS BusBase, -+ IN UINTN Size -+ ) -+{ -+ UINT32 InboundSize; -+ -+ InboundSize = PcieEncodeInboundSize (Size); -+ -+ MmioWrite32 ( -+ Pcie->Base + PCIE_IB_WIN_LO (Index), -+ ((UINT32)BusBase & ~PCIE_MISC_RC_BAR_CONFIG_LO_SIZE_MASK) | InboundSize -+ ); -+ MmioWrite32 (Pcie->Base + PCIE_IB_WIN_HI (Index), BusBase >> 32); -+ -+ MmioWrite32 ( -+ Pcie->Base + PCIE_IB_WIN_REMAP_LO (Index), -+ ((UINT32)CpuBase & PCIE_MISC_UBUS_BAR_CONFIG_REMAP_LO_MASK) | -+ PCIE_MISC_UBUS_BAR_CONFIG_REMAP_ENABLE -+ ); -+ MmioWrite32 ( -+ Pcie->Base + PCIE_IB_WIN_REMAP_HI (Index), -+ (CpuBase >> 32) & PCIE_MISC_UBUS_BAR_CONFIG_REMAP_HI_MASK -+ ); -+ -+ if (Index == 0) { -+ // Set memory controller size based on the primary window. -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_MISC_MISC_CTRL, -+ ~PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK, -+ InboundSize << PCIE_MISC_MISC_CTRL_SCB0_SIZE_SHIFT -+ ); -+ } -+} -+ -+STATIC -+VOID -+PcieSetupOutboundWindow ( -+ IN BCM2712_PCIE_RC *Pcie, -+ IN UINT32 Index, -+ IN EFI_PHYSICAL_ADDRESS CpuBase, -+ IN EFI_PHYSICAL_ADDRESS BusBase, -+ IN UINTN Size -+ ) -+{ -+ EFI_PHYSICAL_ADDRESS CpuBaseMB; -+ EFI_PHYSICAL_ADDRESS CpuLimitMB; -+ -+ CpuBaseMB = CpuBase / SIZE_1MB; -+ CpuLimitMB = (CpuBase + Size - 1) / SIZE_1MB; -+ -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_MEM_WIN_BASE_LIMIT (Index), -+ ~(PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_BASE_MASK | -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_LIMIT_MASK), -+ CpuBaseMB << PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_BASE_SHIFT | -+ CpuLimitMB << PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_LIMIT_SHIFT -+ ); -+ -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_MEM_WIN_BASE_HI (Index), -+ ~PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_HI_BASE_MASK, -+ CpuBaseMB >> PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_MASK_BITS -+ ); -+ -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_MEM_WIN_LIMIT_HI (Index), -+ ~PCIE_MISC_CPU_2_PCIE_MEM_WIN_LIMIT_HI_LIMIT_MASK, -+ CpuLimitMB >> PCIE_MISC_CPU_2_PCIE_MEM_WIN_BASE_LIMIT_MASK_BITS -+ ); -+ -+ MmioWrite32 (Pcie->Base + PCIE_MEM_WIN_LO (Index), (UINT32)BusBase); -+ MmioWrite32 (Pcie->Base + PCIE_MEM_WIN_HI (Index), BusBase >> 32); -+} -+ -+STATIC -+VOID -+PcieSetupAxiQosPriority ( -+ IN BCM2712_PCIE_RC *Pcie -+ ) -+{ -+ MmioAnd32 (Pcie->Base + PCIE_MISC_AXI_INTF_CTRL, ~AXI_REQFIFO_EN_QOS_PROPAGATION); -+ -+ if (Pcie->Settings->VdmToQosMap == 0) { -+ MmioAnd32 (Pcie->Base + PCIE_MISC_CTRL_1, ~PCIE_MISC_CTRL_1_EN_VDM_QOS_CONTROL_MASK); -+ return; -+ } -+ -+ MmioOr32 (Pcie->Base + PCIE_MISC_CTRL_1, PCIE_MISC_CTRL_1_EN_VDM_QOS_CONTROL_MASK); -+ -+ MmioWrite32 (Pcie->Base + PCIE_MISC_VDM_PRIORITY_TO_QOS_MAP_LO, Pcie->Settings->VdmToQosMap); -+ MmioWrite32 (Pcie->Base + PCIE_MISC_VDM_PRIORITY_TO_QOS_MAP_HI, Pcie->Settings->VdmToQosMap); -+ -+ MmioWrite32 (Pcie->Base + PCIE_RC_TL_VDM_CTL1, 0); -+ -+ MmioOr32 ( -+ Pcie->Base + PCIE_RC_TL_VDM_CTL0, -+ PCIE_RC_TL_VDM_CTL0_VDM_ENABLED_MASK | -+ PCIE_RC_TL_VDM_CTL0_VDM_IGNORETAG_MASK | -+ PCIE_RC_TL_VDM_CTL0_VDM_IGNOREVNDRID_MASK -+ ); -+} -+ -+STATIC -+VOID -+PcieSetupAspm ( -+ IN BCM2712_PCIE_RC *Pcie -+ ) -+{ -+ UINT32 Data; -+ UINT32 AspmCaps; -+ -+ Data = MmioRead32 (Pcie->Base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ Data &= ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK; -+ Data &= ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_L1SS_ENABLE_MASK; -+ // -+ // TODO: BCM2712 cannot support both L1 and L1SS at the same time. -+ // Only allow L1 for now, but we should read the capabilities of -+ // the endpoint and pick L1SS if possible. -+ // -+ Data |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK; -+ MmioWrite32 (Pcie->Base + PCIE_MISC_HARD_PCIE_HARD_DEBUG, Data); -+ -+ AspmCaps = 0; -+ -+ if (Pcie->Settings->AspmSupportL0s) { -+ AspmCaps |= PCIE_LINK_STATE_L0S; -+ } -+ -+ if (Pcie->Settings->AspmSupportL1) { -+ AspmCaps |= PCIE_LINK_STATE_L1; -+ } -+ -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY, -+ ~PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK, -+ AspmCaps << PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_SHIFT -+ ); -+} -+ -+STATIC -+VOID -+PcieSetupLinkSpeed ( -+ IN BCM2712_PCIE_RC *Pcie, -+ IN UINT8 Speed -+ ) -+{ -+ if (Speed == 0) { -+ return; -+ } -+ -+ MmioAndThenOr16 ( -+ Pcie->Base + BRCM_PCIE_CAP_REGS + PCIE_LINK_CONTROL_2, -+ ~PCIE_LINK_CONTROL_2_TARGET_LINK_SPEED_MASK, -+ Speed -+ ); -+ -+ MmioAndThenOr32 ( -+ Pcie->Base + BRCM_PCIE_CAP_REGS + PCIE_LINK_CAPABILITIES, -+ ~PCIE_LINK_CAPABILITIES_SUPPORTED_LINK_SPEED_MASK, -+ Speed -+ ); -+} -+ -+STATIC -+VOID -+PcieAssertPerst ( -+ IN BCM2712_PCIE_RC *Pcie, -+ IN BOOLEAN Value -+ ) -+{ -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_MISC_PCIE_CTRL, -+ ~PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK, -+ Value ? 0 : PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK -+ ); -+} -+ -+STATIC -+BOOLEAN -+PcieIsLinkUp ( -+ IN BCM2712_PCIE_RC *Pcie -+ ) -+{ -+ UINT32 Status; -+ -+ Status = MmioRead32 (Pcie->Base + PCIE_MISC_PCIE_STATUS); -+ -+ return (Status & (PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK | -+ PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK)) != 0; -+} -+ -+STATIC -+EFI_STATUS -+PcieWaitForLinkUp ( -+ IN BCM2712_PCIE_RC *Pcie -+ ) -+{ -+ UINT32 Retry; -+ UINT16 LinkStatus; -+ UINT8 LinkSpeed; -+ UINT8 LinkWidth; -+ -+ // Wait up to 100 ms -+ for (Retry = 20; Retry > 0; Retry--) { -+ if (PcieIsLinkUp (Pcie)) { -+ break; -+ } -+ -+ gBS->Stall (5000); -+ } -+ -+ if (Retry == 0) { -+ DEBUG ((DEBUG_ERROR, "PCIe: Link down (timeout)\n")); -+ return EFI_TIMEOUT; -+ } -+ -+ LinkStatus = MmioRead16 (Pcie->Base + BRCM_PCIE_CAP_REGS + PCIE_LINK_STATUS); -+ LinkSpeed = LinkStatus & PCIE_LINK_STATUS_LINK_SPEED_MASK; -+ LinkWidth = (LinkStatus & PCIE_LINK_STATUS_LINK_WIDTH_MASK) >> PCIE_LINK_STATUS_LINK_WIDTH_SHIFT; -+ -+ DEBUG ((DEBUG_INFO, "PCIe: Link up (Gen %d x%d)\n", LinkSpeed, LinkWidth)); -+ -+ return EFI_SUCCESS; -+} -+ -+EFI_STATUS -+PcieInitRc ( -+ IN BCM2712_PCIE_RC *Pcie -+ ) -+{ -+ DEBUG ((DEBUG_INIT, "PCIe: Base: 0x%lx\n", Pcie->Base)); -+ DEBUG ((DEBUG_INIT, "PCIe: Settings->MaxLinkSpeed: %d\n", Pcie->Settings->MaxLinkSpeed)); -+ DEBUG ((DEBUG_INIT, "PCIe: Settings->AspmSupportL0s: %d\n", Pcie->Settings->AspmSupportL0s)); -+ DEBUG ((DEBUG_INIT, "PCIe: Settings->AspmSupportL1: %d\n", Pcie->Settings->AspmSupportL1)); -+ DEBUG ((DEBUG_INIT, "PCIe: Settings->RcbMatchMps: %d\n", Pcie->Settings->RcbMatchMps)); -+ DEBUG ((DEBUG_INIT, "PCIe: Settings->VdmToQosMap: %x\n", Pcie->Settings->VdmToQosMap)); -+ -+ // -+ // The VPU firmware has already deasserted the bridge resets. -+ // Only touch PERST. -+ // -+ PcieAssertPerst (Pcie, TRUE); -+ gBS->Stall (100); -+ -+ PcieSetupPhy (Pcie); -+ -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_MISC_MISC_CTRL, -+ ~PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK, -+ PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128 << PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_SHIFT | -+ PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK | -+ PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK | -+ Pcie->Settings->RcbMatchMps ? PCIE_MISC_MISC_CTRL_PCIE_RCB_MPS_MODE_MASK : 0 -+ ); -+ -+ // -+ // Disable AXI bus errors to avoid Arm SError exceptions -+ // when the link is down. -+ // -+ MmioOr32 ( -+ Pcie->Base + PCIE_MISC_UBUS_CTRL, -+ PCIE_MISC_UBUS_CTRL_UBUS_PCIE_REPLY_ERR_DIS_MASK | -+ PCIE_MISC_UBUS_CTRL_UBUS_PCIE_REPLY_DECERR_DIS_MASK -+ ); -+ MmioWrite32 (Pcie->Base + PCIE_MISC_AXI_READ_ERROR_DATA, PCI_INVALID_ADDRESS); -+ -+ // -+ // Set UBUS timeout to ~250ms and CRS timeout to ~240ms. -+ // -+ MmioWrite32 (Pcie->Base + PCIE_MISC_UBUS_TIMEOUT, 0xb2d0000); -+ MmioWrite32 (Pcie->Base + PCIE_MISC_RC_CONFIG_RETRY_TIMEOUT, 0xaba0000); -+ -+ PcieSetupAxiQosPriority (Pcie); -+ -+ // -+ // Disable GISB & SCB windows -+ // -+ MmioAnd32 (Pcie->Base + PCIE_MISC_RC_BAR1_CONFIG_LO, ~PCIE_MISC_RC_BAR_CONFIG_LO_SIZE_MASK); -+ MmioAnd32 (Pcie->Base + PCIE_MISC_RC_BAR3_CONFIG_LO, ~PCIE_MISC_RC_BAR_CONFIG_LO_SIZE_MASK); -+ -+ // -+ // Map inbound windows -+ // -+ PcieSetupInboundWindow ( -+ Pcie, -+ 0, -+ Pcie->Inbound.CpuBase, -+ Pcie->Inbound.BusBase, -+ Pcie->Inbound.Size -+ ); -+ -+ // -+ // Map outbound windows -+ // -+ PcieSetupOutboundWindow ( -+ Pcie, -+ 0, -+ Pcie->Mem32.CpuBase, -+ Pcie->Mem32.BusBase, -+ Pcie->Mem32.Size -+ ); -+ -+ PcieSetupOutboundWindow ( -+ Pcie, -+ 1, -+ Pcie->Mem64.CpuBase, -+ Pcie->Mem64.BusBase, -+ Pcie->Mem64.Size -+ ); -+ -+ // Clear and mask interrupts -+ MmioWrite32 (Pcie->Base + PCIE_INTR2_CPU_BASE + PCIE_INTR2_CPU_MASK_CLR, 0xffffffff); -+ MmioWrite32 (Pcie->Base + PCIE_INTR2_CPU_BASE + PCIE_INTR2_CPU_MASK_SET, 0xffffffff); -+ -+ // Program PCI to PCI bridge class into the root port -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_RC_CFG_PRIV1_ID_VAL3, -+ ~PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK, -+ ((PCI_CLASS_BRIDGE << 8) | PCI_CLASS_BRIDGE_P2P) << 8 -+ ); -+ -+ // PCIe->SCB little-endian mode for BAR -+ MmioAndThenOr32 ( -+ Pcie->Base + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1, -+ ~PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK, -+ PCIE_RC_CFG_VENDOR_SPCIFIC_REG1_LITTLE_ENDIAN -+ << PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_SHIFT -+ ); -+ -+ PcieSetupLinkSpeed (Pcie, Pcie->Settings->MaxLinkSpeed); -+ -+ PcieSetupAspm (Pcie); -+ -+ // Start link-up -+ PcieAssertPerst (Pcie, FALSE); -+ gBS->Stall (100000); -+ -+ PcieWaitForLinkUp (Pcie); -+ -+ return EFI_SUCCESS; -+} -diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridge.h b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridge.h -new file mode 100644 -index 00000000..6e6723a8 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridge.h -@@ -0,0 +1,33 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __BCM2712_PCI_HOST_BRIDGE_H__ -+#define __BCM2712_PCI_HOST_BRIDGE_H__ -+ -+#include -+ -+typedef struct { -+ EFI_PHYSICAL_ADDRESS CpuBase; -+ EFI_PHYSICAL_ADDRESS BusBase; -+ UINTN Size; -+} BCM_PCIE_RC_WINDOW; -+ -+typedef struct { -+ EFI_PHYSICAL_ADDRESS Base; -+ BCM_PCIE_RC_WINDOW Inbound; -+ BCM_PCIE_RC_WINDOW Mem32; -+ BCM_PCIE_RC_WINDOW Mem64; -+ BCM2712_PCIE_CONTROLLER_SETTINGS *Settings; -+} BCM2712_PCIE_RC; -+ -+EFI_STATUS -+PcieInitRc ( -+ IN BCM2712_PCIE_RC *Pcie -+ ); -+ -+#endif // __BCM2712_PCI_HOST_BRIDGE_H__ -diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridgeLib.c b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridgeLib.c -new file mode 100644 -index 00000000..a655f57e ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridgeLib.c -@@ -0,0 +1,326 @@ -+/** @file -+ * -+ * Broadcom BCM2712 PCI Host Bridge Library -+ * -+ * This implementation configures the PCIe RCs as close to standard as -+ * possible, to accomodate ACPI OS usage. -+ * -+ * The inbound and 64-bit outbound windows are identity mapped, while the -+ * 32-bit non-prefetchable one is translated. Since this window must be -+ * located below 4 GB, it inevitably overlaps a part of the inbound window. -+ * This alone is not an issue; however, once the bridge's aperture is -+ * programmed, inbound (DMA) traffic cannot pass through it anymore. -+ * -+ * In order to avoid DMA corruption, the platform must ensure that the decoded -+ * aperture (Memory Base - Limit in the root port configuration) is not used -+ * for DMA, either by reserving system RAM or by imposing a limit. -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * Copyright (c) 2017, Linaro Ltd. All rights reserved. -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "Bcm2712PciHostBridge.h" -+ -+#pragma pack(1) -+typedef struct { -+ ACPI_HID_DEVICE_PATH AcpiDevicePath; -+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath; -+} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH; -+#pragma pack () -+ -+STATIC CONST EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mPciDevicePathTemplate[] = { -+ { -+ { -+ { -+ ACPI_DEVICE_PATH, -+ ACPI_DP, -+ { -+ (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)), -+ (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8) -+ } -+ }, -+ EISA_PNP_ID (0x0A08), // PCI Express -+ 0 -+ }, -+ -+ { -+ END_DEVICE_PATH_TYPE, -+ END_ENTIRE_DEVICE_PATH_SUBTYPE, -+ { -+ END_DEVICE_PATH_LENGTH, -+ 0 -+ } -+ } -+ }, -+}; -+ -+GLOBAL_REMOVE_IF_UNREFERENCED -+CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = { -+ L"Mem", L"I/O", L"Bus" -+}; -+ -+STATIC BCM2712_PCIE_RC mPcieRcs[BCM2712_BRCMSTB_PCIE_COUNT] = { -+ { -+ .Base = BCM2712_BRCMSTB_PCIE0_BASE, -+ .Mem32 ={ -+ .CpuBase = BCM2712_BRCMSTB_PCIE0_CPU_MEM_BASE -+ }, -+ .Mem64 ={ -+ .CpuBase = BCM2712_BRCMSTB_PCIE0_CPU_MEM64_BASE, -+ .BusBase = BCM2712_BRCMSTB_PCIE0_CPU_MEM64_BASE, -+ .Size = BCM2712_BRCMSTB_PCIE_MEM64_SIZE -+ } -+ }, -+ { -+ .Base = BCM2712_BRCMSTB_PCIE1_BASE, -+ .Mem32 ={ -+ .CpuBase = BCM2712_BRCMSTB_PCIE1_CPU_MEM_BASE -+ }, -+ .Mem64 ={ -+ .CpuBase = BCM2712_BRCMSTB_PCIE1_CPU_MEM64_BASE, -+ .BusBase = BCM2712_BRCMSTB_PCIE1_CPU_MEM64_BASE, -+ .Size = BCM2712_BRCMSTB_PCIE_MEM64_SIZE -+ } -+ }, -+ { -+ .Base = BCM2712_BRCMSTB_PCIE2_BASE, -+ .Mem32 ={ -+ .CpuBase = BCM2712_BRCMSTB_PCIE2_CPU_MEM_BASE -+ }, -+ .Mem64 ={ -+ .CpuBase = BCM2712_BRCMSTB_PCIE2_CPU_MEM64_BASE, -+ .BusBase = BCM2712_BRCMSTB_PCIE2_CPU_MEM64_BASE, -+ .Size = BCM2712_BRCMSTB_PCIE_MEM64_SIZE -+ } -+ } -+}; -+ -+/** -+ Return all the root bridge instances in an array. -+ -+ @param Count Return the count of root bridge instances. -+ -+ @return All the root bridge instances in an array. -+ The array should be passed into PciHostBridgeFreeRootBridges() -+ when it's not used. -+**/ -+PCI_ROOT_BRIDGE * -+EFIAPI -+PciHostBridgeGetRootBridges ( -+ OUT UINTN *Count -+ ) -+{ -+ EFI_STATUS Status; -+ UINTN Seg; -+ UINTN Index; -+ UINTN SegCount; -+ BCM2712_PCIE_PLATFORM_PROTOCOL *PciePlatform; -+ PCI_ROOT_BRIDGE *RootBridges; -+ -+ Status = gBS->LocateProtocol ( -+ &gBcm2712PciePlatformProtocolGuid, -+ NULL, -+ (VOID **)&PciePlatform -+ ); -+ ASSERT_EFI_ERROR (Status); -+ if (EFI_ERROR (Status)) { -+ goto Fail; -+ } -+ -+ SegCount = ARRAY_SIZE (mPcieRcs); -+ -+ RootBridges = AllocateZeroPool (SegCount * sizeof (PCI_ROOT_BRIDGE)); -+ if (RootBridges == NULL) { -+ ASSERT (FALSE); -+ goto Fail; -+ } -+ -+ for (Seg = 0, Index = 0; Seg < SegCount; Seg++) { -+ if (PciePlatform->Settings[Seg].Enabled == FALSE) { -+ continue; -+ } -+ -+ mPcieRcs[Seg].Inbound.CpuBase = 0; -+ mPcieRcs[Seg].Inbound.BusBase = 0; -+ mPcieRcs[Seg].Inbound.Size = SIZE_64GB; -+ -+ mPcieRcs[Seg].Mem32.BusBase = PciePlatform->Mem32BusBase; -+ mPcieRcs[Seg].Mem32.Size = PciePlatform->Mem32Size; -+ -+ mPcieRcs[Seg].Settings = &PciePlatform->Settings[Seg]; -+ -+ Status = PcieInitRc (&mPcieRcs[Seg]); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "PCIe: Failed to init segment %d. Status=%r\n", Seg, Status)); -+ continue; -+ } -+ -+ RootBridges[Index].Segment = Seg; -+ RootBridges[Index].Supports = 0; -+ RootBridges[Index].Attributes = RootBridges[Index].Supports; -+ RootBridges[Index].DmaAbove4G = FALSE; -+ RootBridges[Index].NoExtendedConfigSpace = FALSE; -+ RootBridges[Index].ResourceAssigned = FALSE; -+ RootBridges[Index].AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM | -+ EFI_PCI_HOST_BRIDGE_MEM64_DECODE; -+ RootBridges[Index].Bus.Base = 0; -+ RootBridges[Index].Bus.Limit = PCI_MAX_BUS; -+ -+ // -+ // Workaround: pretend to support I/O space even though we don't, -+ // because otherwise PciHostBridgeDxe would report a resource conflict -+ // on devices with I/O BARs and end up destroying all root bridges. -+ // Many such devices don't actually need those BARs to work (e.g. ASM1061, -+ // RTL NICs), so ideally, PciBusDxe should skip allocating them when there's -+ // no space and leave it up to the device drivers to decide if that's a problem. -+ // -+ RootBridges[Index].Io.Base = 0; -+ RootBridges[Index].Io.Limit = RootBridges[Index].Io.Base + SIZE_64KB - 1; -+ RootBridges[Index].Io.Translation = MAX_UINT64 - (mPcieRcs[Seg].Mem32.CpuBase + mPcieRcs[Seg].Mem32.Size) + 1; -+ -+ RootBridges[Index].Mem.Base = mPcieRcs[Seg].Mem32.BusBase; -+ RootBridges[Index].Mem.Limit = RootBridges[Index].Mem.Base + mPcieRcs[Seg].Mem32.Size - 1; -+ RootBridges[Index].Mem.Translation = MAX_UINT64 - (mPcieRcs[Seg].Mem32.CpuBase - mPcieRcs[Seg].Mem32.BusBase) + 1; -+ -+ RootBridges[Index].MemAbove4G.Base = mPcieRcs[Seg].Mem64.BusBase; -+ RootBridges[Index].MemAbove4G.Limit = RootBridges[Index].MemAbove4G.Base + mPcieRcs[Seg].Mem64.Size - 1; -+ RootBridges[Index].MemAbove4G.Translation = MAX_UINT64 - (mPcieRcs[Seg].Mem64.CpuBase - mPcieRcs[Seg].Mem64.BusBase) + 1; -+ -+ RootBridges[Index].PMem.Base = MAX_UINT64; -+ RootBridges[Index].PMem.Limit = 0; -+ -+ RootBridges[Index].PMemAbove4G.Base = MAX_UINT64; -+ RootBridges[Index].PMemAbove4G.Limit = 0; -+ -+ RootBridges[Index].DevicePath = AllocateCopyPool ( -+ sizeof (EFI_PCI_ROOT_BRIDGE_DEVICE_PATH), -+ &mPciDevicePathTemplate -+ ); -+ if (RootBridges[Index].DevicePath == NULL) { -+ ASSERT (FALSE); -+ PciHostBridgeFreeRootBridges (RootBridges, Index); -+ goto Fail; -+ } -+ -+ ((EFI_PCI_ROOT_BRIDGE_DEVICE_PATH *)RootBridges[Index].DevicePath)->AcpiDevicePath.UID = Seg; -+ -+ Index++; -+ } -+ -+ if (Index == 0) { -+ FreePool (RootBridges); -+ goto Fail; -+ } -+ -+ *Count = Index; -+ return RootBridges; -+ -+Fail: -+ *Count = 0; -+ return NULL; -+} -+ -+/** -+ Free the root bridge instances array returned from PciHostBridgeGetRootBridges(). -+ -+ @param Bridges The root bridge instances array. -+ @param Count The count of the array. -+**/ -+VOID -+EFIAPI -+PciHostBridgeFreeRootBridges ( -+ PCI_ROOT_BRIDGE *Bridges, -+ UINTN Count -+ ) -+{ -+ UINTN Index; -+ -+ if (Bridges == NULL) { -+ return; -+ } -+ -+ for (Index = 0; Index < Count; Index++) { -+ FreePool (Bridges[Index].DevicePath); -+ } -+ -+ FreePool (Bridges); -+} -+ -+/** -+ Inform the platform that the resource conflict happens. -+ -+ @param HostBridgeHandle Handle of the Host Bridge. -+ @param Configuration Pointer to PCI I/O and PCI memory resource -+ descriptors. The Configuration contains the resources -+ for all the root bridges. The resource for each root -+ bridge is terminated with END descriptor and an -+ additional END is appended indicating the end of the -+ entire resources. The resource descriptor field -+ values follow the description in -+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL -+ .SubmitResources(). -+**/ -+VOID -+EFIAPI -+PciHostBridgeResourceConflict ( -+ EFI_HANDLE HostBridgeHandle, -+ VOID *Configuration -+ ) -+{ -+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor; -+ UINTN RootBridgeIndex; -+ -+ DEBUG ((DEBUG_ERROR, "PciHostBridge: Resource conflict happens!\n")); -+ -+ RootBridgeIndex = 0; -+ Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Configuration; -+ while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) { -+ DEBUG ((DEBUG_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++)); -+ for ( ; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) { -+ ASSERT ( -+ Descriptor->ResType < -+ ARRAY_SIZE (mPciHostBridgeLibAcpiAddressSpaceTypeStr) -+ ); -+ DEBUG (( -+ DEBUG_ERROR, -+ " %s: Length/Alignment = 0x%lx / 0x%lx\n", -+ mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType], -+ Descriptor->AddrLen, -+ Descriptor->AddrRangeMax -+ )); -+ if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) { -+ DEBUG (( -+ DEBUG_ERROR, -+ " Granularity/SpecificFlag = %ld / %02x%s\n", -+ Descriptor->AddrSpaceGranularity, -+ Descriptor->SpecificFlag, -+ ((Descriptor->SpecificFlag & -+ EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE -+ ) != 0) ? L" (Prefetchable)" : L"" -+ )); -+ } -+ } -+ -+ // -+ // Skip the END descriptor for root bridge -+ // -+ ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR); -+ Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)( -+ (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1 -+ ); -+ } -+} -diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridgeLib.inf b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridgeLib.inf -new file mode 100644 -index 00000000..f83f21ca ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciHostBridgeLib/Bcm2712PciHostBridgeLib.inf -@@ -0,0 +1,38 @@ -+#/** @file -+# -+# Copyright (c) 2024, Mario Bălănică -+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001B -+ BASE_NAME = Bcm2712PciHostBridgeLib -+ FILE_GUID = 04d39ac0-9ca7-4653-8fdd-4e5436e0791c -+ MODULE_TYPE = DXE_DRIVER -+ VERSION_STRING = 1.0 -+ LIBRARY_CLASS = PciHostBridgeLib|DXE_DRIVER -+ -+[Sources] -+ Bcm2712PciHostBridge.c -+ Bcm2712PciHostBridgeLib.c -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ MdeModulePkg/MdeModulePkg.dec -+ Silicon/Broadcom/Bcm27xx/Bcm27xx.dec -+ -+[LibraryClasses] -+ BaseLib -+ DebugLib -+ DevicePathLib -+ IoLib -+ MemoryAllocationLib -+ UefiBootServicesTableLib -+ -+[Protocols] -+ gBcm2712PciePlatformProtocolGuid ## CONSUMES -+ -+[Depex] -+ gBcm2712PciePlatformProtocolGuid -diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciSegmentLib/PciSegmentLib.c b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciSegmentLib/PciSegmentLib.c -new file mode 100644 -index 00000000..ef7ff2f2 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciSegmentLib/PciSegmentLib.c -@@ -0,0 +1,1456 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * Copyright (c) 2019, Jeremy Linton -+ * Copyright (c) 2017, Linaro, Ltd. All rights reserved.
-+ * Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.
-+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+typedef enum { -+ PciCfgWidthUint8 = 0, -+ PciCfgWidthUint16, -+ PciCfgWidthUint32, -+ PciCfgWidthMax -+} PCI_CFG_WIDTH; -+ -+/** -+ Assert the validity of a PCI Segment address. -+ A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63 -+ -+ @param A The address to validate. -+ @param M Additional bits to assert to be zero. -+ -+**/ -+#define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A, M) \ -+ ASSERT (((A) & (0xffff0000f0000000ULL | (M))) == 0) -+ -+#define GET_SEG_NUM(Address) ((Address >> 32) & 0xFFFF) -+#define GET_BUS_NUM(Address) ((Address >> 20) & 0xFF) -+#define GET_DEV_NUM(Address) ((Address >> 15) & 0x1F) -+#define GET_FUN_NUM(Address) ((Address >> 12) & 0x07) -+#define GET_REG_NUM(Address) ((Address) & 0xFFF) -+#define GET_BUS_DEV_FUN(Address) ((Address) & 0xFFFFF000) -+ -+/** -+ Given the nature of how we access PCI devices, we ensure that -+ read/write accesses are serialized through the use of a lock. -+**/ -+STATIC -+EFI_LOCK mPciSegmentReadWriteLock = EFI_INITIALIZE_LOCK_VARIABLE (TPL_HIGH_LEVEL); -+ -+STATIC EFI_PHYSICAL_ADDRESS mPcieRcBaseAddresses[] = { -+ BCM2712_BRCMSTB_PCIE0_BASE, -+ BCM2712_BRCMSTB_PCIE1_BASE, -+ BCM2712_BRCMSTB_PCIE2_BASE -+}; -+ -+/** -+ Internal worker function to obtain config space base address. -+ -+ @param Address The address that encodes the PCI Bus, Device, Function and -+ Register. -+ -+ @return The value read from the PCI configuration register. -+ -+**/ -+STATIC -+UINT64 -+PciSegmentLibGetConfigBase ( -+ IN UINT64 Address -+ ) -+{ -+ EFI_PHYSICAL_ADDRESS Base; -+ UINT16 Segment; -+ UINT8 Bus; -+ UINT8 Device; -+ UINT8 Function; -+ -+ Segment = GET_SEG_NUM (Address); -+ -+ if (Segment >= ARRAY_SIZE (mPcieRcBaseAddresses)) { -+ ASSERT (FALSE); -+ return PCI_INVALID_ADDRESS; -+ } -+ -+ // The root port is at the base of the PCIe register space -+ Base = mPcieRcBaseAddresses[Segment]; -+ -+ Bus = GET_BUS_NUM (Address); -+ Device = GET_DEV_NUM (Address); -+ Function = GET_FUN_NUM (Address); -+ -+ // There can only be the root port on bus 0 -+ if ((Bus == 0) && ((Device > 0) || (Function > 0))) { -+ return PCI_INVALID_ADDRESS; -+ } -+ -+ // There can only be one device on bus 1 -+ if ((Bus == 1) && (Device > 0)) { -+ return PCI_INVALID_ADDRESS; -+ } -+ -+ if (Bus > 0) { -+ // -+ // Device function is mapped at CFG_DATA, a 4 KB window -+ // movable by writing its B/D/F location to CFG_INDEX. -+ // -+ MmioWrite32 (Base + PCIE_EXT_CFG_INDEX, GET_BUS_DEV_FUN (Address)); -+ Base += PCIE_EXT_CFG_DATA; -+ } -+ -+ return Base + GET_REG_NUM (Address); -+} -+ -+/** -+ Internal worker function to read a PCI configuration register. -+ -+ @param Address The address that encodes the PCI Bus, Device, Function and -+ Register. -+ @param Width The width of data to read -+ -+ @return The value read from the PCI configuration register. -+ -+**/ -+STATIC -+UINT32 -+PciSegmentLibReadWorker ( -+ IN UINT64 Address, -+ IN PCI_CFG_WIDTH Width -+ ) -+{ -+ UINT64 Base; -+ UINT64 Ret; -+ -+ EfiAcquireLock (&mPciSegmentReadWriteLock); -+ Base = PciSegmentLibGetConfigBase (Address); -+ -+ if (Base == PCI_INVALID_ADDRESS) { -+ EfiReleaseLock (&mPciSegmentReadWriteLock); -+ return Base; -+ } -+ -+ switch (Width) { -+ case PciCfgWidthUint8: -+ Ret = MmioRead8 (Base); -+ break; -+ case PciCfgWidthUint16: -+ Ret = MmioRead16 (Base); -+ break; -+ case PciCfgWidthUint32: -+ Ret = MmioRead32 (Base); -+ break; -+ default: -+ ASSERT (FALSE); -+ Ret = 0; -+ } -+ -+ EfiReleaseLock (&mPciSegmentReadWriteLock); -+ return Ret; -+} -+ -+/** -+ Internal worker function to writes a PCI configuration register. -+ -+ @param Address The address that encodes the PCI Bus, Device, Function and -+ Register. -+ @param Width The width of data to write -+ @param Data The value to write. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+STATIC -+UINT32 -+PciSegmentLibWriteWorker ( -+ IN UINT64 Address, -+ IN PCI_CFG_WIDTH Width, -+ IN UINT32 Data -+ ) -+{ -+ UINT64 Base; -+ -+ EfiAcquireLock (&mPciSegmentReadWriteLock); -+ Base = PciSegmentLibGetConfigBase (Address); -+ -+ switch (Width) { -+ case PciCfgWidthUint8: -+ MmioWrite8 (Base, Data); -+ break; -+ case PciCfgWidthUint16: -+ MmioWrite16 (Base, Data); -+ break; -+ case PciCfgWidthUint32: -+ MmioWrite32 (Base, Data); -+ break; -+ default: -+ ASSERT (FALSE); -+ } -+ -+ EfiReleaseLock (&mPciSegmentReadWriteLock); -+ return Data; -+} -+ -+/** -+ Register a PCI device so PCI configuration registers may be accessed after -+ SetVirtualAddressMap(). -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Bus, Device, Function and -+ Register. -+ -+ @retval RETURN_SUCCESS The PCI device was registered for runtime access. -+ @retval RETURN_UNSUPPORTED An attempt was made to call this function -+ after ExitBootServices(). -+ @retval RETURN_UNSUPPORTED The resources required to access the PCI device -+ at runtime could not be mapped. -+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to -+ complete the registration. -+ -+**/ -+RETURN_STATUS -+EFIAPI -+PciSegmentRegisterForRuntimeAccess ( -+ IN UINTN Address -+ ) -+{ -+ ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0); -+ return RETURN_UNSUPPORTED; -+} -+ -+/** -+ Reads an 8-bit PCI configuration register. -+ -+ Reads and returns the 8-bit PCI configuration register specified by Address. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, -+ and Register. -+ -+ @return The 8-bit PCI configuration register specified by Address. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentRead8 ( -+ IN UINT64 Address -+ ) -+{ -+ ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0); -+ -+ return (UINT8)PciSegmentLibReadWorker (Address, PciCfgWidthUint8); -+} -+ -+/** -+ Writes an 8-bit PCI configuration register. -+ -+ Writes the 8-bit PCI configuration register specified by Address with the value specified by Value. -+ Value is returned. This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ @param Value The value to write. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentWrite8 ( -+ IN UINT64 Address, -+ IN UINT8 Value -+ ) -+{ -+ ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0); -+ -+ return (UINT8)PciSegmentLibWriteWorker (Address, PciCfgWidthUint8, Value); -+} -+ -+/** -+ Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value. -+ -+ Reads the 8-bit PCI configuration register specified by Address, -+ performs a bitwise OR between the read result and the value specified by OrData, -+ and writes the result to the 8-bit PCI configuration register specified by Address. -+ The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ @param OrData The value to OR with the PCI configuration register. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentOr8 ( -+ IN UINT64 Address, -+ IN UINT8 OrData -+ ) -+{ -+ return PciSegmentWrite8 (Address, (UINT8)(PciSegmentRead8 (Address) | OrData)); -+} -+ -+/** -+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value. -+ -+ Reads the 8-bit PCI configuration register specified by Address, -+ performs a bitwise AND between the read result and the value specified by AndData, -+ and writes the result to the 8-bit PCI configuration register specified by Address. -+ The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are serialized. -+ If any reserved bits in Address are set, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ @param AndData The value to AND with the PCI configuration register. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentAnd8 ( -+ IN UINT64 Address, -+ IN UINT8 AndData -+ ) -+{ -+ return PciSegmentWrite8 (Address, (UINT8)(PciSegmentRead8 (Address) & AndData)); -+} -+ -+/** -+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value, -+ followed a bitwise OR with another 8-bit value. -+ -+ Reads the 8-bit PCI configuration register specified by Address, -+ performs a bitwise AND between the read result and the value specified by AndData, -+ performs a bitwise OR between the result of the AND operation and the value specified by OrData, -+ and writes the result to the 8-bit PCI configuration register specified by Address. -+ The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ @param AndData The value to AND with the PCI configuration register. -+ @param OrData The value to OR with the PCI configuration register. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentAndThenOr8 ( -+ IN UINT64 Address, -+ IN UINT8 AndData, -+ IN UINT8 OrData -+ ) -+{ -+ return PciSegmentWrite8 (Address, (UINT8)((PciSegmentRead8 (Address) & AndData) | OrData)); -+} -+ -+/** -+ Reads a bit field of a PCI configuration register. -+ -+ Reads the bit field in an 8-bit PCI configuration register. The bit field is -+ specified by the StartBit and the EndBit. The value of the bit field is -+ returned. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If StartBit is greater than 7, then ASSERT(). -+ If EndBit is greater than 7, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to read. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..7. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..7. -+ -+ @return The value of the bit field read from the PCI configuration register. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentBitFieldRead8 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit -+ ) -+{ -+ return BitFieldRead8 (PciSegmentRead8 (Address), StartBit, EndBit); -+} -+ -+/** -+ Writes a bit field to a PCI configuration register. -+ -+ Writes Value to the bit field of the PCI configuration register. The bit -+ field is specified by the StartBit and the EndBit. All other bits in the -+ destination PCI configuration register are preserved. The new value of the -+ 8-bit register is returned. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If StartBit is greater than 7, then ASSERT(). -+ If EndBit is greater than 7, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..7. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..7. -+ @param Value The new value of the bit field. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentBitFieldWrite8 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT8 Value -+ ) -+{ -+ return PciSegmentWrite8 ( -+ Address, -+ BitFieldWrite8 (PciSegmentRead8 (Address), StartBit, EndBit, Value) -+ ); -+} -+ -+/** -+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and -+ writes the result back to the bit field in the 8-bit port. -+ -+ Reads the 8-bit PCI configuration register specified by Address, performs a -+ bitwise OR between the read result and the value specified by -+ OrData, and writes the result to the 8-bit PCI configuration register -+ specified by Address. The value written to the PCI configuration register is -+ returned. This function must guarantee that all PCI read and write operations -+ are serialized. Extra left bits in OrData are stripped. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If StartBit is greater than 7, then ASSERT(). -+ If EndBit is greater than 7, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..7. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..7. -+ @param OrData The value to OR with the PCI configuration register. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentBitFieldOr8 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT8 OrData -+ ) -+{ -+ return PciSegmentWrite8 ( -+ Address, -+ BitFieldOr8 (PciSegmentRead8 (Address), StartBit, EndBit, OrData) -+ ); -+} -+ -+/** -+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise -+ AND, and writes the result back to the bit field in the 8-bit register. -+ -+ Reads the 8-bit PCI configuration register specified by Address, performs a -+ bitwise AND between the read result and the value specified by AndData, and -+ writes the result to the 8-bit PCI configuration register specified by -+ Address. The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are -+ serialized. Extra left bits in AndData are stripped. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If StartBit is greater than 7, then ASSERT(). -+ If EndBit is greater than 7, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..7. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..7. -+ @param AndData The value to AND with the PCI configuration register. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentBitFieldAnd8 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT8 AndData -+ ) -+{ -+ return PciSegmentWrite8 ( -+ Address, -+ BitFieldAnd8 (PciSegmentRead8 (Address), StartBit, EndBit, AndData) -+ ); -+} -+ -+/** -+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a -+ bitwise OR, and writes the result back to the bit field in the -+ 8-bit port. -+ -+ Reads the 8-bit PCI configuration register specified by Address, performs a -+ bitwise AND followed by a bitwise OR between the read result and -+ the value specified by AndData, and writes the result to the 8-bit PCI -+ configuration register specified by Address. The value written to the PCI -+ configuration register is returned. This function must guarantee that all PCI -+ read and write operations are serialized. Extra left bits in both AndData and -+ OrData are stripped. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If StartBit is greater than 7, then ASSERT(). -+ If EndBit is greater than 7, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..7. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..7. -+ @param AndData The value to AND with the PCI configuration register. -+ @param OrData The value to OR with the result of the AND operation. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT8 -+EFIAPI -+PciSegmentBitFieldAndThenOr8 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT8 AndData, -+ IN UINT8 OrData -+ ) -+{ -+ return PciSegmentWrite8 ( -+ Address, -+ BitFieldAndThenOr8 (PciSegmentRead8 (Address), StartBit, EndBit, AndData, OrData) -+ ); -+} -+ -+/** -+ Reads a 16-bit PCI configuration register. -+ -+ Reads and returns the 16-bit PCI configuration register specified by Address. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 16-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ -+ @return The 16-bit PCI configuration register specified by Address. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentRead16 ( -+ IN UINT64 Address -+ ) -+{ -+ ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 1); -+ -+ return (UINT16)PciSegmentLibReadWorker (Address, PciCfgWidthUint16); -+} -+ -+/** -+ Writes a 16-bit PCI configuration register. -+ -+ Writes the 16-bit PCI configuration register specified by Address with the value specified by Value. -+ Value is returned. This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 16-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ @param Value The value to write. -+ -+ @return The parameter of Value. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentWrite16 ( -+ IN UINT64 Address, -+ IN UINT16 Value -+ ) -+{ -+ ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 1); -+ -+ return (UINT16)PciSegmentLibWriteWorker (Address, PciCfgWidthUint16, Value); -+} -+ -+/** -+ Performs a bitwise OR of a 16-bit PCI configuration register with -+ a 16-bit value. -+ -+ Reads the 16-bit PCI configuration register specified by Address, performs a -+ bitwise OR between the read result and the value specified by -+ OrData, and writes the result to the 16-bit PCI configuration register -+ specified by Address. The value written to the PCI configuration register is -+ returned. This function must guarantee that all PCI read and write operations -+ are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 16-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function and -+ Register. -+ @param OrData The value to OR with the PCI configuration register. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentOr16 ( -+ IN UINT64 Address, -+ IN UINT16 OrData -+ ) -+{ -+ return PciSegmentWrite16 (Address, (UINT16)(PciSegmentRead16 (Address) | OrData)); -+} -+ -+/** -+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value. -+ -+ Reads the 16-bit PCI configuration register specified by Address, -+ performs a bitwise AND between the read result and the value specified by AndData, -+ and writes the result to the 16-bit PCI configuration register specified by Address. -+ The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 16-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ @param AndData The value to AND with the PCI configuration register. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentAnd16 ( -+ IN UINT64 Address, -+ IN UINT16 AndData -+ ) -+{ -+ return PciSegmentWrite16 (Address, (UINT16)(PciSegmentRead16 (Address) & AndData)); -+} -+ -+/** -+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value, -+ followed a bitwise OR with another 16-bit value. -+ -+ Reads the 16-bit PCI configuration register specified by Address, -+ performs a bitwise AND between the read result and the value specified by AndData, -+ performs a bitwise OR between the result of the AND operation and the value specified by OrData, -+ and writes the result to the 16-bit PCI configuration register specified by Address. -+ The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 16-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ @param AndData The value to AND with the PCI configuration register. -+ @param OrData The value to OR with the PCI configuration register. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentAndThenOr16 ( -+ IN UINT64 Address, -+ IN UINT16 AndData, -+ IN UINT16 OrData -+ ) -+{ -+ return PciSegmentWrite16 (Address, (UINT16)((PciSegmentRead16 (Address) & AndData) | OrData)); -+} -+ -+/** -+ Reads a bit field of a PCI configuration register. -+ -+ Reads the bit field in a 16-bit PCI configuration register. The bit field is -+ specified by the StartBit and the EndBit. The value of the bit field is -+ returned. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 16-bit boundary, then ASSERT(). -+ If StartBit is greater than 15, then ASSERT(). -+ If EndBit is greater than 15, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to read. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..15. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..15. -+ -+ @return The value of the bit field read from the PCI configuration register. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentBitFieldRead16 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit -+ ) -+{ -+ return BitFieldRead16 (PciSegmentRead16 (Address), StartBit, EndBit); -+} -+ -+/** -+ Writes a bit field to a PCI configuration register. -+ -+ Writes Value to the bit field of the PCI configuration register. The bit -+ field is specified by the StartBit and the EndBit. All other bits in the -+ destination PCI configuration register are preserved. The new value of the -+ 16-bit register is returned. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 16-bit boundary, then ASSERT(). -+ If StartBit is greater than 15, then ASSERT(). -+ If EndBit is greater than 15, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..15. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..15. -+ @param Value The new value of the bit field. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentBitFieldWrite16 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT16 Value -+ ) -+{ -+ return PciSegmentWrite16 ( -+ Address, -+ BitFieldWrite16 (PciSegmentRead16 (Address), StartBit, EndBit, Value) -+ ); -+} -+ -+/** -+ Reads the 16-bit PCI configuration register specified by Address, -+ performs a bitwise OR between the read result and the value specified by OrData, -+ and writes the result to the 16-bit PCI configuration register specified by Address. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 16-bit boundary, then ASSERT(). -+ If StartBit is greater than 15, then ASSERT(). -+ If EndBit is greater than 15, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..15. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..15. -+ @param OrData The value to OR with the PCI configuration register. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentBitFieldOr16 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT16 OrData -+ ) -+{ -+ return PciSegmentWrite16 ( -+ Address, -+ BitFieldOr16 (PciSegmentRead16 (Address), StartBit, EndBit, OrData) -+ ); -+} -+ -+/** -+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, -+ and writes the result back to the bit field in the 16-bit port. -+ -+ Reads the 16-bit PCI configuration register specified by Address, -+ performs a bitwise OR between the read result and the value specified by OrData, -+ and writes the result to the 16-bit PCI configuration register specified by Address. -+ The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are serialized. -+ Extra left bits in OrData are stripped. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 16-bit boundary, then ASSERT(). -+ If StartBit is greater than 7, then ASSERT(). -+ If EndBit is greater than 7, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ The ordinal of the least significant bit in a byte is bit 0. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ The ordinal of the most significant bit in a byte is bit 7. -+ @param AndData The value to AND with the read value from the PCI configuration register. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentBitFieldAnd16 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT16 AndData -+ ) -+{ -+ return PciSegmentWrite16 ( -+ Address, -+ BitFieldAnd16 (PciSegmentRead16 (Address), StartBit, EndBit, AndData) -+ ); -+} -+ -+/** -+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a -+ bitwise OR, and writes the result back to the bit field in the -+ 16-bit port. -+ -+ Reads the 16-bit PCI configuration register specified by Address, performs a -+ bitwise AND followed by a bitwise OR between the read result and -+ the value specified by AndData, and writes the result to the 16-bit PCI -+ configuration register specified by Address. The value written to the PCI -+ configuration register is returned. This function must guarantee that all PCI -+ read and write operations are serialized. Extra left bits in both AndData and -+ OrData are stripped. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If StartBit is greater than 15, then ASSERT(). -+ If EndBit is greater than 15, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..15. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..15. -+ @param AndData The value to AND with the PCI configuration register. -+ @param OrData The value to OR with the result of the AND operation. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT16 -+EFIAPI -+PciSegmentBitFieldAndThenOr16 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT16 AndData, -+ IN UINT16 OrData -+ ) -+{ -+ return PciSegmentWrite16 ( -+ Address, -+ BitFieldAndThenOr16 (PciSegmentRead16 (Address), StartBit, EndBit, AndData, OrData) -+ ); -+} -+ -+/** -+ Reads a 32-bit PCI configuration register. -+ -+ Reads and returns the 32-bit PCI configuration register specified by Address. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 32-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, -+ and Register. -+ -+ @return The 32-bit PCI configuration register specified by Address. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentRead32 ( -+ IN UINT64 Address -+ ) -+{ -+ ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 3); -+ -+ return PciSegmentLibReadWorker (Address, PciCfgWidthUint32); -+} -+ -+/** -+ Writes a 32-bit PCI configuration register. -+ -+ Writes the 32-bit PCI configuration register specified by Address with the value specified by Value. -+ Value is returned. This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 32-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, -+ Function, and Register. -+ @param Value The value to write. -+ -+ @return The parameter of Value. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentWrite32 ( -+ IN UINT64 Address, -+ IN UINT32 Value -+ ) -+{ -+ ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 3); -+ -+ return PciSegmentLibWriteWorker (Address, PciCfgWidthUint32, Value); -+} -+ -+/** -+ Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value. -+ -+ Reads the 32-bit PCI configuration register specified by Address, -+ performs a bitwise OR between the read result and the value specified by OrData, -+ and writes the result to the 32-bit PCI configuration register specified by Address. -+ The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 32-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. -+ @param OrData The value to OR with the PCI configuration register. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentOr32 ( -+ IN UINT64 Address, -+ IN UINT32 OrData -+ ) -+{ -+ return PciSegmentWrite32 (Address, PciSegmentRead32 (Address) | OrData); -+} -+ -+/** -+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value. -+ -+ Reads the 32-bit PCI configuration register specified by Address, -+ performs a bitwise AND between the read result and the value specified by AndData, -+ and writes the result to the 32-bit PCI configuration register specified by Address. -+ The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 32-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, -+ and Register. -+ @param AndData The value to AND with the PCI configuration register. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentAnd32 ( -+ IN UINT64 Address, -+ IN UINT32 AndData -+ ) -+{ -+ return PciSegmentWrite32 (Address, PciSegmentRead32 (Address) & AndData); -+} -+ -+/** -+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value, -+ followed a bitwise OR with another 32-bit value. -+ -+ Reads the 32-bit PCI configuration register specified by Address, -+ performs a bitwise AND between the read result and the value specified by AndData, -+ performs a bitwise OR between the result of the AND operation and the value specified by OrData, -+ and writes the result to the 32-bit PCI configuration register specified by Address. -+ The value written to the PCI configuration register is returned. -+ This function must guarantee that all PCI read and write operations are serialized. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 32-bit boundary, then ASSERT(). -+ -+ @param Address The address that encodes the PCI Segment, Bus, Device, Function, -+ and Register. -+ @param AndData The value to AND with the PCI configuration register. -+ @param OrData The value to OR with the PCI configuration register. -+ -+ @return The value written to the PCI configuration register. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentAndThenOr32 ( -+ IN UINT64 Address, -+ IN UINT32 AndData, -+ IN UINT32 OrData -+ ) -+{ -+ return PciSegmentWrite32 (Address, (PciSegmentRead32 (Address) & AndData) | OrData); -+} -+ -+/** -+ Reads a bit field of a PCI configuration register. -+ -+ Reads the bit field in a 32-bit PCI configuration register. The bit field is -+ specified by the StartBit and the EndBit. The value of the bit field is -+ returned. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 32-bit boundary, then ASSERT(). -+ If StartBit is greater than 31, then ASSERT(). -+ If EndBit is greater than 31, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to read. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..31. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..31. -+ -+ @return The value of the bit field read from the PCI configuration register. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentBitFieldRead32 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit -+ ) -+{ -+ return BitFieldRead32 (PciSegmentRead32 (Address), StartBit, EndBit); -+} -+ -+/** -+ Writes a bit field to a PCI configuration register. -+ -+ Writes Value to the bit field of the PCI configuration register. The bit -+ field is specified by the StartBit and the EndBit. All other bits in the -+ destination PCI configuration register are preserved. The new value of the -+ 32-bit register is returned. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 32-bit boundary, then ASSERT(). -+ If StartBit is greater than 31, then ASSERT(). -+ If EndBit is greater than 31, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..31. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..31. -+ @param Value The new value of the bit field. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentBitFieldWrite32 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT32 Value -+ ) -+{ -+ return PciSegmentWrite32 ( -+ Address, -+ BitFieldWrite32 (PciSegmentRead32 (Address), StartBit, EndBit, Value) -+ ); -+} -+ -+/** -+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and -+ writes the result back to the bit field in the 32-bit port. -+ -+ Reads the 32-bit PCI configuration register specified by Address, performs a -+ bitwise OR between the read result and the value specified by -+ OrData, and writes the result to the 32-bit PCI configuration register -+ specified by Address. The value written to the PCI configuration register is -+ returned. This function must guarantee that all PCI read and write operations -+ are serialized. Extra left bits in OrData are stripped. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If StartBit is greater than 31, then ASSERT(). -+ If EndBit is greater than 31, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..31. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..31. -+ @param OrData The value to OR with the PCI configuration register. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentBitFieldOr32 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT32 OrData -+ ) -+{ -+ return PciSegmentWrite32 ( -+ Address, -+ BitFieldOr32 (PciSegmentRead32 (Address), StartBit, EndBit, OrData) -+ ); -+} -+ -+/** -+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise -+ AND, and writes the result back to the bit field in the 32-bit register. -+ -+ -+ Reads the 32-bit PCI configuration register specified by Address, performs a bitwise -+ AND between the read result and the value specified by AndData, and writes the result -+ to the 32-bit PCI configuration register specified by Address. The value written to -+ the PCI configuration register is returned. This function must guarantee that all PCI -+ read and write operations are serialized. Extra left bits in AndData are stripped. -+ If any reserved bits in Address are set, then ASSERT(). -+ If Address is not aligned on a 32-bit boundary, then ASSERT(). -+ If StartBit is greater than 31, then ASSERT(). -+ If EndBit is greater than 31, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..31. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..31. -+ @param AndData The value to AND with the PCI configuration register. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentBitFieldAnd32 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT32 AndData -+ ) -+{ -+ return PciSegmentWrite32 ( -+ Address, -+ BitFieldAnd32 (PciSegmentRead32 (Address), StartBit, EndBit, AndData) -+ ); -+} -+ -+/** -+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a -+ bitwise OR, and writes the result back to the bit field in the -+ 32-bit port. -+ -+ Reads the 32-bit PCI configuration register specified by Address, performs a -+ bitwise AND followed by a bitwise OR between the read result and -+ the value specified by AndData, and writes the result to the 32-bit PCI -+ configuration register specified by Address. The value written to the PCI -+ configuration register is returned. This function must guarantee that all PCI -+ read and write operations are serialized. Extra left bits in both AndData and -+ OrData are stripped. -+ -+ If any reserved bits in Address are set, then ASSERT(). -+ If StartBit is greater than 31, then ASSERT(). -+ If EndBit is greater than 31, then ASSERT(). -+ If EndBit is less than StartBit, then ASSERT(). -+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). -+ -+ @param Address The PCI configuration register to write. -+ @param StartBit The ordinal of the least significant bit in the bit field. -+ Range 0..31. -+ @param EndBit The ordinal of the most significant bit in the bit field. -+ Range 0..31. -+ @param AndData The value to AND with the PCI configuration register. -+ @param OrData The value to OR with the result of the AND operation. -+ -+ @return The value written back to the PCI configuration register. -+ -+**/ -+UINT32 -+EFIAPI -+PciSegmentBitFieldAndThenOr32 ( -+ IN UINT64 Address, -+ IN UINTN StartBit, -+ IN UINTN EndBit, -+ IN UINT32 AndData, -+ IN UINT32 OrData -+ ) -+{ -+ return PciSegmentWrite32 ( -+ Address, -+ BitFieldAndThenOr32 (PciSegmentRead32 (Address), StartBit, EndBit, AndData, OrData) -+ ); -+} -+ -+/** -+ Reads a range of PCI configuration registers into a caller supplied buffer. -+ -+ Reads the range of PCI configuration registers specified by StartAddress and -+ Size into the buffer specified by Buffer. This function only allows the PCI -+ configuration registers from a single PCI function to be read. Size is -+ returned. When possible 32-bit PCI configuration read cycles are used to read -+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit -+ and 16-bit PCI configuration read cycles may be used at the beginning and the -+ end of the range. -+ -+ If any reserved bits in StartAddress are set, then ASSERT(). -+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). -+ If Size > 0 and Buffer is NULL, then ASSERT(). -+ -+ @param StartAddress The starting address that encodes the PCI Segment, Bus, -+ Device, Function and Register. -+ @param Size The size in bytes of the transfer. -+ @param Buffer The pointer to a buffer receiving the data read. -+ -+ @return Size -+ -+**/ -+UINTN -+EFIAPI -+PciSegmentReadBuffer ( -+ IN UINT64 StartAddress, -+ IN UINTN Size, -+ OUT VOID *Buffer -+ ) -+{ -+ UINTN ReturnValue; -+ -+ ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0); -+ ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000); -+ -+ if (Size == 0) { -+ return Size; -+ } -+ -+ ASSERT (Buffer != NULL); -+ -+ // -+ // Save Size for return -+ // -+ ReturnValue = Size; -+ -+ if ((StartAddress & BIT0) != 0) { -+ // -+ // Read a byte if StartAddress is byte aligned -+ // -+ *(volatile UINT8 *)Buffer = PciSegmentRead8 (StartAddress); -+ StartAddress += sizeof (UINT8); -+ Size -= sizeof (UINT8); -+ Buffer = (UINT8 *)Buffer + 1; -+ } -+ -+ if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) { -+ // -+ // Read a word if StartAddress is word aligned -+ // -+ WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress)); -+ StartAddress += sizeof (UINT16); -+ Size -= sizeof (UINT16); -+ Buffer = (UINT16 *)Buffer + 1; -+ } -+ -+ while (Size >= sizeof (UINT32)) { -+ // -+ // Read as many double words as possible -+ // -+ WriteUnaligned32 (Buffer, PciSegmentRead32 (StartAddress)); -+ StartAddress += sizeof (UINT32); -+ Size -= sizeof (UINT32); -+ Buffer = (UINT32 *)Buffer + 1; -+ } -+ -+ if (Size >= sizeof (UINT16)) { -+ // -+ // Read the last remaining word if exist -+ // -+ WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress)); -+ StartAddress += sizeof (UINT16); -+ Size -= sizeof (UINT16); -+ Buffer = (UINT16 *)Buffer + 1; -+ } -+ -+ if (Size >= sizeof (UINT8)) { -+ // -+ // Read the last remaining byte if exist -+ // -+ *(volatile UINT8 *)Buffer = PciSegmentRead8 (StartAddress); -+ } -+ -+ return ReturnValue; -+} -+ -+/** -+ Copies the data in a caller supplied buffer to a specified range of PCI -+ configuration space. -+ -+ Writes the range of PCI configuration registers specified by StartAddress and -+ Size from the buffer specified by Buffer. This function only allows the PCI -+ configuration registers from a single PCI function to be written. Size is -+ returned. When possible 32-bit PCI configuration write cycles are used to -+ write from StartAdress to StartAddress + Size. Due to alignment restrictions, -+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning -+ and the end of the range. -+ -+ If any reserved bits in StartAddress are set, then ASSERT(). -+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). -+ If Size > 0 and Buffer is NULL, then ASSERT(). -+ -+ @param StartAddress The starting address that encodes the PCI Segment, Bus, -+ Device, Function and Register. -+ @param Size The size in bytes of the transfer. -+ @param Buffer The pointer to a buffer containing the data to write. -+ -+ @return The parameter of Size. -+ -+**/ -+UINTN -+EFIAPI -+PciSegmentWriteBuffer ( -+ IN UINT64 StartAddress, -+ IN UINTN Size, -+ IN VOID *Buffer -+ ) -+{ -+ UINTN ReturnValue; -+ -+ ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0); -+ ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000); -+ -+ if (Size == 0) { -+ return 0; -+ } -+ -+ ASSERT (Buffer != NULL); -+ -+ // -+ // Save Size for return -+ // -+ ReturnValue = Size; -+ -+ if ((StartAddress & BIT0) != 0) { -+ // -+ // Write a byte if StartAddress is byte aligned -+ // -+ PciSegmentWrite8 (StartAddress, *(UINT8 *)Buffer); -+ StartAddress += sizeof (UINT8); -+ Size -= sizeof (UINT8); -+ Buffer = (UINT8 *)Buffer + 1; -+ } -+ -+ if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) { -+ // -+ // Write a word if StartAddress is word aligned -+ // -+ PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer)); -+ StartAddress += sizeof (UINT16); -+ Size -= sizeof (UINT16); -+ Buffer = (UINT16 *)Buffer + 1; -+ } -+ -+ while (Size >= sizeof (UINT32)) { -+ // -+ // Write as many double words as possible -+ // -+ PciSegmentWrite32 (StartAddress, ReadUnaligned32 (Buffer)); -+ StartAddress += sizeof (UINT32); -+ Size -= sizeof (UINT32); -+ Buffer = (UINT32 *)Buffer + 1; -+ } -+ -+ if (Size >= sizeof (UINT16)) { -+ // -+ // Write the last remaining word if exist -+ // -+ PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer)); -+ StartAddress += sizeof (UINT16); -+ Size -= sizeof (UINT16); -+ Buffer = (UINT16 *)Buffer + 1; -+ } -+ -+ if (Size >= sizeof (UINT8)) { -+ // -+ // Write the last remaining byte if exist -+ // -+ PciSegmentWrite8 (StartAddress, *(UINT8 *)Buffer); -+ } -+ -+ return ReturnValue; -+} -diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciSegmentLib/PciSegmentLib.inf b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciSegmentLib/PciSegmentLib.inf -new file mode 100644 -index 00000000..63408865 ---- /dev/null -+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712PciSegmentLib/PciSegmentLib.inf -@@ -0,0 +1,31 @@ -+#/** @file -+# -+# Copyright (c) 2024, Mario Bălănică -+# Copyright (c) 2019, Jeremy Linton -+# Copyright (c) 2017, Linaro Ltd. All rights reserved.
-+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
-+# -+# SPDX-License-Identifier: BSD-2-Clause-Patent -+# -+#**/ -+ -+[Defines] -+ INF_VERSION = 0x0001001B -+ BASE_NAME = PciSegmentLib -+ FILE_GUID = 644017d3-258f-4e31-8f2f-842506bb8097 -+ MODULE_TYPE = BASE -+ VERSION_STRING = 1.0 -+ LIBRARY_CLASS = PciSegmentLib -+ -+[Sources] -+ PciSegmentLib.c -+ -+[Packages] -+ MdePkg/MdePkg.dec -+ Silicon/Broadcom/Bcm27xx/Bcm27xx.dec -+ -+[LibraryClasses] -+ BaseLib -+ DebugLib -+ IoLib -+ UefiLib -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/ComponentName.c b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/ComponentName.c -new file mode 100644 -index 00000000..656049dc ---- /dev/null -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/ComponentName.c -@@ -0,0 +1,323 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#include -+#include -+ -+#include "Rp1BusDxe.h" -+ -+/** -+ Retrieves a Unicode string that is the user readable name of the driver. -+ -+ This function retrieves the user readable name of a driver in the form of a -+ Unicode string. If the driver specified by This has a user readable name in -+ the language specified by Language, then a pointer to the driver name is -+ returned in DriverName, and EFI_SUCCESS is returned. If the driver specified -+ by This does not support the language specified by Language, -+ then EFI_UNSUPPORTED is returned. -+ -+ @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or -+ EFI_COMPONENT_NAME_PROTOCOL instance. -+ -+ @param Language[in] A pointer to a Null-terminated ASCII string -+ array indicating the language. This is the -+ language of the driver name that the caller is -+ requesting, and it must match one of the -+ languages specified in SupportedLanguages. The -+ number of languages supported by a driver is up -+ to the driver writer. Language is specified -+ in RFC 4646 or ISO 639-2 language code format. -+ -+ @param DriverName[out] A pointer to the Unicode string to return. -+ This Unicode string is the name of the -+ driver specified by This in the language -+ specified by Language. -+ -+ @retval EFI_SUCCESS The Unicode string for the Driver specified by -+ This and the language specified by Language was -+ returned in DriverName. -+ -+ @retval EFI_INVALID_PARAMETER Language is NULL. -+ -+ @retval EFI_INVALID_PARAMETER DriverName is NULL. -+ -+ @retval EFI_UNSUPPORTED The driver specified by This does not support -+ the language specified by Language. -+ -+**/ -+EFI_STATUS -+EFIAPI -+Rp1BusComponentNameGetDriverName ( -+ IN EFI_COMPONENT_NAME_PROTOCOL *This, -+ IN CHAR8 *Language, -+ OUT CHAR16 **DriverName -+ ); -+ -+/** -+ Retrieves a Unicode string that is the user readable name of the controller -+ that is being managed by a driver. -+ -+ This function retrieves the user readable name of the controller specified by -+ ControllerHandle and ChildHandle in the form of a Unicode string. If the -+ driver specified by This has a user readable name in the language specified by -+ Language, then a pointer to the controller name is returned in ControllerName, -+ and EFI_SUCCESS is returned. If the driver specified by This is not currently -+ managing the controller specified by ControllerHandle and ChildHandle, -+ then EFI_UNSUPPORTED is returned. If the driver specified by This does not -+ support the language specified by Language, then EFI_UNSUPPORTED is returned. -+ -+ @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or -+ EFI_COMPONENT_NAME_PROTOCOL instance. -+ -+ @param ControllerHandle[in] The handle of a controller that the driver -+ specified by This is managing. This handle -+ specifies the controller whose name is to be -+ returned. -+ -+ @param ChildHandle[in] The handle of the child controller to retrieve -+ the name of. This is an optional parameter that -+ may be NULL. It will be NULL for device -+ drivers. It will also be NULL for a bus drivers -+ that wish to retrieve the name of the bus -+ controller. It will not be NULL for a bus -+ driver that wishes to retrieve the name of a -+ child controller. -+ -+ @param Language[in] A pointer to a Null-terminated ASCII string -+ array indicating the language. This is the -+ language of the driver name that the caller is -+ requesting, and it must match one of the -+ languages specified in SupportedLanguages. The -+ number of languages supported by a driver is up -+ to the driver writer. Language is specified in -+ RFC 4646 or ISO 639-2 language code format. -+ -+ @param ControllerName[out] A pointer to the Unicode string to return. -+ This Unicode string is the name of the -+ controller specified by ControllerHandle and -+ ChildHandle in the language specified by -+ Language from the point of view of the driver -+ specified by This. -+ -+ @retval EFI_SUCCESS The Unicode string for the user readable name in -+ the language specified by Language for the -+ driver specified by This was returned in -+ DriverName. -+ -+ @retval EFI_INVALID_PARAMETER ControllerHandle is NULL. -+ -+ @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid -+ EFI_HANDLE. -+ -+ @retval EFI_INVALID_PARAMETER Language is NULL. -+ -+ @retval EFI_INVALID_PARAMETER ControllerName is NULL. -+ -+ @retval EFI_UNSUPPORTED The driver specified by This is not currently -+ managing the controller specified by -+ ControllerHandle and ChildHandle. -+ -+ @retval EFI_UNSUPPORTED The driver specified by This does not support -+ the language specified by Language. -+ -+**/ -+EFI_STATUS -+EFIAPI -+Rp1BusComponentNameGetControllerName ( -+ IN EFI_COMPONENT_NAME_PROTOCOL *This, -+ IN EFI_HANDLE ControllerHandle, -+ IN EFI_HANDLE ChildHandle OPTIONAL, -+ IN CHAR8 *Language, -+ OUT CHAR16 **ControllerName -+ ); -+ -+// -+// EFI Component Name Protocol -+// -+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL mRp1BusComponentName = { -+ Rp1BusComponentNameGetDriverName, -+ Rp1BusComponentNameGetControllerName, -+ "eng" -+}; -+ -+// -+// EFI Component Name 2 Protocol -+// -+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL mRp1BusComponentName2 = { -+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)Rp1BusComponentNameGetDriverName, -+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)Rp1BusComponentNameGetControllerName, -+ "en" -+}; -+ -+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mRp1BusDriverNameTable[] = { -+ { "eng;en", L"Raspberry Pi RP1 I/O Bridge Driver" }, -+ { NULL, NULL } -+}; -+ -+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mRp1BusControllerNameTable[] = { -+ { "eng;en", L"Raspberry Pi RP1 I/O Bridge" }, -+ { NULL, NULL } -+}; -+ -+/** -+ Retrieves a Unicode string that is the user readable name of the driver. -+ -+ This function retrieves the user readable name of a driver in the form of a -+ Unicode string. If the driver specified by This has a user readable name in -+ the language specified by Language, then a pointer to the driver name is -+ returned in DriverName, and EFI_SUCCESS is returned. If the driver specified -+ by This does not support the language specified by Language, -+ then EFI_UNSUPPORTED is returned. -+ -+ @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or -+ EFI_COMPONENT_NAME_PROTOCOL instance. -+ -+ @param Language[in] A pointer to a Null-terminated ASCII string -+ array indicating the language. This is the -+ language of the driver name that the caller is -+ requesting, and it must match one of the -+ languages specified in SupportedLanguages. The -+ number of languages supported by a driver is up -+ to the driver writer. Language is specified -+ in RFC 4646 or ISO 639-2 language code format. -+ -+ @param DriverName[out] A pointer to the Unicode string to return. -+ This Unicode string is the name of the -+ driver specified by This in the language -+ specified by Language. -+ -+ @retval EFI_SUCCESS The Unicode string for the Driver specified by -+ This and the language specified by Language was -+ returned in DriverName. -+ -+ @retval EFI_INVALID_PARAMETER Language is NULL. -+ -+ @retval EFI_INVALID_PARAMETER DriverName is NULL. -+ -+ @retval EFI_UNSUPPORTED The driver specified by This does not support -+ the language specified by Language. -+ -+**/ -+EFI_STATUS -+EFIAPI -+Rp1BusComponentNameGetDriverName ( -+ IN EFI_COMPONENT_NAME_PROTOCOL *This, -+ IN CHAR8 *Language, -+ OUT CHAR16 **DriverName -+ ) -+{ -+ return LookupUnicodeString2 ( -+ Language, -+ This->SupportedLanguages, -+ mRp1BusDriverNameTable, -+ DriverName, -+ (BOOLEAN)(This == &mRp1BusComponentName) -+ ); -+} -+ -+/** -+ Retrieves a Unicode string that is the user readable name of the controller -+ that is being managed by a driver. -+ -+ This function retrieves the user readable name of the controller specified by -+ ControllerHandle and ChildHandle in the form of a Unicode string. If the -+ driver specified by This has a user readable name in the language specified by -+ Language, then a pointer to the controller name is returned in ControllerName, -+ and EFI_SUCCESS is returned. If the driver specified by This is not currently -+ managing the controller specified by ControllerHandle and ChildHandle, -+ then EFI_UNSUPPORTED is returned. If the driver specified by This does not -+ support the language specified by Language, then EFI_UNSUPPORTED is returned. -+ -+ @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or -+ EFI_COMPONENT_NAME_PROTOCOL instance. -+ -+ @param ControllerHandle[in] The handle of a controller that the driver -+ specified by This is managing. This handle -+ specifies the controller whose name is to be -+ returned. -+ -+ @param ChildHandle[in] The handle of the child controller to retrieve -+ the name of. This is an optional parameter that -+ may be NULL. It will be NULL for device -+ drivers. It will also be NULL for a bus drivers -+ that wish to retrieve the name of the bus -+ controller. It will not be NULL for a bus -+ driver that wishes to retrieve the name of a -+ child controller. -+ -+ @param Language[in] A pointer to a Null-terminated ASCII string -+ array indicating the language. This is the -+ language of the driver name that the caller is -+ requesting, and it must match one of the -+ languages specified in SupportedLanguages. The -+ number of languages supported by a driver is up -+ to the driver writer. Language is specified in -+ RFC 4646 or ISO 639-2 language code format. -+ -+ @param ControllerName[out] A pointer to the Unicode string to return. -+ This Unicode string is the name of the -+ controller specified by ControllerHandle and -+ ChildHandle in the language specified by -+ Language from the point of view of the driver -+ specified by This. -+ -+ @retval EFI_SUCCESS The Unicode string for the user readable name in -+ the language specified by Language for the -+ driver specified by This was returned in -+ DriverName. -+ -+ @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE. -+ -+ @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid -+ EFI_HANDLE. -+ -+ @retval EFI_INVALID_PARAMETER Language is NULL. -+ -+ @retval EFI_INVALID_PARAMETER ControllerName is NULL. -+ -+ @retval EFI_UNSUPPORTED The driver specified by This is not currently -+ managing the controller specified by -+ ControllerHandle and ChildHandle. -+ -+ @retval EFI_UNSUPPORTED The driver specified by This does not support -+ the language specified by Language. -+ -+**/ -+EFI_STATUS -+EFIAPI -+Rp1BusComponentNameGetControllerName ( -+ IN EFI_COMPONENT_NAME_PROTOCOL *This, -+ IN EFI_HANDLE ControllerHandle, -+ IN EFI_HANDLE ChildHandle OPTIONAL, -+ IN CHAR8 *Language, -+ OUT CHAR16 **ControllerName -+ ) -+{ -+ EFI_STATUS Status; -+ -+ if (ChildHandle != NULL) { -+ return EFI_UNSUPPORTED; -+ } -+ -+ Status = EfiTestManagedDevice ( -+ ControllerHandle, -+ mRp1BusDriverBinding.DriverBindingHandle, -+ &gEfiPciIoProtocolGuid -+ ); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ return LookupUnicodeString2 ( -+ Language, -+ This->SupportedLanguages, -+ mRp1BusControllerNameTable, -+ ControllerName, -+ (BOOLEAN)(This == &mRp1BusComponentName) -+ ); -+} -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.c b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.c -index 7d7012b5..aed8ae81 100644 ---- a/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.c -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.c -@@ -1,98 +1,469 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * - **/ - - #include -+#include - #include - #include -+#include - #include -- -+#include -+#include - #include - --typedef struct { -- EFI_PHYSICAL_ADDRESS Bar; -- UINT32 ChipId; --} RP1_DEVICE; -+#include "Rp1BusDxe.h" - - STATIC --EFI_STATUS -+VOID - EFIAPI --Rp1RegisterDwc3Controllers ( -- IN RP1_DEVICE *This -+Rp1BusRegisterDwc3Controllers ( -+ IN RP1_BUS_DATA *Rp1Data - ) - { -- EFI_STATUS Status; -- UINTN Index; -- EFI_PHYSICAL_ADDRESS FullBase; -+ EFI_STATUS Status; -+ UINTN Index; -+ EFI_PHYSICAL_ADDRESS FullBase; -+ EFI_HANDLE DeviceHandle; -+ RP1_BUS_PROTOCOL *Rp1Bus; - -- EFI_PHYSICAL_ADDRESS Dwc3Addresses[] = { -+ EFI_PHYSICAL_ADDRESS Dwc3Addresses[] = { - RP1_USBHOST0_BASE, RP1_USBHOST1_BASE - }; - - for (Index = 0; Index < ARRAY_SIZE (Dwc3Addresses); Index++) { -- FullBase = This->Bar + Dwc3Addresses[Index]; -+ DeviceHandle = NULL; -+ FullBase = Rp1Data->PeripheralBase + Dwc3Addresses[Index]; -+ - Status = RegisterNonDiscoverableMmioDevice ( -- NonDiscoverableDeviceTypeXhci, -- NonDiscoverableDeviceDmaTypeNonCoherent, -- NULL, -- NULL, -- 1, -- FullBase, -- RP1_USBHOST_SIZE -- ); -+ NonDiscoverableDeviceTypeXhci, -+ NonDiscoverableDeviceDmaTypeNonCoherent, -+ NULL, -+ &DeviceHandle, -+ 1, -+ FullBase, -+ RP1_USBHOST_SIZE -+ ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, -- "%a: Failed to register DWC3 controller at 0x%lx. Status=%r\n", -- __func__, FullBase, Status)); -- return Status; -+ DEBUG (( -+ DEBUG_ERROR, -+ "RP1: Failed to register DWC3 controller at 0x%lx. Status=%r\n", -+ FullBase, -+ Status -+ )); -+ continue; -+ } -+ -+ Status = gBS->OpenProtocol ( -+ Rp1Data->ControllerHandle, -+ &gRp1BusProtocolGuid, -+ (VOID **)&Rp1Bus, -+ Rp1Data->DriverBinding->DriverBindingHandle, -+ DeviceHandle, -+ EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER -+ ); -+ if (EFI_ERROR (Status)) { -+ DEBUG (( -+ DEBUG_ERROR, -+ "RP1: Failed to open DWC3 by controller. Status=%r\n", -+ Status -+ )); -+ continue; - } - } -- return EFI_SUCCESS; - } - - STATIC - VOID - EFIAPI --Rp1RegisterDevices ( -- IN RP1_DEVICE *This -+Rp1BusRegisterDevices ( -+ IN RP1_BUS_DATA *Rp1Data - ) - { -- Rp1RegisterDwc3Controllers (This); -+ Rp1BusRegisterDwc3Controllers (Rp1Data); - } - - STATIC - VOID - EFIAPI --Rp1EnableInterrupts ( -- IN RP1_DEVICE *This -+Rp1BusEnableInterrupts ( -+ IN RP1_BUS_DATA *Rp1Data -+ ) -+{ -+ MmioWrite32 ( -+ Rp1Data->PeripheralBase + RP1_PCIE_REG_SET + RP1_PCIE_MSIX_CFG (RP1_INT_USBHOST0_0), -+ RP1_PCIE_MSIX_CFG_ENABLE -+ ); -+ MmioWrite32 ( -+ Rp1Data->PeripheralBase + RP1_PCIE_REG_SET + RP1_PCIE_MSIX_CFG (RP1_INT_USBHOST1_0), -+ RP1_PCIE_MSIX_CFG_ENABLE -+ ); -+} -+ -+STATIC -+EFI_PHYSICAL_ADDRESS -+EFIAPI -+Rp1BusGetPeripheralBase ( -+ IN RP1_BUS_PROTOCOL *This - ) - { -- MmioWrite32 (This->Bar + RP1_PCIE_REG_SET + RP1_PCIE_MSIX_CFG (RP1_INT_USBHOST0_0), -- RP1_PCIE_MSIX_CFG_ENABLE); -- MmioWrite32 (This->Bar + RP1_PCIE_REG_SET + RP1_PCIE_MSIX_CFG (RP1_INT_USBHOST1_0), -- RP1_PCIE_MSIX_CFG_ENABLE); -+ ASSERT (This != NULL); -+ -+ return (RP1_BUS_DATA_FROM_THIS (This))->PeripheralBase; - } - - EFI_STATUS - EFIAPI --Rp1BusDxeEntryPoint ( -- IN EFI_HANDLE ImageHandle, -- IN EFI_SYSTEM_TABLE *SystemTable -+Rp1BusDriverBindingSupported ( -+ IN EFI_DRIVER_BINDING_PROTOCOL *This, -+ IN EFI_HANDLE ControllerHandle, -+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_PCI_IO_PROTOCOL *PciIo; -+ UINT32 PciId; -+ -+ Status = gBS->OpenProtocol ( -+ ControllerHandle, -+ &gEfiPciIoProtocolGuid, -+ (VOID **)&PciIo, -+ This->DriverBindingHandle, -+ ControllerHandle, -+ EFI_OPEN_PROTOCOL_BY_DRIVER -+ ); -+ -+ if (EFI_ERROR (Status)) { -+ return EFI_UNSUPPORTED; -+ } -+ -+ Status = PciIo->Pci.Read ( -+ PciIo, -+ EfiPciIoWidthUint32, -+ PCI_VENDOR_ID_OFFSET, -+ 1, -+ &PciId -+ ); -+ -+ if (EFI_ERROR (Status)) { -+ Status = EFI_UNSUPPORTED; -+ goto Exit; -+ } -+ -+ if (((PciId & 0xffff) != PCI_VENDOR_ID_RPILTD) || -+ ((PciId >> 16) != PCI_DEVICE_ID_RP1)) -+ { -+ Status = EFI_UNSUPPORTED; -+ } -+ -+Exit: -+ gBS->CloseProtocol ( -+ ControllerHandle, -+ &gEfiPciIoProtocolGuid, -+ This->DriverBindingHandle, -+ ControllerHandle -+ ); -+ -+ return Status; -+} -+ -+EFI_STATUS -+EFIAPI -+Rp1BusDriverBindingStart ( -+ IN EFI_DRIVER_BINDING_PROTOCOL *This, -+ IN EFI_HANDLE ControllerHandle, -+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath -+ ) -+{ -+ EFI_STATUS Status; -+ EFI_PCI_IO_PROTOCOL *PciIo; -+ UINT64 Supports; -+ RP1_BUS_DATA *Rp1Data; -+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *PeripheralDesc; -+ -+ Rp1Data = NULL; -+ -+ Status = gBS->OpenProtocol ( -+ ControllerHandle, -+ &gEfiPciIoProtocolGuid, -+ (VOID **)&PciIo, -+ This->DriverBindingHandle, -+ ControllerHandle, -+ EFI_OPEN_PROTOCOL_BY_DRIVER -+ ); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ Status = PciIo->Attributes ( -+ PciIo, -+ EfiPciIoAttributeOperationSupported, -+ 0, -+ &Supports -+ ); -+ if (!EFI_ERROR (Status)) { -+ Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE; -+ Status = PciIo->Attributes ( -+ PciIo, -+ EfiPciIoAttributeOperationEnable, -+ Supports, -+ NULL -+ ); -+ } -+ -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "RP1: Failed to enable PCI device. Status=%r\n", Status)); -+ goto Fail; -+ } -+ -+ Rp1Data = AllocateZeroPool (sizeof (RP1_BUS_DATA)); -+ if (Rp1Data == NULL) { -+ Status = EFI_OUT_OF_RESOURCES; -+ DEBUG ((DEBUG_ERROR, "RP1: Failed to allocate device context. Status=%r\n", Status)); -+ goto Fail; -+ } -+ -+ Rp1Data->Signature = RP1_BUS_DATA_SIGNATURE; -+ Rp1Data->ControllerHandle = ControllerHandle; -+ Rp1Data->DriverBinding = This; -+ Rp1Data->PciIo = PciIo; -+ Rp1Data->Rp1Bus.GetPeripheralBase = Rp1BusGetPeripheralBase; -+ -+ Status = PciIo->GetBarAttributes ( -+ PciIo, -+ RP1_PERIPHERAL_BAR_INDEX, -+ NULL, -+ (VOID **)&PeripheralDesc -+ ); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "RP1: Failed to get BAR attributes. Status=%r\n", Status)); -+ goto Fail; -+ } -+ -+ Rp1Data->PeripheralBase = PeripheralDesc->AddrRangeMin; -+ FreePool (PeripheralDesc); -+ -+ Rp1Data->ChipId = MmioRead32 (Rp1Data->PeripheralBase + RP1_SYSINFO_BASE); -+ -+ Status = gBS->InstallMultipleProtocolInterfaces ( -+ &ControllerHandle, -+ &gRp1BusProtocolGuid, -+ &Rp1Data->Rp1Bus, -+ NULL -+ ); -+ if (EFI_ERROR (Status)) { -+ DEBUG ((DEBUG_ERROR, "RP1: Failed to install bus protocol. Status=%r\n", Status)); -+ goto Fail; -+ } -+ -+ DEBUG (( -+ DEBUG_INFO, -+ "RP1: chip id %x, peripheral base at CPU address 0x%lx\n", -+ Rp1Data->ChipId, -+ Rp1Data->PeripheralBase -+ )); -+ -+ Rp1BusRegisterDevices (Rp1Data); -+ Rp1BusEnableInterrupts (Rp1Data); -+ -+ return EFI_SUCCESS; -+ -+Fail: -+ gBS->CloseProtocol ( -+ ControllerHandle, -+ &gEfiPciIoProtocolGuid, -+ This->DriverBindingHandle, -+ ControllerHandle -+ ); -+ -+ gBS->UninstallMultipleProtocolInterfaces ( -+ ControllerHandle, -+ &gRp1BusProtocolGuid, -+ This->DriverBindingHandle, -+ ControllerHandle -+ ); -+ -+ if (Rp1Data != NULL) { -+ FreePool (Rp1Data); -+ } -+ -+ return Status; -+} -+ -+STATIC -+EFI_STATUS -+EFIAPI -+Rp1BusUnregisterNonDiscoverableDevice ( -+ IN EFI_DRIVER_BINDING_PROTOCOL *This, -+ IN EFI_HANDLE ControllerHandle, -+ IN EFI_HANDLE DeviceHandle -+ ) -+{ -+ EFI_STATUS Status; -+ NON_DISCOVERABLE_DEVICE *NonDiscoverableDevice; -+ EFI_DEVICE_PATH_PROTOCOL *NonDiscoverableDevicePath; -+ RP1_BUS_PROTOCOL *Rp1Bus; -+ -+ Status = gBS->OpenProtocol ( -+ DeviceHandle, -+ &gEdkiiNonDiscoverableDeviceProtocolGuid, -+ (VOID **)&NonDiscoverableDevice, -+ This->DriverBindingHandle, -+ ControllerHandle, -+ EFI_OPEN_PROTOCOL_GET_PROTOCOL -+ ); -+ if (EFI_ERROR (Status)) { -+ ASSERT_EFI_ERROR (Status); -+ return Status; -+ } -+ -+ Status = gBS->OpenProtocol ( -+ DeviceHandle, -+ &gEfiDevicePathProtocolGuid, -+ (VOID **)&NonDiscoverableDevicePath, -+ This->DriverBindingHandle, -+ ControllerHandle, -+ EFI_OPEN_PROTOCOL_GET_PROTOCOL -+ ); -+ if (EFI_ERROR (Status)) { -+ ASSERT_EFI_ERROR (Status); -+ return Status; -+ } -+ -+ Status = gBS->CloseProtocol ( -+ ControllerHandle, -+ &gRp1BusProtocolGuid, -+ This->DriverBindingHandle, -+ DeviceHandle -+ ); -+ ASSERT_EFI_ERROR (Status); -+ -+ Status = gBS->UninstallMultipleProtocolInterfaces ( -+ DeviceHandle, -+ &gEdkiiNonDiscoverableDeviceProtocolGuid, -+ NonDiscoverableDevice, -+ &gEfiDevicePathProtocolGuid, -+ NonDiscoverableDevicePath, -+ NULL -+ ); -+ if (EFI_ERROR (Status)) { -+ gBS->OpenProtocol ( -+ ControllerHandle, -+ &gRp1BusProtocolGuid, -+ (VOID **)&Rp1Bus, -+ This->DriverBindingHandle, -+ DeviceHandle, -+ EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER -+ ); -+ return Status; -+ } -+ -+ FreePool (NonDiscoverableDevice); -+ FreePool (NonDiscoverableDevicePath); -+ -+ return EFI_SUCCESS; -+} -+ -+EFI_STATUS -+EFIAPI -+Rp1BusDriverBindingStop ( -+ IN EFI_DRIVER_BINDING_PROTOCOL *This, -+ IN EFI_HANDLE ControllerHandle, -+ IN UINTN NumberOfChildren, -+ IN EFI_HANDLE *DeviceHandleBuffer - ) - { -- RP1_DEVICE Dev; -- Dev.Bar = PcdGet64 (Rp1PciPeripheralsBar); -- Dev.ChipId = MmioRead32 (Dev.Bar + RP1_SYSINFO_BASE); -+ EFI_STATUS Status; -+ UINTN Index; -+ RP1_BUS_PROTOCOL *Rp1Bus; -+ BOOLEAN AllChildrenStopped; -+ -+ if (NumberOfChildren == 0) { -+ DEBUG ((DEBUG_INFO, "RP1: Stop bus at %p\n", ControllerHandle)); -+ -+ Status = gBS->OpenProtocol ( -+ ControllerHandle, -+ &gRp1BusProtocolGuid, -+ (VOID **)&Rp1Bus, -+ This->DriverBindingHandle, -+ ControllerHandle, -+ EFI_OPEN_PROTOCOL_GET_PROTOCOL -+ ); -+ if (EFI_ERROR (Status)) { -+ return Status; -+ } -+ -+ Status = gBS->UninstallMultipleProtocolInterfaces ( -+ ControllerHandle, -+ &gRp1BusProtocolGuid, -+ Rp1Bus, -+ NULL -+ ); -+ ASSERT_EFI_ERROR (Status); -+ -+ FreePool (RP1_BUS_DATA_FROM_THIS (Rp1Bus)); -+ -+ Status = gBS->CloseProtocol ( -+ ControllerHandle, -+ &gEfiPciIoProtocolGuid, -+ This->DriverBindingHandle, -+ ControllerHandle -+ ); -+ ASSERT_EFI_ERROR (Status); -+ -+ return EFI_SUCCESS; -+ } - -- DEBUG ((DEBUG_INFO, "RP1 chip id: %x, peripheral BAR at CPU address 0x%lx\n", -- Dev.ChipId, Dev.Bar)); -+ AllChildrenStopped = TRUE; - -- Rp1RegisterDevices (&Dev); -- Rp1EnableInterrupts (&Dev); -+ for (Index = 0; Index < NumberOfChildren; Index++) { -+ // -+ // We only register non-discoverable PCI devices so far. -+ // -+ Status = Rp1BusUnregisterNonDiscoverableDevice ( -+ This, -+ ControllerHandle, -+ DeviceHandleBuffer[Index] -+ ); -+ if (EFI_ERROR (Status)) { -+ AllChildrenStopped = FALSE; -+ continue; -+ } -+ } -+ -+ if (!AllChildrenStopped) { -+ return EFI_DEVICE_ERROR; -+ } - - return EFI_SUCCESS; - } -+ -+EFI_DRIVER_BINDING_PROTOCOL mRp1BusDriverBinding = { -+ Rp1BusDriverBindingSupported, -+ Rp1BusDriverBindingStart, -+ Rp1BusDriverBindingStop, -+ 0x10, -+ NULL, -+ NULL -+}; -+ -+EFI_STATUS -+EFIAPI -+Rp1BusDxeEntryPoint ( -+ IN EFI_HANDLE ImageHandle, -+ IN EFI_SYSTEM_TABLE *SystemTable -+ ) -+{ -+ return EfiLibInstallDriverBindingComponentName2 ( -+ ImageHandle, -+ SystemTable, -+ &mRp1BusDriverBinding, -+ ImageHandle, -+ &mRp1BusComponentName, -+ &mRp1BusComponentName2 -+ ); -+} -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.h b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.h -new file mode 100644 -index 00000000..f75389a6 ---- /dev/null -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.h -@@ -0,0 +1,34 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __RP1_BUS_DXE_H__ -+#define __RP1_BUS_DXE_H__ -+ -+#include -+#include -+#include -+ -+#define RP1_BUS_DATA_SIGNATURE SIGNATURE_32 ('R','P','1','b') -+ -+typedef struct { -+ UINT32 Signature; -+ EFI_HANDLE ControllerHandle; -+ EFI_DRIVER_BINDING_PROTOCOL *DriverBinding; -+ EFI_PCI_IO_PROTOCOL *PciIo; -+ RP1_BUS_PROTOCOL Rp1Bus; -+ EFI_PHYSICAL_ADDRESS PeripheralBase; -+ UINT32 ChipId; -+} RP1_BUS_DATA; -+ -+#define RP1_BUS_DATA_FROM_THIS(a) CR (a, RP1_BUS_DATA, Rp1Bus, RP1_BUS_DATA_SIGNATURE) -+ -+extern EFI_DRIVER_BINDING_PROTOCOL mRp1BusDriverBinding; -+extern EFI_COMPONENT_NAME_PROTOCOL mRp1BusComponentName; -+extern EFI_COMPONENT_NAME2_PROTOCOL mRp1BusComponentName2; -+ -+#endif // __RP1_BUS_DXE_H__ -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf -index ffc8c143..671ec77f 100644 ---- a/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Drivers/Rp1BusDxe/Rp1BusDxe.inf -@@ -1,6 +1,6 @@ - #/** @file - # --# Copyright (c) 2023, Mario Bălănică -+# Copyright (c) 2023-2024, Mario Bălănică - # - # SPDX-License-Identifier: BSD-2-Clause-Patent - # -@@ -16,6 +16,7 @@ - - [Sources] - Rp1BusDxe.c -+ ComponentName.c - - [Packages] - MdePkg/MdePkg.dec -@@ -25,15 +26,17 @@ - [LibraryClasses] - DebugLib - IoLib -+ MemoryAllocationLib - NonDiscoverableDeviceRegistrationLib - UefiBootServicesTableLib - UefiDriverEntryPoint - UefiLib - - [Protocols] -- --[Pcd] -- gRpiSiliconTokenSpaceGuid.Rp1PciPeripheralsBar -+ gEfiPciIoProtocolGuid ## TO_START -+ gRp1BusProtocolGuid ## BY_START -+ gEdkiiNonDiscoverableDeviceProtocolGuid ## BY_START -+ gEfiDevicePathProtocolGuid ## BY_START - - [Depex] - TRUE -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Include/Protocol/Rp1Bus.h b/Silicon/RaspberryPi/RpiSiliconPkg/Include/Protocol/Rp1Bus.h -new file mode 100644 -index 00000000..4ae879b8 ---- /dev/null -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Include/Protocol/Rp1Bus.h -@@ -0,0 +1,29 @@ -+/** @file -+ * -+ * Copyright (c) 2024, Mario Bălănică -+ * -+ * SPDX-License-Identifier: BSD-2-Clause-Patent -+ * -+ **/ -+ -+#ifndef __RP1_BUS_H__ -+#define __RP1_BUS_H__ -+ -+#define RP1_BUS_PROTOCOL_GUID \ -+ { 0xf1417a30, 0x5418, 0x4cd5, { 0x8e, 0x65, 0xf9, 0x02, 0x51, 0x21, 0xb5, 0x7f } } -+ -+typedef struct _RP1_BUS_PROTOCOL RP1_BUS_PROTOCOL; -+ -+typedef -+EFI_PHYSICAL_ADDRESS -+(EFIAPI *RP1_BUS_GET_PERIPHERAL_BASE)( -+ IN RP1_BUS_PROTOCOL *This -+ ); -+ -+struct _RP1_BUS_PROTOCOL { -+ RP1_BUS_GET_PERIPHERAL_BASE GetPeripheralBase; -+}; -+ -+extern EFI_GUID gRp1BusProtocolGuid; -+ -+#endif // __RP1_BUS_H__ -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.h b/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.h -index 13a33fc6..d136c518 100644 ---- a/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.h -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/Include/Rp1.h -@@ -1,6 +1,6 @@ - /** @file - * -- * Copyright (c) 2023, Mario Bălănică -+ * Copyright (c) 2023-2024, Mario Bălănică - * - * SPDX-License-Identifier: BSD-2-Clause-Patent - * -@@ -9,6 +9,11 @@ - #ifndef __RP1_H__ - #define __RP1_H__ - -+#define PCI_VENDOR_ID_RPILTD 0x1de4 -+#define PCI_DEVICE_ID_RP1 0x0001 -+ -+#define RP1_PERIPHERAL_BAR_INDEX 1 -+ - // - // BAR1 Peripherals - // -diff --git a/Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec b/Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec -index d66041e0..ce74ec7b 100644 ---- a/Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec -+++ b/Silicon/RaspberryPi/RpiSiliconPkg/RpiSiliconPkg.dec -@@ -1,6 +1,6 @@ - #/** @file - # --# Copyright (c) 2023, Mario Bălănică -+# Copyright (c) 2023-2024, Mario Bălănică - # - # SPDX-License-Identifier: BSD-2-Clause-Patent - # -@@ -18,5 +18,5 @@ - [Guids] - gRpiSiliconTokenSpaceGuid = { 0x0b3ce57a, 0xa82b, 0x4ada, { 0x8f, 0xb5, 0x52, 0xc8, 0x72, 0x30, 0x1f, 0xdb } } - --[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] -- gRpiSiliconTokenSpaceGuid.Rp1PciPeripheralsBar|0x0|UINT64|0x00000001 -+[Protocols] -+ gRp1BusProtocolGuid = { 0xf1417a30, 0x5418, 0x4cd5, { 0x8e, 0x65, 0xf9, 0x02, 0x51, 0x21, 0xb5, 0x7f } } --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0015-Platform-RPi5-Make-AcpiTableDxe-less-verbose.patch b/packages/edk2/patches/platforms/0015-Platform-RPi5-Make-AcpiTableDxe-less-verbose.patch deleted file mode 100644 index 8714abf..0000000 --- a/packages/edk2/patches/platforms/0015-Platform-RPi5-Make-AcpiTableDxe-less-verbose.patch +++ /dev/null @@ -1,75 +0,0 @@ -From b2427c0f29a2a1d68f0dbd955dd11f832c071800 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 15 Mar 2024 03:11:25 +0200 -Subject: [PATCH 15/16] Platform/RPi5: Make AcpiTableDxe less verbose -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -No need to print the entire namespace each time a value is patched. - -Signed-off-by: Mario Bălănică ---- - Platform/RaspberryPi/RPi5/RPi5.dsc | 31 ++++++++++++++++++------------ - 1 file changed, 19 insertions(+), 12 deletions(-) - -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 58eb5dfd..e78f8c85 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -48,6 +48,20 @@ - DEFINE TFA_BUILD_BL31 = $(TFA_BUILD_ARTIFACTS)/bl31.bin - !endif - -+ # -+ # DEBUG_ASSERT_ENABLED 0x01 -+ # DEBUG_PRINT_ENABLED 0x02 -+ # DEBUG_CODE_ENABLED 0x04 -+ # CLEAR_MEMORY_ENABLED 0x08 -+ # ASSERT_BREAKPOINT_ENABLED 0x10 -+ # ASSERT_DEADLOOP_ENABLED 0x20 -+ # -+!if $(TARGET) == RELEASE -+ DEFINE DEBUG_PROPERTY_MASK = 0x21 -+!else -+ DEFINE DEBUG_PROPERTY_MASK = 0x2f -+!endif -+ - ################################################################################ - # - # Library Class section - list of all Library Classes needed by this Platform. -@@ -291,17 +305,7 @@ - gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 - gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 - -- # DEBUG_ASSERT_ENABLED 0x01 -- # DEBUG_PRINT_ENABLED 0x02 -- # DEBUG_CODE_ENABLED 0x04 -- # CLEAR_MEMORY_ENABLED 0x08 -- # ASSERT_BREAKPOINT_ENABLED 0x10 -- # ASSERT_DEADLOOP_ENABLED 0x20 --!if $(TARGET) == RELEASE -- gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21 --!else -- gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f --!endif -+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|$(DEBUG_PROPERTY_MASK) - - # DEBUG_INIT 0x00000001 // Initialization - # DEBUG_WARN 0x00000002 // Warnings -@@ -594,7 +598,10 @@ - # - # ACPI Support - # -- MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf -+ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf { -+ -+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|$(DEBUG_PROPERTY_MASK) & ~0x04 -+ } - MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf - Platform/RaspberryPi/RPi5/AcpiTables/AcpiTables.inf - --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0016-Platform-RPi5-Add-SATA-drivers.patch b/packages/edk2/patches/platforms/0016-Platform-RPi5-Add-SATA-drivers.patch deleted file mode 100644 index 1ee9120..0000000 --- a/packages/edk2/patches/platforms/0016-Platform-RPi5-Add-SATA-drivers.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 8e1779b538bcc1e6dc68d7df625394f933651d7a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Mario=20B=C4=83l=C4=83nic=C4=83?= - -Date: Fri, 15 Mar 2024 03:12:05 +0200 -Subject: [PATCH 16/16] Platform/RPi5: Add SATA drivers -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Mario Bălănică ---- - Platform/RaspberryPi/RPi5/RPi5.dsc | 7 +++++++ - Platform/RaspberryPi/RPi5/RPi5.fdf | 7 +++++++ - 2 files changed, 14 insertions(+) - -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index e78f8c85..ff9f5010 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -695,6 +695,13 @@ - # - MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf - -+ # -+ # AHCI Support -+ # -+ MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf -+ MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf -+ MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf -+ - # - # EFI Memory Attribute Protocol Manager - # -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index 552160a0..8d79e453 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -299,6 +299,13 @@ READ_LOCK_STATUS = TRUE - # - INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf - -+ # -+ # AHCI Support -+ # -+ INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf -+ INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf -+ INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf -+ - # - # SCSI Bus and Disk Driver - # --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0017-Add-additional-BCM2712-boards.patch b/packages/edk2/patches/platforms/0017-Add-additional-BCM2712-boards.patch deleted file mode 100644 index 4e51c12..0000000 --- a/packages/edk2/patches/platforms/0017-Add-additional-BCM2712-boards.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 4f922b40c69cac16226a8e4540f678275e1480fd Mon Sep 17 00:00:00 2001 -From: MattP <63603528+NumberOneGit@users.noreply.github.com> -Date: Mon, 5 May 2025 21:49:18 -0400 -Subject: [PATCH 17/29] Add additional BCM2712 boards - ---- - .../BoardRevisionHelperLib/BoardRevisionHelperLib.c | 11 ++++++++++- - 1 file changed, 10 insertions(+), 1 deletion(-) - -diff --git a/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -index 032853aa..40143c5b 100644 ---- a/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -+++ b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -@@ -58,7 +58,10 @@ BoardRevisionGetModelFamily ( - case 0x14: // Raspberry Pi Computer Module 4 - return 4; - case 0x17: // Raspberry Pi 5 Model B -- return 5; -+ case 0x18: // Compute Module 5 -+ case 0x19: // Raspberry Pi 500 -+ case 0x1a: // Compute Module 5 Lite -+ return 5; - } - } - return 0; -@@ -106,6 +109,12 @@ BoardRevisionGetModelName ( - return "Raspberry Pi Compute Module 4"; - case 0x17: - return "Raspberry Pi 5 Model B"; -+ case 0x18: -+ return "Raspberry Pi Compute Module 5"; -+ case 0x19: -+ return "Raspberry Pi 500" -+ case 0x1a: -+ return "Raspberry Pi Compute Module 5 Lite" - } - } - return "Unknown Raspberry Pi Model"; --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0018-Set-pinctrl-lengths-for-D0.patch b/packages/edk2/patches/platforms/0018-Set-pinctrl-lengths-for-D0.patch deleted file mode 100644 index b2fd317..0000000 --- a/packages/edk2/patches/platforms/0018-Set-pinctrl-lengths-for-D0.patch +++ /dev/null @@ -1,1074 +0,0 @@ -From db0ee2dd37b6d74701c342eef87a36d8c277eb4b Mon Sep 17 00:00:00 2001 -From: MattP <63603528+NumberOneGit@users.noreply.github.com> -Date: Mon, 5 May 2025 21:49:49 -0400 -Subject: [PATCH 18/29] Set pinctrl lengths for D0 - ---- - .../Include/IndustryStandard/Bcm2712.h | 4 +- - .../Include/IndustryStandard/Bcm2712Pinctrl.h | 635 ++++-------------- - .../Library/Bcm2712GpioLib/Bcm2712GpioLib.c | 146 ++-- - 3 files changed, 200 insertions(+), 585 deletions(-) - -diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -index f2daa41a..8af26de2 100644 ---- a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -+++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712.h -@@ -24,9 +24,9 @@ - #define BCM2712_BRCMSTB_GIO_AON_LENGTH 0x40 - - #define BCM2712_PINCTRL_BASE 0x107d504100 --#define BCM2712_PINCTRL_LENGTH 0x30 -+#define BCM2712_PINCTRL_LENGTH 0x20 - #define BCM2712_PINCTRL_AON_BASE 0x107d510700 --#define BCM2712_PINCTRL_AON_LENGTH 0x20 -+#define BCM2712_PINCTRL_AON_LENGTH 0x1C - - #define BCM2712_BRCMSTB_SDIO1_HOST_BASE 0x1000fff000 - #define BCM2712_BRCMSTB_SDIO1_CFG_BASE 0x1000fff400 -diff --git a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pinctrl.h b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pinctrl.h -index 12c47999..2124ff42 100644 ---- a/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pinctrl.h -+++ b/Silicon/Broadcom/Bcm27xx/Include/IndustryStandard/Bcm2712Pinctrl.h -@@ -16,551 +16,243 @@ - // - // General Input/Output (GIO) - // -+ - typedef enum { -- GIO_PIN0_ALT_BSC_M3 = 1, -- GIO_PIN0_ALT_VC_I2C0, -- GIO_PIN0_ALT_GPCLK0, -- GIO_PIN0_ALT_ENET0, -- GIO_PIN0_ALT_VC_PWM1, -- GIO_PIN0_ALT_VC_SPI0, -- GIO_PIN0_ALT_IR_IN, --} GIO_PIN0_ALT; -- --typedef enum { -- GIO_PIN1_ALT_BSC_M3 = 1, -- GIO_PIN1_ALT_VC_I2C0, -- GIO_PIN1_ALT_GPCLK1, -- GIO_PIN1_ALT_ENET0, -- GIO_PIN1_ALT_VC_PWM1, -+ GIO_PIN1_ALT_VC_I2C0 = 1, -+ GIO_PIN1_ALT_USB_PWR, -+ GIO_PIN1_ALT_GPCLK0, -+ GIO_PIN1_ALT_SD_CARD_E, -+ GIO_PIN1_ALT_VC_SPI3, - GIO_PIN1_ALT_SR_EDM_SENSE, - GIO_PIN1_ALT_VC_SPI0, -- GIO_PIN1_ALT_VC_UART3, -+ GIO_PIN1_ALT_VC_UART0, - } GIO_PIN1_ALT; - - typedef enum { -- GIO_PIN2_ALT_PDM = 1, -- GIO_PIN2_ALT_I2S_IN, -- GIO_PIN2_ALT_GPCLK2, -- GIO_PIN2_ALT_VC_SPI4, -- GIO_PIN2_ALT_PKT, -+ GIO_PIN2_ALT_VC_I2C0 = 1, -+ GIO_PIN2_ALT_USB_PWR, -+ GIO_PIN2_ALT_GPCLK1, -+ GIO_PIN2_ALT_SD_CARD_E, -+ GIO_PIN2_ALT_VC_SPI3, -+ GIO_PIN2_ALT_CLK_OBSERVE, - GIO_PIN2_ALT_VC_SPI0, -- GIO_PIN2_ALT_VC_UART3, -+ GIO_PIN2_ALT_VC_UART0, - } GIO_PIN2_ALT; - - typedef enum { -- GIO_PIN3_ALT_PDM = 1, -- GIO_PIN3_ALT_I2S_IN, -- GIO_PIN3_ALT_VC_SPI4, -- GIO_PIN3_ALT_PKT, -+ GIO_PIN3_ALT_VC_I2C3 = 1, -+ GIO_PIN3_ALT_USB_VBUS, -+ GIO_PIN3_ALT_GPCLK2, -+ GIO_PIN3_ALT_SD_CARD_E, -+ GIO_PIN3_ALT_VC_SPI3, - GIO_PIN3_ALT_VC_SPI0, -- GIO_PIN3_ALT_VC_UART3, -+ GIO_PIN3_ALT_VC_UART0, - } GIO_PIN3_ALT; - - typedef enum { -- GIO_PIN4_ALT_PDM = 1, -- GIO_PIN4_ALT_I2S_IN, -- GIO_PIN4_ALT_ARM_JTAG, -- GIO_PIN4_ALT_VC_SPI4, -- GIO_PIN4_ALT_PKT, -+ GIO_PIN4_ALT_VC_I2C3 = 1, -+ GIO_PIN4_ALT_VC_PWM1, -+ GIO_PIN4_ALT_VC_SPI3, -+ GIO_PIN4_ALT_SD_CARD_E, -+ GIO_PIN4_ALT_VC_SPI3_2, - GIO_PIN4_ALT_VC_SPI0, -- GIO_PIN4_ALT_VC_UART3, -+ GIO_PIN4_ALT_VC_UART0, - } GIO_PIN4_ALT; - --typedef enum { -- GIO_PIN5_ALT_PDM = 1, -- GIO_PIN5_ALT_VC_I2C3, -- GIO_PIN5_ALT_ARM_JTAG, -- GIO_PIN5_ALT_SD_CARD_E, -- GIO_PIN5_ALT_VC_SPI4, -- GIO_PIN5_ALT_PKT, -- GIO_PIN5_ALT_VC_PCM, -- GIO_PIN5_ALT_VC_I2C5, --} GIO_PIN5_ALT; -- --typedef enum { -- GIO_PIN6_ALT_PDM = 1, -- GIO_PIN6_ALT_VC_I2C3, -- GIO_PIN6_ALT_ARM_JTAG, -- GIO_PIN6_ALT_SD_CARD_E, -- GIO_PIN6_ALT_VC_SPI4, -- GIO_PIN6_ALT_PKT, -- GIO_PIN6_ALT_VC_PCM, -- GIO_PIN6_ALT_VC_I2C5, --} GIO_PIN6_ALT; -- --typedef enum { -- GIO_PIN7_ALT_I2S_OUT = 1, -- GIO_PIN7_ALT_SPDIF_OUT, -- GIO_PIN7_ALT_ARM_JTAG, -- GIO_PIN7_ALT_SD_CARD_E, -- GIO_PIN7_ALT_VC_I2C3, -- GIO_PIN7_ALT_ENET0_RGMII, -- GIO_PIN7_ALT_VC_PCM, -- GIO_PIN7_ALT_VC_SPI4, --} GIO_PIN7_ALT; -- --typedef enum { -- GIO_PIN8_ALT_I2S_OUT = 1, -- GIO_PIN8_ALT_AUD_FS_CLK0, -- GIO_PIN8_ALT_ARM_JTAG, -- GIO_PIN8_ALT_SD_CARD_E, -- GIO_PIN8_ALT_VC_I2C3, -- GIO_PIN8_ALT_ENET0_MII, -- GIO_PIN8_ALT_VC_PCM, -- GIO_PIN8_ALT_VC_SPI4, --} GIO_PIN8_ALT; -- --typedef enum { -- GIO_PIN9_ALT_I2S_OUT = 1, -- GIO_PIN9_ALT_AUD_FS_CLK0, -- GIO_PIN9_ALT_ARM_JTAG, -- GIO_PIN9_ALT_SD_CARD_E, -- GIO_PIN9_ALT_ENET0_MII, -- GIO_PIN9_ALT_SD_CARD_C, -- GIO_PIN9_ALT_VC_SPI4, --} GIO_PIN9_ALT; -- - typedef enum { - GIO_PIN10_ALT_BSC_M3 = 1, -- GIO_PIN10_ALT_MTSIF_ALT1, -- GIO_PIN10_ALT_I2S_IN, -- GIO_PIN10_ALT_I2S_OUT, -- GIO_PIN10_ALT_VC_SPI5, -- GIO_PIN10_ALT_ENET0_MII, -- GIO_PIN10_ALT_SD_CARD_C, -- GIO_PIN10_ALT_VC_SPI4, -+ GIO_PIN10_ALT_VC_PWM1, -+ GIO_PIN10_ALT_VC_SPI3, -+ GIO_PIN10_ALT_SD_CARD_E, -+ GIO_PIN10_ALT_VC_SPI3_2, -+ GIO_PIN10_ALT_GPCLK0, - } GIO_PIN10_ALT; - - typedef enum { - GIO_PIN11_ALT_BSC_M3 = 1, -- GIO_PIN11_ALT_MTSIF_ALT1, -- GIO_PIN11_ALT_I2S_IN, -- GIO_PIN11_ALT_I2S_OUT, -- GIO_PIN11_ALT_VC_SPI5, -- GIO_PIN11_ALT_ENET0_MII, -+ GIO_PIN11_ALT_VC_SPI3, -+ GIO_PIN11_ALT_CLK_OBSERVE, - GIO_PIN11_ALT_SD_CARD_C, -- GIO_PIN11_ALT_VC_SPI4, -+ GIO_PIN11_ALT_GPCLK1, - } GIO_PIN11_ALT; - - typedef enum { - GIO_PIN12_ALT_SPI_S = 1, -- GIO_PIN12_ALT_MTSIF_ALT1, -- GIO_PIN12_ALT_I2S_IN, -- GIO_PIN12_ALT_I2S_OUT, -- GIO_PIN12_ALT_VC_SPI5, -- GIO_PIN12_ALT_VC_I2CSL, -- GIO_PIN12_ALT_SD0, -+ GIO_PIN12_ALT_VC_SPI3, -+ GIO_PIN12_ALT_SD_CARD_C, - GIO_PIN12_ALT_SD_CARD_D, - } GIO_PIN12_ALT; - - typedef enum { - GIO_PIN13_ALT_SPI_S = 1, -- GIO_PIN13_ALT_MTSIF_ALT1, -- GIO_PIN13_ALT_I2S_OUT, -- GIO_PIN13_ALT_USB_VBUS, -- GIO_PIN13_ALT_VC_SPI5, -- GIO_PIN13_ALT_VC_I2CSL, -- GIO_PIN13_ALT_SD0, -+ GIO_PIN13_ALT_VC_SPI3, -+ GIO_PIN13_ALT_SD_CARD_C, - GIO_PIN13_ALT_SD_CARD_D, - } GIO_PIN13_ALT; - - typedef enum { - GIO_PIN14_ALT_SPI_S = 1, -- GIO_PIN14_ALT_VC_I2CSL, -- GIO_PIN14_ALT_ENET0_RGMII, -+ GIO_PIN14_ALT_UUI, - GIO_PIN14_ALT_ARM_JTAG, -- GIO_PIN14_ALT_VC_SPI5, - GIO_PIN14_ALT_VC_PWM0, -- GIO_PIN14_ALT_VC_I2C4, -+ GIO_PIN14_ALT_VC_I2C0, - GIO_PIN14_ALT_SD_CARD_D, - } GIO_PIN14_ALT; - - typedef enum { - GIO_PIN15_ALT_SPI_S = 1, -- GIO_PIN15_ALT_VC_I2CSL, -- GIO_PIN15_ALT_VC_SPI3, -+ GIO_PIN15_ALT_UUI, - GIO_PIN15_ALT_ARM_JTAG, - GIO_PIN15_ALT_VC_PWM0, -- GIO_PIN15_ALT_VC_I2C4, -+ GIO_PIN15_ALT_VC_I2C0, - GIO_PIN15_ALT_GPCLK0, - } GIO_PIN15_ALT; - - typedef enum { -- GIO_PIN16_ALT_SD_CARD_B = 1, -- GIO_PIN16_ALT_I2S_OUT, -- GIO_PIN16_ALT_VC_SPI3, -- GIO_PIN16_ALT_I2S_IN, -- GIO_PIN16_ALT_SD0, -- GIO_PIN16_ALT_ENET0_RGMII, -- GIO_PIN16_ALT_GPCLK1, --} GIO_PIN16_ALT; -- --typedef enum { -- GIO_PIN17_ALT_SD_CARD_B = 1, -- GIO_PIN17_ALT_I2S_OUT, -- GIO_PIN17_ALT_VC_SPI3, -- GIO_PIN17_ALT_I2S_IN, -- GIO_PIN17_ALT_EXT_SC_CLK, -- GIO_PIN17_ALT_SD0, -- GIO_PIN17_ALT_ENET0_RGMII, -- GIO_PIN17_ALT_GPCLK2, --} GIO_PIN17_ALT; -- --typedef enum { -- GIO_PIN18_ALT_SD_CARD_B = 1, -- GIO_PIN18_ALT_I2S_OUT, -- GIO_PIN18_ALT_VC_SPI3, -- GIO_PIN18_ALT_I2S_IN, -- GIO_PIN18_ALT_SD0, -- GIO_PIN18_ALT_ENET0_RGMII, -+ GIO_PIN18_ALT_SD_CARD_F = 1, - GIO_PIN18_ALT_VC_PWM1, - } GIO_PIN18_ALT; - - typedef enum { -- GIO_PIN19_ALT_SD_CARD_B = 1, -+ GIO_PIN19_ALT_SD_CARD_F = 1, - GIO_PIN19_ALT_USB_PWR, -- GIO_PIN19_ALT_VC_SPI3, -- GIO_PIN19_ALT_PKT, -- GIO_PIN19_ALT_SPDIF_OUT, -- GIO_PIN19_ALT_SD0, -- GIO_PIN19_ALT_IR_IN, - GIO_PIN19_ALT_VC_PWM1, - } GIO_PIN19_ALT; - - typedef enum { -- GIO_PIN20_ALT_SD_CARD_B = 1, -+ GIO_PIN20_ALT_VC_I2C3 = 1, - GIO_PIN20_ALT_UUI, - GIO_PIN20_ALT_VC_UART0, - GIO_PIN20_ALT_ARM_JTAG, -- GIO_PIN20_ALT_UART2, -- GIO_PIN20_ALT_USB_PWR, -- GIO_PIN20_ALT_VC_PCM, -- GIO_PIN20_ALT_VC_UART4, -+ GIO_PIN20_ALT_VC_UART2, - } GIO_PIN20_ALT; - - typedef enum { -- GIO_PIN21_ALT_USB_PWR = 1, -+ GIO_PIN21_ALT_VC_I2C3 = 1, - GIO_PIN21_ALT_UUI, - GIO_PIN21_ALT_VC_UART0, - GIO_PIN21_ALT_ARM_JTAG, -- GIO_PIN21_ALT_UART2, -- GIO_PIN21_ALT_SD_CARD_B, -- GIO_PIN21_ALT_VC_PCM, -- GIO_PIN21_ALT_VC_UART4, -+ GIO_PIN21_ALT_VC_UART2, - } GIO_PIN21_ALT; - - typedef enum { -- GIO_PIN22_ALT_USB_PWR = 1, -- GIO_PIN22_ALT_ENET0, -+ GIO_PIN22_ALT_SD_CARD_F = 1, - GIO_PIN22_ALT_VC_UART0, -- GIO_PIN22_ALT_MTSIF, -- GIO_PIN22_ALT_UART2, -- GIO_PIN22_ALT_USB_VBUS, -- GIO_PIN22_ALT_VC_PCM, -- GIO_PIN22_ALT_VC_I2C5, -+ GIO_PIN22_ALT_VC_I2C3, - } GIO_PIN22_ALT; - - typedef enum { -- GIO_PIN23_ALT_USB_VBUS = 1, -- GIO_PIN23_ALT_ENET0, -- GIO_PIN23_ALT_VC_UART0, -- GIO_PIN23_ALT_MTSIF, -- GIO_PIN23_ALT_UART2, -- GIO_PIN23_ALT_I2S_OUT, -- GIO_PIN23_ALT_VC_PCM, -- GIO_PIN23_ALT_VC_I2C5, -+ GIO_PIN23_ALT_VC_UART0 = 1, -+ GIO_PIN23_ALT_VC_I2C3, - } GIO_PIN23_ALT; - - typedef enum { -- GIO_PIN24_ALT_MTSIF = 1, -- GIO_PIN24_ALT_PKT, -+ GIO_PIN24_ALT_SD_CARD_B = 1, -+ GIO_PIN24_ALT_VC_SPI0, -+ GIO_PIN24_ALT_ARM_JTAG, - GIO_PIN24_ALT_UART0, -- GIO_PIN24_ALT_ENET0_RGMII, -- GIO_PIN24_ALT_ENET0_RGMII_2, -- GIO_PIN24_ALT_VC_I2C4, -- GIO_PIN24_ALT_VC_UART3, -+ GIO_PIN24_ALT_USB_PWR, -+ GIO_PIN24_ALT_VC_UART2, -+ GIO_PIN24_ALT_VC_UART0, - } GIO_PIN24_ALT; - - typedef enum { -- GIO_PIN25_ALT_MTSIF = 1, -- GIO_PIN25_ALT_PKT, -- GIO_PIN25_ALT_SC0, -+ GIO_PIN25_ALT_SD_CARD_B = 1, -+ GIO_PIN25_ALT_VC_SPI0, -+ GIO_PIN25_ALT_ARM_JTAG, - GIO_PIN25_ALT_UART0, -- GIO_PIN25_ALT_ENET0_RGMII, -- GIO_PIN25_ALT_ENET0_RGMII_2, -- GIO_PIN25_ALT_VC_I2C4, -- GIO_PIN25_ALT_VC_UART3, -+ GIO_PIN25_ALT_USB_PWR, -+ GIO_PIN25_ALT_VC_UART2, -+ GIO_PIN25_ALT_VC_UART0, - } GIO_PIN25_ALT; - - typedef enum { -- GIO_PIN26_ALT_MTSIF = 1, -- GIO_PIN26_ALT_PKT, -- GIO_PIN26_ALT_SC0, -+ GIO_PIN26_ALT_SD_CARD_B = 1, -+ GIO_PIN26_ALT_VC_SPI0, -+ GIO_PIN26_ALT_ARM_JTAG, - GIO_PIN26_ALT_UART0, -- GIO_PIN26_ALT_ENET0_RGMII, -- GIO_PIN26_ALT_VC_UART4, -- GIO_PIN26_ALT_VC_SPI5, -+ GIO_PIN26_ALT_USB_VBUS, -+ GIO_PIN26_ALT_VC_UART2, -+ GIO_PIN26_ALT_VC_SPI0_2, - } GIO_PIN26_ALT; - - typedef enum { -- GIO_PIN27_ALT_MTSIF = 1, -- GIO_PIN27_ALT_PKT, -- GIO_PIN27_ALT_SC0, -+ GIO_PIN27_ALT_SD_CARD_B = 1, -+ GIO_PIN27_ALT_VC_SPI0, -+ GIO_PIN27_ALT_ARM_JTAG, - GIO_PIN27_ALT_UART0, -- GIO_PIN27_ALT_ENET0_RGMII, -- GIO_PIN27_ALT_VC_UART4, -- GIO_PIN27_ALT_VC_SPI5, -+ GIO_PIN27_ALT_VC_UART2, -+ GIO_PIN27_ALT_VC_SPI0_2, - } GIO_PIN27_ALT; - - typedef enum { -- GIO_PIN28_ALT_MTSIF = 1, -- GIO_PIN28_ALT_PKT, -- GIO_PIN28_ALT_SC0, -- GIO_PIN28_ALT_ENET0_RGMII, -- GIO_PIN28_ALT_VC_UART4, -- GIO_PIN28_ALT_VC_SPI5, -+ GIO_PIN28_ALT_SD_CARD_B = 1, -+ GIO_PIN28_ALT_VC_SPI0, -+ GIO_PIN28_ALT_ARM_JTAG, -+ GIO_PIN28_ALT_VC_I2C0, -+ GIO_PIN28_ALT_VC_SPI0_2, - } GIO_PIN28_ALT; - - typedef enum { -- GIO_PIN29_ALT_MTSIF = 1, -- GIO_PIN29_ALT_PKT, -- GIO_PIN29_ALT_SC0, -- GIO_PIN29_ALT_ENET0_RGMII, -- GIO_PIN29_ALT_VC_UART4, -- GIO_PIN29_ALT_VC_SPI5, -+ GIO_PIN29_ALT_ARM_JTAG = 1, -+ GIO_PIN29_ALT_VC_I2C0, -+ GIO_PIN29_ALT_VC_SPI0, - } GIO_PIN29_ALT; - - typedef enum { -- GIO_PIN30_ALT_MTSIF = 1, -- GIO_PIN30_ALT_PKT, -- GIO_PIN30_ALT_SC0, -- GIO_PIN30_ALT_SD2, -- GIO_PIN30_ALT_ENET0_RGMII, -+ GIO_PIN30_ALT_SD2 = 1, - GIO_PIN30_ALT_GPCLK0, - GIO_PIN30_ALT_VC_PWM0, - } GIO_PIN30_ALT; - - typedef enum { -- GIO_PIN31_ALT_MTSIF = 1, -- GIO_PIN31_ALT_PKT, -- GIO_PIN31_ALT_SC0, -- GIO_PIN31_ALT_SD2, -- GIO_PIN31_ALT_ENET0_RGMII, -+ GIO_PIN31_ALT_SD2 = 1, - GIO_PIN31_ALT_VC_SPI3, - GIO_PIN31_ALT_VC_PWM0, - } GIO_PIN31_ALT; - - typedef enum { -- GIO_PIN32_ALT_MTSIF = 1, -- GIO_PIN32_ALT_PKT, -- GIO_PIN32_ALT_SC0, -- GIO_PIN32_ALT_SD2, -- GIO_PIN32_ALT_ENET0_RGMII, -+ GIO_PIN32_ALT_SD2 = 1, - GIO_PIN32_ALT_VC_SPI3, - GIO_PIN32_ALT_VC_UART3, - } GIO_PIN32_ALT; - - typedef enum { -- GIO_PIN33_ALT_MTSIF = 1, -- GIO_PIN33_ALT_PKT, -- GIO_PIN33_ALT_SD2, -- GIO_PIN33_ALT_ENET0_RGMII, -+ GIO_PIN33_ALT_SD2 = 1, - GIO_PIN33_ALT_VC_SPI3, - GIO_PIN33_ALT_VC_UART3, - } GIO_PIN33_ALT; - - typedef enum { -- GIO_PIN34_ALT_MTSIF = 1, -- GIO_PIN34_ALT_PKT, -- GIO_PIN34_ALT_EXT_SC_CLK, -- GIO_PIN34_ALT_SD2, -- GIO_PIN34_ALT_ENET0_RGMII, -+ GIO_PIN34_ALT_SD2 = 1, - GIO_PIN34_ALT_VC_SPI3, - GIO_PIN34_ALT_VC_I2C5, - } GIO_PIN34_ALT; - - typedef enum { -- GIO_PIN35_ALT_MTSIF = 1, -- GIO_PIN35_ALT_PKT, -- GIO_PIN35_ALT_SD2, -- GIO_PIN35_ALT_ENET0_RGMII, -+ GIO_PIN35_ALT_SD2 = 1, - GIO_PIN35_ALT_VC_SPI3, - GIO_PIN35_ALT_VC_I2C5, - } GIO_PIN35_ALT; - --typedef enum { -- GIO_PIN36_ALT_SD0 = 1, -- GIO_PIN36_ALT_MTSIF, -- GIO_PIN36_ALT_SC0, -- GIO_PIN36_ALT_I2S_IN, -- GIO_PIN36_ALT_VC_UART3, -- GIO_PIN36_ALT_VC_UART2, --} GIO_PIN36_ALT; -- --typedef enum { -- GIO_PIN37_ALT_SD0 = 1, -- GIO_PIN37_ALT_MTSIF, -- GIO_PIN37_ALT_SC0, -- GIO_PIN37_ALT_VC_SPI0, -- GIO_PIN37_ALT_I2S_IN, -- GIO_PIN37_ALT_VC_UART3, -- GIO_PIN37_ALT_VC_UART2, --} GIO_PIN37_ALT; -- --typedef enum { -- GIO_PIN38_ALT_SD0 = 1, -- GIO_PIN38_ALT_MTSIF_ALT, -- GIO_PIN38_ALT_SC0, -- GIO_PIN38_ALT_VC_SPI0, -- GIO_PIN38_ALT_I2S_IN, -- GIO_PIN38_ALT_VC_UART3, -- GIO_PIN38_ALT_VC_UART2, --} GIO_PIN38_ALT; -- --typedef enum { -- GIO_PIN39_ALT_SD0 = 1, -- GIO_PIN39_ALT_MTSIF_ALT, -- GIO_PIN39_ALT_SC0, -- GIO_PIN39_ALT_VC_SPI0, -- GIO_PIN39_ALT_VC_UART3, -- GIO_PIN39_ALT_VC_UART2, --} GIO_PIN39_ALT; -- --typedef enum { -- GIO_PIN40_ALT_SD0 = 1, -- GIO_PIN40_ALT_MTSIF_ALT, -- GIO_PIN40_ALT_SC0, -- GIO_PIN40_ALT_VC_SPI0, -- GIO_PIN40_ALT_BSC_M3, --} GIO_PIN40_ALT; -- --typedef enum { -- GIO_PIN41_ALT_SD0 = 1, -- GIO_PIN41_ALT_MTSIF_ALT, -- GIO_PIN41_ALT_SC0, -- GIO_PIN41_ALT_VC_SPI0, -- GIO_PIN41_ALT_BSC_M3, --} GIO_PIN41_ALT; -- --typedef enum { -- GIO_PIN42_ALT_VC_SPI0 = 1, -- GIO_PIN42_ALT_MTSIF_ALT, -- GIO_PIN42_ALT_VC_I2C0, -- GIO_PIN42_ALT_SD_CARD_A, -- GIO_PIN42_ALT_MTSIF_ALT1, -- GIO_PIN42_ALT_ARM_JTAG, -- GIO_PIN42_ALT_PDM, -- GIO_PIN42_ALT_SPI_M, --} GIO_PIN42_ALT; -- --typedef enum { -- GIO_PIN43_ALT_VC_SPI0 = 1, -- GIO_PIN43_ALT_MTSIF_ALT, -- GIO_PIN43_ALT_VC_I2C0, -- GIO_PIN43_ALT_SD_CARD_A, -- GIO_PIN43_ALT_MTSIF_ALT1, -- GIO_PIN43_ALT_ARM_JTAG, -- GIO_PIN43_ALT_PDM, -- GIO_PIN43_ALT_SPI_M, --} GIO_PIN43_ALT; -- --typedef enum { -- GIO_PIN44_ALT_VC_SPI0 = 1, -- GIO_PIN44_ALT_MTSIF_ALT, -- GIO_PIN44_ALT_ENET0, -- GIO_PIN44_ALT_SD_CARD_A, -- GIO_PIN44_ALT_MTSIF_ALT1, -- GIO_PIN44_ALT_ARM_JTAG, -- GIO_PIN44_ALT_PDM, -- GIO_PIN44_ALT_SPI_M, --} GIO_PIN44_ALT; -- --typedef enum { -- GIO_PIN45_ALT_VC_SPI0 = 1, -- GIO_PIN45_ALT_MTSIF_ALT, -- GIO_PIN45_ALT_ENET0, -- GIO_PIN45_ALT_SD_CARD_A, -- GIO_PIN45_ALT_MTSIF_ALT1, -- GIO_PIN45_ALT_ARM_JTAG, -- GIO_PIN45_ALT_PDM, -- GIO_PIN45_ALT_SPI_M, --} GIO_PIN45_ALT; -- --typedef enum { -- GIO_PIN46_ALT_VC_SPI0 = 1, -- GIO_PIN46_ALT_MTSIF_ALT, -- GIO_PIN46_ALT_SD_CARD_A, -- GIO_PIN46_ALT_MTSIF_ALT1, -- GIO_PIN46_ALT_ARM_JTAG, -- GIO_PIN46_ALT_PDM, -- GIO_PIN46_ALT_SPI_M, --} GIO_PIN46_ALT; -- --typedef enum { -- GIO_PIN47_ALT_ENET0 = 1, -- GIO_PIN47_ALT_MTSIF_ALT, -- GIO_PIN47_ALT_I2S_OUT, -- GIO_PIN47_ALT_MTSIF_ALT1, -- GIO_PIN47_ALT_ARM_JTAG, --} GIO_PIN47_ALT; -- --typedef enum { -- GIO_PIN48_ALT_SC0 = 1, -- GIO_PIN48_ALT_USB_PWR, -- GIO_PIN48_ALT_SPDIF_OUT, -- GIO_PIN48_ALT_MTSIF, --} GIO_PIN48_ALT; -- --typedef enum { -- GIO_PIN49_ALT_SC0 = 1, -- GIO_PIN49_ALT_USB_PWR, -- GIO_PIN49_ALT_AUD_FS_CLK0, -- GIO_PIN49_ALT_MTSIF, --} GIO_PIN49_ALT; -- --typedef enum { -- GIO_PIN50_ALT_SC0 = 1, -- GIO_PIN50_ALT_USB_VBUS, -- GIO_PIN50_ALT_SC0_2, --} GIO_PIN50_ALT; -- --typedef enum { -- GIO_PIN51_ALT_SC0 = 1, -- GIO_PIN51_ALT_ENET0, -- GIO_PIN51_ALT_SC0_2, -- GIO_PIN51_ALT_SR_EDM_SENSE, --} GIO_PIN51_ALT; -- --typedef enum { -- GIO_PIN52_ALT_SC0 = 1, -- GIO_PIN52_ALT_ENET0, -- GIO_PIN52_ALT_VC_PWM1, --} GIO_PIN52_ALT; -- --typedef enum { -- GIO_PIN53_ALT_SC0 = 1, -- GIO_PIN53_ALT_ENET0_RGMII, -- GIO_PIN53_ALT_EXT_SC_CLK, --} GIO_PIN53_ALT; -- - // - // General Input/Output Always ON (GIO AON) - // - typedef enum { - GIO_AON_PIN0_ALT_IR_IN = 1, - GIO_AON_PIN0_ALT_VC_SPI0, -- GIO_AON_PIN0_ALT_VC_UART3, -+ GIO_AON_PIN0_ALT_VC_UART0, - GIO_AON_PIN0_ALT_VC_I2C3, -- GIO_AON_PIN0_ALT_TE0, -+ GIO_AON_PIN0_ALT_UART0, - GIO_AON_PIN0_ALT_VC_I2C0, - } GIO_AON_PIN0_ALT; - - typedef enum { - GIO_AON_PIN1_ALT_VC_PWM0 = 1, - GIO_AON_PIN1_ALT_VC_SPI0, -- GIO_AON_PIN1_ALT_VC_UART3, -+ GIO_AON_PIN1_ALT_VC_UART0, - GIO_AON_PIN1_ALT_VC_I2C3, -- GIO_AON_PIN1_ALT_TE1, -+ GIO_AON_PIN1_ALT_UART0, - GIO_AON_PIN1_ALT_AON_PWM, - GIO_AON_PIN1_ALT_VC_I2C0, - GIO_AON_PIN1_ALT_VC_PWM1, -@@ -569,9 +261,9 @@ typedef enum { - typedef enum { - GIO_AON_PIN2_ALT_VC_PWM0 = 1, - GIO_AON_PIN2_ALT_VC_SPI0, -- GIO_AON_PIN2_ALT_VC_UART3, -+ GIO_AON_PIN2_ALT_VC_UART0, - GIO_AON_PIN2_ALT_CTL_HDMI_5V, -- GIO_AON_PIN2_ALT_FL0, -+ GIO_AON_PIN2_ALT_UART0, - GIO_AON_PIN2_ALT_AON_PWM, - GIO_AON_PIN2_ALT_IR_IN, - GIO_AON_PIN2_ALT_VC_PWM1, -@@ -580,9 +272,8 @@ typedef enum { - typedef enum { - GIO_AON_PIN3_ALT_IR_IN = 1, - GIO_AON_PIN3_ALT_VC_SPI0, -- GIO_AON_PIN3_ALT_VC_UART3, -- GIO_AON_PIN3_ALT_AON_FP_4SEC_RESETB, -- GIO_AON_PIN3_ALT_FL1, -+ GIO_AON_PIN3_ALT_VC_UART0, -+ GIO_AON_PIN3_ALT_UART0, - GIO_AON_PIN3_ALT_SD_CARD_G, - GIO_AON_PIN3_ALT_AON_GPCLK, - } GIO_AON_PIN3_ALT; -@@ -590,8 +281,6 @@ typedef enum { - typedef enum { - GIO_AON_PIN4_ALT_GPCLK0 = 1, - GIO_AON_PIN4_ALT_VC_SPI0, -- GIO_AON_PIN4_ALT_VC_I2CSL, -- GIO_AON_PIN4_ALT_AON_GPCLK, - GIO_AON_PIN4_ALT_PM_LED_OUT, - GIO_AON_PIN4_ALT_AON_PWM, - GIO_AON_PIN4_ALT_SD_CARD_G, -@@ -601,8 +290,6 @@ typedef enum { - typedef enum { - GIO_AON_PIN5_ALT_GPCLK1 = 1, - GIO_AON_PIN5_ALT_IR_IN, -- GIO_AON_PIN5_ALT_VC_I2CSL, -- GIO_AON_PIN5_ALT_CLK_OBSERVE, - GIO_AON_PIN5_ALT_AON_PWM, - GIO_AON_PIN5_ALT_SD_CARD_G, - GIO_AON_PIN5_ALT_VC_PWM0, -@@ -610,79 +297,45 @@ typedef enum { - - typedef enum { - GIO_AON_PIN6_ALT_UART1 = 1, -- GIO_AON_PIN6_ALT_VC_UART4, -- GIO_AON_PIN6_ALT_GPCLK2, -+ GIO_AON_PIN6_ALT_VC_UART2, - GIO_AON_PIN6_ALT_CTL_HDMI_5V, -- GIO_AON_PIN6_ALT_VC_UART0, -+ GIO_AON_PIN6_ALT_GPCLK2, - GIO_AON_PIN6_ALT_VC_SPI3, - } GIO_AON_PIN6_ALT; - --typedef enum { -- GIO_AON_PIN7_ALT_UART1 = 1, -- GIO_AON_PIN7_ALT_VC_UART4, -- GIO_AON_PIN7_ALT_GPCLK0, -- GIO_AON_PIN7_ALT_AON_PWM, -- GIO_AON_PIN7_ALT_VC_UART0, -- GIO_AON_PIN7_ALT_VC_SPI3, --} GIO_AON_PIN7_ALT; -- - typedef enum { - GIO_AON_PIN8_ALT_UART1 = 1, -- GIO_AON_PIN8_ALT_VC_UART4, -- GIO_AON_PIN8_ALT_VC_I2CSL, -+ GIO_AON_PIN8_ALT_VC_UART2, - GIO_AON_PIN8_ALT_CTL_HDMI_5V, -- GIO_AON_PIN8_ALT_VC_UART0, -+ GIO_AON_PIN8_ALT_VC_SPI0, - GIO_AON_PIN8_ALT_VC_SPI3, - } GIO_AON_PIN8_ALT; - - typedef enum { - GIO_AON_PIN9_ALT_UART1 = 1, -- GIO_AON_PIN9_ALT_VC_UART4, -- GIO_AON_PIN9_ALT_VC_I2CSL, -- GIO_AON_PIN9_ALT_AON_PWM, -+ GIO_AON_PIN9_ALT_VC_UART2, - GIO_AON_PIN9_ALT_VC_UART0, -+ GIO_AON_PIN9_ALT_AON_PWM, -+ GIO_AON_PIN9_ALT_VC_SPI0, -+ GIO_AON_PIN9_ALT_VC_UART2_2, - GIO_AON_PIN9_ALT_VC_SPI3, - } GIO_AON_PIN9_ALT; - - typedef enum { -- GIO_AON_PIN10_ALT_TSIO = 1, -- GIO_AON_PIN10_ALT_CTL_HDMI_5V, -- GIO_AON_PIN10_ALT_SC0, -- GIO_AON_PIN10_ALT_SPDIF_OUT, -- GIO_AON_PIN10_ALT_VC_SPI5, -- GIO_AON_PIN10_ALT_USB_PWR, -- GIO_AON_PIN10_ALT_AON_GPCLK, -- GIO_AON_PIN10_ALT_SD_CARD_F, --} GIO_AON_PIN10_ALT; -- --typedef enum { -- GIO_AON_PIN11_ALT_TSIO = 1, -- GIO_AON_PIN11_ALT_UART0, -- GIO_AON_PIN11_ALT_SC0, -- GIO_AON_PIN11_ALT_AUD_FS_CLK0, -- GIO_AON_PIN11_ALT_VC_SPI5, -- GIO_AON_PIN11_ALT_USB_VBUS, -- GIO_AON_PIN11_ALT_VC_UART2, -- GIO_AON_PIN11_ALT_SD_CARD_F, --} GIO_AON_PIN11_ALT; -- --typedef enum { -- GIO_AON_PIN12_ALT_TSIO = 1, -- GIO_AON_PIN12_ALT_UART0, -+ GIO_AON_PIN12_ALT_UART1 = 1, -+ GIO_AON_PIN12_ALT_VC_UART2, - GIO_AON_PIN12_ALT_VC_UART0, -- GIO_AON_PIN12_ALT_TSIO_2, -- GIO_AON_PIN12_ALT_VC_SPI5, -+ GIO_AON_PIN12_ALT_VC_SPI0, - GIO_AON_PIN12_ALT_USB_PWR, -- GIO_AON_PIN12_ALT_VC_UART2, -- GIO_AON_PIN12_ALT_SD_CARD_F, -+ GIO_AON_PIN12_ALT_VC_UART2_2, -+ GIO_AON_PIN12_ALT_VC_SPI3, - } GIO_AON_PIN12_ALT; - - typedef enum { - GIO_AON_PIN13_ALT_BSC_M1 = 1, -- GIO_AON_PIN13_ALT_UART0, - GIO_AON_PIN13_ALT_VC_UART0, - GIO_AON_PIN13_ALT_UUI, -- GIO_AON_PIN13_ALT_VC_SPI5, -+ GIO_AON_PIN13_ALT_VC_SPI0, - GIO_AON_PIN13_ALT_ARM_JTAG, - GIO_AON_PIN13_ALT_VC_UART2, - GIO_AON_PIN13_ALT_VC_I2C3, -@@ -690,75 +343,55 @@ typedef enum { - - typedef enum { - GIO_AON_PIN14_ALT_BSC_M1 = 1, -- GIO_AON_PIN14_ALT_UART0, -+ GIO_AON_PIN14_ALT_AON_GPCLK, - GIO_AON_PIN14_ALT_VC_UART0, - GIO_AON_PIN14_ALT_UUI, -- GIO_AON_PIN14_ALT_VC_SPI5, -+ GIO_AON_PIN14_ALT_VC_SPI0, - GIO_AON_PIN14_ALT_ARM_JTAG, - GIO_AON_PIN14_ALT_VC_UART2, - GIO_AON_PIN14_ALT_VC_I2C3, - } GIO_AON_PIN14_ALT; - - typedef enum { -- GIO_AON_PIN15_ALT_IR_IN = 1, -- GIO_AON_PIN15_ALT_AON_FP_4SEC_RESETB, -- GIO_AON_PIN15_ALT_VC_UART0, -- GIO_AON_PIN15_ALT_PM_LED_OUT, -- GIO_AON_PIN15_ALT_CTL_HDMI_5V, -- GIO_AON_PIN15_ALT_AON_PWM, -- GIO_AON_PIN15_ALT_AON_GPCLK, -+ GIO_AON_PIN15_ALT_HDMI_TX0_BSC = 1, -+ GIO_AON_PIN15_ALT_HDMI_TX0_AUTO_I2C, -+ GIO_AON_PIN15_ALT_BSC_M0, -+ GIO_AON_PIN15_ALT_VC_I2C0, - } GIO_AON_PIN15_ALT; - - typedef enum { -- GIO_AON_PIN16_ALT_AON_CPU_STANDBYB = 1, -- GIO_AON_PIN16_ALT_GPCLK0, -- GIO_AON_PIN16_ALT_PM_LED_OUT, -- GIO_AON_PIN16_ALT_CTL_HDMI_5V, -- GIO_AON_PIN16_ALT_VC_PWM0, -- GIO_AON_PIN16_ALT_USB_PWR, -- GIO_AON_PIN16_ALT_AUD_FS_CLK0, -+ GIO_AON_PIN16_ALT_HDMI_TX0_BSC = 1, -+ GIO_AON_PIN16_ALT_HDMI_TX0_AUTO_I2C, -+ GIO_AON_PIN16_ALT_BSC_M0, -+ GIO_AON_PIN16_ALT_VC_I2C0, - } GIO_AON_PIN16_ALT; - - typedef enum { -- GIO_AON_PIN17_ALT_HDMI_TX0_BSC = 1, -- GIO_AON_PIN17_ALT_HDMI_TX0_AUTO_I2C, -- GIO_AON_PIN17_ALT_BSC_M0, -+ GIO_AON_PIN17_ALT_HDMI_TX1_BSC = 1, -+ GIO_AON_PIN17_ALT_HDMI_TX1_AUTO_I2C, -+ GIO_AON_PIN17_ALT_BSC_M1, - GIO_AON_PIN17_ALT_VC_I2C0, -+ GIO_AON_PIN17_ALT_CTL_HDMI_5V, - } GIO_AON_PIN17_ALT; - - typedef enum { -- GIO_AON_PIN18_ALT_HDMI_TX0_BSC = 1, -- GIO_AON_PIN18_ALT_HDMI_TX0_AUTO_I2C, -- GIO_AON_PIN18_ALT_BSC_M0, -+ GIO_AON_PIN18_ALT_HDMI_TX1_BSC = 1, -+ GIO_AON_PIN18_ALT_HDMI_TX1_AUTO_I2C, -+ GIO_AON_PIN18_ALT_BSC_M1, - GIO_AON_PIN18_ALT_VC_I2C0, - } GIO_AON_PIN18_ALT; - - typedef enum { -- GIO_AON_PIN19_ALT_HDMI_TX1_BSC = 1, -- GIO_AON_PIN19_ALT_HDMI_TX1_AUTO_I2C, -- GIO_AON_PIN19_ALT_BSC_M1, -- GIO_AON_PIN19_ALT_VC_I2C4, -+ GIO_AON_PIN19_ALT_AVS_PMU_BSC = 1, -+ GIO_AON_PIN19_ALT_BSC_M2, -+ GIO_AON_PIN19_ALT_VC_I2C3, - GIO_AON_PIN19_ALT_CTL_HDMI_5V, - } GIO_AON_PIN19_ALT; - - typedef enum { -- GIO_AON_PIN20_ALT_HDMI_TX1_BSC = 1, -- GIO_AON_PIN20_ALT_HDMI_TX1_AUTO_I2C, -- GIO_AON_PIN20_ALT_BSC_M1, -- GIO_AON_PIN20_ALT_VC_I2C4, -+ GIO_AON_PIN20_ALT_AVS_PMU_BSC = 1, -+ GIO_AON_PIN20_ALT_BSC_M2, -+ GIO_AON_PIN20_ALT_VC_I2C3, - } GIO_AON_PIN20_ALT; - --typedef enum { -- GIO_AON_PIN21_ALT_AVS_PMU_BSC = 1, -- GIO_AON_PIN21_ALT_BSC_M2, -- GIO_AON_PIN21_ALT_VC_I2C5, -- GIO_AON_PIN21_ALT_CTL_HDMI_5V, --} GIO_AON_PIN21_ALT; -- --typedef enum { -- GIO_AON_PIN22_ALT_AVS_PMU_BSC = 1, -- GIO_AON_PIN22_ALT_BSC_M2, -- GIO_AON_PIN22_ALT_VC_I2C5, --} GIO_AON_PIN22_ALT; -- - #endif // __BCM2712_PINCTRL_H__ -diff --git a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.c b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.c -index 2d9019ed..266f7878 100644 ---- a/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.c -+++ b/Silicon/Broadcom/Bcm27xx/Library/Bcm2712GpioLib/Bcm2712GpioLib.c -@@ -41,91 +41,73 @@ typedef struct { - } BCM2712_GPIO_CONTROLLER; - - STATIC BCM2712_PINCTRL_REGISTERS Bcm2712PinctrlGioRegisters[] = { -- [0] = { .MuxReg = 0x0, .MuxBit = 0, .CtlReg = 0x1C, .CtlBit = 14 }, -- [1] = { .MuxReg = 0x0, .MuxBit = 4, .CtlReg = 0x1C, .CtlBit = 16 }, -- [2] = { .MuxReg = 0x0, .MuxBit = 8, .CtlReg = 0x1C, .CtlBit = 18 }, -- [3] = { .MuxReg = 0x0, .MuxBit = 12, .CtlReg = 0x1C, .CtlBit = 20 }, -- [4] = { .MuxReg = 0x0, .MuxBit = 16, .CtlReg = 0x1C, .CtlBit = 22 }, -- [5] = { .MuxReg = 0x0, .MuxBit = 20, .CtlReg = 0x1C, .CtlBit = 24 }, -- [6] = { .MuxReg = 0x0, .MuxBit = 24, .CtlReg = 0x1C, .CtlBit = 26 }, -- [7] = { .MuxReg = 0x0, .MuxBit = 28, .CtlReg = 0x1C, .CtlBit = 28 }, -- [8] = { .MuxReg = 0x4, .MuxBit = 0, .CtlReg = 0x20, .CtlBit = 0 }, -- [9] = { .MuxReg = 0x4, .MuxBit = 4, .CtlReg = 0x20, .CtlBit = 2 }, -- [10] = { .MuxReg = 0x4, .MuxBit = 8, .CtlReg = 0x20, .CtlBit = 4 }, -- [11] = { .MuxReg = 0x4, .MuxBit = 12, .CtlReg = 0x20, .CtlBit = 6 }, -- [12] = { .MuxReg = 0x4, .MuxBit = 16, .CtlReg = 0x20, .CtlBit = 8 }, -- [13] = { .MuxReg = 0x4, .MuxBit = 20, .CtlReg = 0x20, .CtlBit = 10 }, -- [14] = { .MuxReg = 0x4, .MuxBit = 24, .CtlReg = 0x20, .CtlBit = 12 }, -- [15] = { .MuxReg = 0x4, .MuxBit = 28, .CtlReg = 0x20, .CtlBit = 14 }, -- [16] = { .MuxReg = 0x8, .MuxBit = 0, .CtlReg = 0x20, .CtlBit = 16 }, -- [17] = { .MuxReg = 0x8, .MuxBit = 4, .CtlReg = 0x20, .CtlBit = 18 }, -- [18] = { .MuxReg = 0x8, .MuxBit = 8, .CtlReg = 0x20, .CtlBit = 20 }, -- [19] = { .MuxReg = 0x8, .MuxBit = 12, .CtlReg = 0x20, .CtlBit = 22 }, -- [20] = { .MuxReg = 0x8, .MuxBit = 16, .CtlReg = 0x20, .CtlBit = 24 }, -- [21] = { .MuxReg = 0x8, .MuxBit = 20, .CtlReg = 0x20, .CtlBit = 26 }, -- [22] = { .MuxReg = 0x8, .MuxBit = 24, .CtlReg = 0x20, .CtlBit = 28 }, -- [23] = { .MuxReg = 0x8, .MuxBit = 28, .CtlReg = 0x24, .CtlBit = 0 }, -- [24] = { .MuxReg = 0xC, .MuxBit = 0, .CtlReg = 0x24, .CtlBit = 2 }, -- [25] = { .MuxReg = 0xC, .MuxBit = 4, .CtlReg = 0x24, .CtlBit = 4 }, -- [26] = { .MuxReg = 0xC, .MuxBit = 8, .CtlReg = 0x24, .CtlBit = 6 }, -- [27] = { .MuxReg = 0xC, .MuxBit = 12, .CtlReg = 0x24, .CtlBit = 8 }, -- [28] = { .MuxReg = 0xC, .MuxBit = 16, .CtlReg = 0x24, .CtlBit = 10 }, -- [29] = { .MuxReg = 0xC, .MuxBit = 20, .CtlReg = 0x24, .CtlBit = 12 }, -- [30] = { .MuxReg = 0xC, .MuxBit = 24, .CtlReg = 0x24, .CtlBit = 14 }, -- [31] = { .MuxReg = 0xC, .MuxBit = 28, .CtlReg = 0x24, .CtlBit = 16 }, -- [32] = { .MuxReg = 0x10, .MuxBit = 0, .CtlReg = 0x24, .CtlBit = 18 }, -- [33] = { .MuxReg = 0x10, .MuxBit = 4, .CtlReg = 0x24, .CtlBit = 20 }, -- [34] = { .MuxReg = 0x10, .MuxBit = 8, .CtlReg = 0x24, .CtlBit = 22 }, -- [35] = { .MuxReg = 0x10, .MuxBit = 12, .CtlReg = 0x24, .CtlBit = 24 }, -- [36] = { .MuxReg = 0x10, .MuxBit = 16, .CtlReg = 0x24, .CtlBit = 26 }, -- [37] = { .MuxReg = 0x10, .MuxBit = 20, .CtlReg = 0x24, .CtlBit = 28 }, -- [38] = { .MuxReg = 0x10, .MuxBit = 24, .CtlReg = 0x28, .CtlBit = 0 }, -- [39] = { .MuxReg = 0x10, .MuxBit = 28, .CtlReg = 0x28, .CtlBit = 2 }, -- [40] = { .MuxReg = 0x14, .MuxBit = 0, .CtlReg = 0x28, .CtlBit = 4 }, -- [41] = { .MuxReg = 0x14, .MuxBit = 4, .CtlReg = 0x28, .CtlBit = 6 }, -- [42] = { .MuxReg = 0x14, .MuxBit = 8, .CtlReg = 0x28, .CtlBit = 8 }, -- [43] = { .MuxReg = 0x14, .MuxBit = 12, .CtlReg = 0x28, .CtlBit = 10 }, -- [44] = { .MuxReg = 0x14, .MuxBit = 16, .CtlReg = 0x28, .CtlBit = 12 }, -- [45] = { .MuxReg = 0x14, .MuxBit = 20, .CtlReg = 0x28, .CtlBit = 14 }, -- [46] = { .MuxReg = 0x14, .MuxBit = 24, .CtlReg = 0x28, .CtlBit = 16 }, -- [47] = { .MuxReg = 0x14, .MuxBit = 28, .CtlReg = 0x28, .CtlBit = 18 }, -- [48] = { .MuxReg = 0x18, .MuxBit = 0, .CtlReg = 0x28, .CtlBit = 20 }, -- [49] = { .MuxReg = 0x18, .MuxBit = 4, .CtlReg = 0x28, .CtlBit = 22 }, -- [50] = { .MuxReg = 0x18, .MuxBit = 8, .CtlReg = 0x28, .CtlBit = 24 }, -- [51] = { .MuxReg = 0x18, .MuxBit = 12, .CtlReg = 0x28, .CtlBit = 26 }, -- [52] = { .MuxReg = 0x18, .MuxBit = 16, .CtlReg = 0x28, .CtlBit = 28 }, -- [53] = { .MuxReg = 0x18, .MuxBit = 20, .CtlReg = 0x2C, .CtlBit = 0 }, -- [54] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 2 }, -- [55] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 4 }, -- [56] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 6 }, -- [57] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 8 }, -- [58] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 10 }, -- [59] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 12 }, -- [60] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 14 }, -- [61] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 16 }, -- [62] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 18 }, -- [63] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 20 }, -- [64] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x2C, .CtlBit = 22 }, -+ [0] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [1] = { .MuxReg = 0x0, .MuxBit = 0, .CtlReg = 0x10, .CtlBit = 10 }, -+ [2] = { .MuxReg = 0x0, .MuxBit = 4, .CtlReg = 0x10, .CtlBit = 12 }, -+ [3] = { .MuxReg = 0x0, .MuxBit = 8, .CtlReg = 0x10, .CtlBit = 14 }, -+ [4] = { .MuxReg = 0x0, .MuxBit = 12, .CtlReg = 0x10, .CtlBit = 16 }, -+ [5] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [6] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [7] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [8] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [9] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [10] = { .MuxReg = 0x0, .MuxBit = 16, .CtlReg = 0x10, .CtlBit = 18 }, -+ [11] = { .MuxReg = 0x0, .MuxBit = 20, .CtlReg = 0x10, .CtlBit = 20 }, -+ [12] = { .MuxReg = 0x0, .MuxBit = 24, .CtlReg = 0x10, .CtlBit = 22 }, -+ [13] = { .MuxReg = 0x0, .MuxBit = 28, .CtlReg = 0x10, .CtlBit = 24 }, -+ [14] = { .MuxReg = 0x4, .MuxBit = 0, .CtlReg = 0x10, .CtlBit = 26 }, -+ [15] = { .MuxReg = 0x4, .MuxBit = 4, .CtlReg = 0x10, .CtlBit = 28 }, -+ [16] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [17] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [18] = { .MuxReg = 0x4, .MuxBit = 8, .CtlReg = 0x14, .CtlBit = 0 }, -+ [19] = { .MuxReg = 0x4, .MuxBit = 12, .CtlReg = 0x14, .CtlBit = 2 }, -+ [20] = { .MuxReg = 0x4, .MuxBit = 16, .CtlReg = 0x14, .CtlBit = 4 }, -+ [21] = { .MuxReg = 0x4, .MuxBit = 20, .CtlReg = 0x14, .CtlBit = 6 }, -+ [22] = { .MuxReg = 0x4, .MuxBit = 24, .CtlReg = 0x14, .CtlBit = 8 }, -+ [23] = { .MuxReg = 0x4, .MuxBit = 28, .CtlReg = 0x14, .CtlBit = 10 }, -+ [24] = { .MuxReg = 0x8, .MuxBit = 0, .CtlReg = 0x14, .CtlBit = 12 }, -+ [25] = { .MuxReg = 0x8, .MuxBit = 4, .CtlReg = 0x14, .CtlBit = 14 }, -+ [26] = { .MuxReg = 0x8, .MuxBit = 8, .CtlReg = 0x14, .CtlBit = 16 }, -+ [27] = { .MuxReg = 0x8, .MuxBit = 12, .CtlReg = 0x14, .CtlBit = 18 }, -+ [28] = { .MuxReg = 0x8, .MuxBit = 16, .CtlReg = 0x14, .CtlBit = 20 }, -+ [29] = { .MuxReg = 0x8, .MuxBit = 20, .CtlReg = 0x14, .CtlBit = 22 }, -+ [30] = { .MuxReg = 0x8, .MuxBit = 24, .CtlReg = 0x14, .CtlBit = 24 }, -+ [31] = { .MuxReg = 0x8, .MuxBit = 28, .CtlReg = 0x14, .CtlBit = 26 }, -+ [32] = { .MuxReg = 0xC, .MuxBit = 0, .CtlReg = 0x14, .CtlBit = 28 }, -+ [33] = { .MuxReg = 0xC, .MuxBit = 4, .CtlReg = 0x18, .CtlBit = 0 }, -+ [34] = { .MuxReg = 0xC, .MuxBit = 8, .CtlReg = 0x18, .CtlBit = 2 }, -+ [35] = { .MuxReg = 0xC, .MuxBit = 12, .CtlReg = 0x18, .CtlBit = 4 }, -+ [36] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 6 }, -+ [37] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 8 }, -+ [38] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 10 }, -+ [39] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 12 }, -+ [40] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 14 }, -+ [41] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 16 }, -+ [42] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 18 }, -+ [43] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 20 }, -+ [44] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 22 }, -+ [45] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 24 }, -+ [46] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 26 }, - }; - - STATIC BCM2712_PINCTRL_REGISTERS Bcm2712PinctrlGioAonRegisters[] = { -- [0] = { .MuxReg = 0xC, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 20 }, -- [1] = { .MuxReg = 0xC, .MuxBit = 4, .CtlReg = 0x18, .CtlBit = 22 }, -- [2] = { .MuxReg = 0xC, .MuxBit = 8, .CtlReg = 0x18, .CtlBit = 24 }, -- [3] = { .MuxReg = 0xC, .MuxBit = 12, .CtlReg = 0x18, .CtlBit = 26 }, -- [4] = { .MuxReg = 0xC, .MuxBit = 16, .CtlReg = 0x18, .CtlBit = 28 }, -- [5] = { .MuxReg = 0xC, .MuxBit = 20, .CtlReg = 0x1C, .CtlBit = 0 }, -- [6] = { .MuxReg = 0xC, .MuxBit = 24, .CtlReg = 0x1C, .CtlBit = 2 }, -- [7] = { .MuxReg = 0xC, .MuxBit = 28, .CtlReg = 0x1C, .CtlBit = 4 }, -- [8] = { .MuxReg = 0x10, .MuxBit = 0, .CtlReg = 0x1C, .CtlBit = 6 }, -- [9] = { .MuxReg = 0x10, .MuxBit = 4, .CtlReg = 0x1C, .CtlBit = 8 }, -- [10] = { .MuxReg = 0x10, .MuxBit = 8, .CtlReg = 0x1C, .CtlBit = 10 }, -- [11] = { .MuxReg = 0x10, .MuxBit = 12, .CtlReg = 0x1C, .CtlBit = 12 }, -- [12] = { .MuxReg = 0x10, .MuxBit = 16, .CtlReg = 0x1C, .CtlBit = 14 }, -- [13] = { .MuxReg = 0x10, .MuxBit = 20, .CtlReg = 0x1C, .CtlBit = 16 }, -- [14] = { .MuxReg = 0x10, .MuxBit = 24, .CtlReg = 0x1C, .CtlBit = 18 }, -- [15] = { .MuxReg = 0x10, .MuxBit = 28, .CtlReg = 0x1C, .CtlBit = 20 }, -- [16] = { .MuxReg = 0x14, .MuxBit = 0, .CtlReg = 0x1C, .CtlBit = 22 }, -+ [0] = { .MuxReg = 0xC, .MuxBit = 0, .CtlReg = 0x14, .CtlBit = 18 }, -+ [1] = { .MuxReg = 0xC, .MuxBit = 4, .CtlReg = 0x14, .CtlBit = 20 }, -+ [2] = { .MuxReg = 0xC, .MuxBit = 8, .CtlReg = 0x14, .CtlBit = 22 }, -+ [3] = { .MuxReg = 0xC, .MuxBit = 12, .CtlReg = 0x14, .CtlBit = 24 }, -+ [4] = { .MuxReg = 0xC, .MuxBit = 16, .CtlReg = 0x14, .CtlBit = 26 }, -+ [5] = { .MuxReg = 0xC, .MuxBit = 20, .CtlReg = 0x14, .CtlBit = 28 }, -+ [6] = { .MuxReg = 0xC, .MuxBit = 24, .CtlReg = 0x18, .CtlBit = 0 }, -+ [7] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [8] = { .MuxReg = 0xC, .MuxBit = 28, .CtlReg = 0x18, .CtlBit = 2 }, -+ [9] = { .MuxReg = 0x10, .MuxBit = 0, .CtlReg = 0x18, .CtlBit = 4 }, -+ [10] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [11] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [12] = { .MuxReg = 0x10, .MuxBit = 4, .CtlReg = 0x18, .CtlBit = 6 }, -+ [13] = { .MuxReg = 0x10, .MuxBit = 8, .CtlReg = 0x18, .CtlBit = 8 }, -+ [14] = { .MuxReg = 0x10, .MuxBit = 12, .CtlReg = 0x18, .CtlBit = 10 }, -+ [15] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, -+ [16] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, - [17] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, - [18] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, - [19] = { .MuxReg = PINCTRL_REG_UNUSED, .MuxBit = 0, .CtlReg = PINCTRL_REG_UNUSED, .CtlBit = 0 }, --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0019-Update-DisplayDxe.c.patch b/packages/edk2/patches/platforms/0019-Update-DisplayDxe.c.patch deleted file mode 100644 index 5823b8c..0000000 --- a/packages/edk2/patches/platforms/0019-Update-DisplayDxe.c.patch +++ /dev/null @@ -1,48 +0,0 @@ -From deaab4b9f67f7fbfd982a7f43485c2bceba1e9b9 Mon Sep 17 00:00:00 2001 -From: MattP <63603528+NumberOneGit@users.noreply.github.com> -Date: Thu, 8 May 2025 14:40:25 -0400 -Subject: [PATCH 19/29] Update DisplayDxe.c - -Fill reserved bit to enable FB ---- - Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.c b/Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.c -index 3eba98e5..800f7a90 100644 ---- a/Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.c -+++ b/Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.c -@@ -211,6 +211,7 @@ ClearScreen ( - Fill.Red = 0x00; - Fill.Green = 0x00; - Fill.Blue = 0x00; -+ Fill.Reserved = 0xFF; - This->Blt (This, &Fill, EfiBltVideoFill, - 0, 0, 0, 0, This->Mode->Info->HorizontalResolution, - This->Mode->Info->VerticalResolution, -@@ -319,6 +320,7 @@ DisplayBlt ( - - for (i = 0; i < Height; i++) { - VidBuf = POS_TO_FB (DestinationX, DestinationY + i); -+ ((EFI_GRAPHICS_OUTPUT_BLT_PIXEL*)BltBuf)->Reserved = 0xFF; - - SetMem32 (VidBuf, Width * PI3_BYTES_PER_PIXEL, *(UINT32*)BltBuf); - } -@@ -345,6 +347,14 @@ DisplayBlt ( - } - - for (i = 0; i < Height; i++) { -+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL *PixelRow = (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) -+ ((UINTN)BltBuffer + (SourceY + i) * Delta + SourceX * PI3_BYTES_PER_PIXEL); -+ -+ for (UINTN x = 0; x < Width; x++) { -+ if (PixelRow[x].Reserved != 0xFF) { -+ PixelRow[x].Reserved = 0xFF; -+ } -+ } - VidBuf = POS_TO_FB (DestinationX, DestinationY + i); - BltBuf = (UINT8*)((UINTN)BltBuffer + (SourceY + i) * Delta + - SourceX * PI3_BYTES_PER_PIXEL); --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0020-Update-BoardRevisionHelperLib.c.patch b/packages/edk2/patches/platforms/0020-Update-BoardRevisionHelperLib.c.patch deleted file mode 100644 index be658bb..0000000 --- a/packages/edk2/patches/platforms/0020-Update-BoardRevisionHelperLib.c.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 9b95eaff168da17f97a8c014b5461d449bc93bea Mon Sep 17 00:00:00 2001 -From: MattP <63603528+NumberOneGit@users.noreply.github.com> -Date: Sat, 10 May 2025 03:25:34 -0400 -Subject: [PATCH 20/29] Update BoardRevisionHelperLib.c - -fix line ending ---- - .../Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -index 40143c5b..24d8a801 100644 ---- a/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -+++ b/Platform/RaspberryPi/Library/BoardRevisionHelperLib/BoardRevisionHelperLib.c -@@ -112,9 +112,9 @@ BoardRevisionGetModelName ( - case 0x18: - return "Raspberry Pi Compute Module 5"; - case 0x19: -- return "Raspberry Pi 500" -- case 0x1a: -- return "Raspberry Pi Compute Module 5 Lite" -+ return "Raspberry Pi 500"; -+ case 0x1A: -+ return "Raspberry Pi Compute Module 5 Lite"; - } - } - return "Unknown Raspberry Pi Model"; --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0021-Adjust-UART-interrupt-for-D0.patch b/packages/edk2/patches/platforms/0021-Adjust-UART-interrupt-for-D0.patch deleted file mode 100644 index fda47c2..0000000 --- a/packages/edk2/patches/platforms/0021-Adjust-UART-interrupt-for-D0.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 5654030569418c46e5a46066c495d4fad852b4f8 Mon Sep 17 00:00:00 2001 -From: MattP <63603528+NumberOneGit@users.noreply.github.com> -Date: Mon, 9 Jun 2025 22:19:24 -0400 -Subject: [PATCH 21/29] Adjust UART interrupt for D0 - -D0 uses a different interrupt for UART0 ---- - Platform/RaspberryPi/RPi5/RPi5.dsc | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index ff9f5010..3aab6ea8 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -425,7 +425,7 @@ - - # UARTs - gArmPlatformTokenSpaceGuid.PL011UartClkInHz|44000000 -- gArmPlatformTokenSpaceGuid.PL011UartInterrupt|153 -+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt|152 - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x107d001000 - --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0022-Aug-28-edk2-needed.patch b/packages/edk2/patches/platforms/0022-Aug-28-edk2-needed.patch deleted file mode 100644 index 122ff87..0000000 --- a/packages/edk2/patches/platforms/0022-Aug-28-edk2-needed.patch +++ /dev/null @@ -1,701 +0,0 @@ -From e1b8435ed33b43cb6e9ae23adc24e1ce57dd57af Mon Sep 17 00:00:00 2001 -From: mattp -Date: Tue, 8 Jul 2025 14:24:04 -0400 -Subject: [PATCH 22/29] Aug 28 edk2 needed - ---- - .../VarBlockServiceDxe/VarBlockServiceDxe.c | 65 +++++--- - .../VarBlockServiceDxe/VarBlockServiceDxe.inf | 6 +- - .../MemoryInitPeiLib/MemoryInitPeiLib.c | 2 + - .../PlatformBootManagerLib/PlatformBm.c | 78 +++++++++ - .../PlatformBootManagerLib.inf | 6 + - .../RaspberryPi/Library/ResetLib/ResetLib.c | 151 ------------------ - .../RaspberryPi/Library/ResetLib/ResetLib.inf | 45 ------ - .../PlatformLib/AArch64/RaspberryPiHelper.S | 27 ---- - Platform/RaspberryPi/RPi5/RPi5.dsc | 23 +-- - Platform/RaspberryPi/RPi5/RPi5.fdf | 4 +- - Platform/RaspberryPi/RaspberryPi.dec | 1 - - 11 files changed, 152 insertions(+), 256 deletions(-) - delete mode 100644 Platform/RaspberryPi/Library/ResetLib/ResetLib.c - delete mode 100644 Platform/RaspberryPi/Library/ResetLib/ResetLib.inf - -diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.c b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.c -index 4071a3fc..bc8ab227 100644 ---- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.c -+++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.c -@@ -10,6 +10,8 @@ - - #include "VarBlockService.h" - -+#include -+ - // - // Minimum delay to enact before reset, when variables are dirty (in μs). - // Needed to ensure that SSD-based USB 3.0 devices have time to flush their -@@ -51,6 +53,8 @@ InstallProtocolInterfaces ( - &FvbDevice->FwVolBlockInstance, - &gEfiDevicePathProtocolGuid, - FvbDevice->DevicePath, -+ &gEdkiiNvVarStoreFormattedGuid, -+ NULL, - NULL - ); - ASSERT_EFI_ERROR (Status); -@@ -159,10 +163,8 @@ DoDump ( - - STATIC - VOID --EFIAPI - DumpVars ( -- IN EFI_EVENT Event, -- IN VOID *Context -+ VOID - ) - { - EFI_STATUS Status; -@@ -200,6 +202,29 @@ DumpVars ( - mFvInstance->Dirty = FALSE; - } - -+STATIC -+VOID -+EFIAPI -+DumpVarsOnEvent ( -+ IN EFI_EVENT Event, -+ IN VOID *Context -+ ) -+{ -+ DumpVars (); -+} -+ -+STATIC -+VOID -+EFIAPI -+DumpVarsOnReset ( -+ IN EFI_RESET_TYPE ResetType, -+ IN EFI_STATUS ResetStatus, -+ IN UINTN DataSize, -+ IN VOID *ResetData OPTIONAL -+ ) -+{ -+ DumpVars (); -+} - - VOID - ReadyToBootHandler ( -@@ -214,7 +239,7 @@ ReadyToBootHandler ( - Status = gBS->CreateEvent ( - EVT_NOTIFY_SIGNAL, - TPL_CALLBACK, -- DumpVars, -+ DumpVarsOnEvent, - NULL, - &ImageInstallEvent - ); -@@ -227,7 +252,7 @@ ReadyToBootHandler ( - ); - ASSERT_EFI_ERROR (Status); - -- DumpVars (NULL, NULL); -+ DumpVars (); - Status = gBS->CloseEvent (Event); - ASSERT_EFI_ERROR (Status); - } -@@ -238,19 +263,9 @@ InstallDumpVarEventHandlers ( - VOID - ) - { -- EFI_STATUS Status; -- EFI_EVENT ResetEvent; -- EFI_EVENT ReadyToBootEvent; -- -- Status = gBS->CreateEventEx ( -- EVT_NOTIFY_SIGNAL, -- TPL_CALLBACK, -- DumpVars, -- NULL, -- &gRaspberryPiEventResetGuid, -- &ResetEvent -- ); -- ASSERT_EFI_ERROR (Status); -+ EFI_STATUS Status; -+ EFI_EVENT ReadyToBootEvent; -+ EFI_RESET_NOTIFICATION_PROTOCOL *ResetNotify; - - Status = gBS->CreateEventEx ( - EVT_NOTIFY_SIGNAL, -@@ -261,6 +276,20 @@ InstallDumpVarEventHandlers ( - &ReadyToBootEvent - ); - ASSERT_EFI_ERROR (Status); -+ -+ Status = gBS->LocateProtocol ( -+ &gEfiResetNotificationProtocolGuid, -+ NULL, -+ (VOID **)&ResetNotify -+ ); -+ ASSERT_EFI_ERROR (Status); -+ if (!EFI_ERROR (Status)) { -+ Status = ResetNotify->RegisterResetNotify ( -+ ResetNotify, -+ DumpVarsOnReset -+ ); -+ ASSERT_EFI_ERROR (Status); -+ } - } - - -diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.inf b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.inf -index c2edb25b..d15671af 100644 ---- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.inf -+++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.inf -@@ -34,6 +34,7 @@ - - [Packages] - ArmPkg/ArmPkg.dec -+ EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - Platform/RaspberryPi/RaspberryPi.dec -@@ -51,8 +52,8 @@ - UefiRuntimeLib - - [Guids] -+ gEdkiiNvVarStoreFormattedGuid ## PRODUCES ## PROTOCOL - gEfiEventVirtualAddressChangeGuid -- gRaspberryPiEventResetGuid - gEfiEventReadyToBootGuid - - [Protocols] -@@ -61,6 +62,7 @@ - gEfiBlockIoProtocolGuid - gEfiFirmwareVolumeBlockProtocolGuid # PROTOCOL SOMETIMES_PRODUCED - gEfiDevicePathProtocolGuid # PROTOCOL SOMETIMES_PRODUCED -+ gEfiResetNotificationProtocolGuid - - [FixedPcd] - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize -@@ -85,4 +87,4 @@ - [FeaturePcd] - - [Depex] -- TRUE -+ gEfiResetNotificationProtocolGuid -diff --git a/Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.c b/Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.c -index 7ba1cc56..cf9eca2f 100644 ---- a/Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.c -+++ b/Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.c -@@ -51,6 +51,8 @@ AddBasicMemoryRegion ( - EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | - EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | - EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | -+ EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTABLE | -+ EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE | - EFI_RESOURCE_ATTRIBUTE_TESTED, - Desc->PhysicalBase, - Desc->Length -diff --git a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c -index 1a0fcbf8..daa4e6ae 100644 ---- a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c -+++ b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -25,6 +26,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -527,6 +529,66 @@ SerialConPrint ( - } - } - -+/** -+ Disconnect everything. -+ Modified from the UEFI 2.3 spec (May 2009 version) -+ -+**/ -+STATIC -+VOID -+DisconnectAll ( -+ VOID -+ ) -+{ -+ EFI_STATUS Status; -+ UINTN HandleCount; -+ EFI_HANDLE *HandleBuffer; -+ UINTN HandleIndex; -+ -+ /* -+ * Retrieve the list of all handles from the handle database -+ */ -+ Status = gBS->LocateHandleBuffer ( -+ AllHandles, -+ NULL, -+ NULL, -+ &HandleCount, -+ &HandleBuffer -+ ); -+ if (EFI_ERROR (Status)) { -+ return; -+ } -+ -+ for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) { -+ gBS->DisconnectController (HandleBuffer[HandleIndex], NULL, NULL); -+ } -+ -+ gBS->FreePool(HandleBuffer); -+} -+ -+ -+STATIC -+VOID -+EFIAPI -+OnResetNotify ( -+ IN EFI_RESET_TYPE ResetType, -+ IN EFI_STATUS ResetStatus, -+ IN UINTN DataSize, -+ IN VOID *ResetData OPTIONAL -+ ) -+{ -+ UINT32 Delay; -+ -+ DisconnectAll (); -+ -+ Delay = PcdGet32 (PcdPlatformResetDelay); -+ if (Delay != 0) { -+ DEBUG ((DEBUG_INFO, "Platform will be reset in %d.%d seconds...\n", -+ Delay / 1000000, (Delay % 1000000) / 100000)); -+ MicroSecondDelay (Delay); -+ } -+} -+ - // - // BDS Platform Functions - // -@@ -549,6 +611,7 @@ PlatformBootManagerBeforeConsole ( - { - EFI_STATUS Status; - ESRT_MANAGEMENT_PROTOCOL *EsrtManagement; -+ EDKII_PLATFORM_SPECIFIC_RESET_HANDLER_PROTOCOL *ResetNotify; - - if (GetBootModeHob () == BOOT_ON_FLASH_UPDATE) { - DEBUG ((DEBUG_INFO, "ProcessCapsules Before EndOfDxe ......\n")); -@@ -582,6 +645,21 @@ PlatformBootManagerBeforeConsole ( - EfiBootManagerUpdateConsoleVariable (ConOut, (EFI_DEVICE_PATH_PROTOCOL*)&mSerialConsole, NULL); - EfiBootManagerUpdateConsoleVariable (ErrOut, (EFI_DEVICE_PATH_PROTOCOL*)&mSerialConsole, NULL); - -+ Status = gBS->LocateProtocol ( -+ &gEdkiiPlatformSpecificResetHandlerProtocolGuid, -+ NULL, -+ (VOID **)&ResetNotify -+ ); -+ ASSERT_EFI_ERROR (Status); -+ if (!EFI_ERROR (Status)) { -+ Status = ResetNotify->RegisterResetNotify ( -+ ResetNotify, -+ OnResetNotify -+ ); -+ ASSERT_EFI_ERROR (Status); -+ } -+ -+ - // - // Signal EndOfDxe PI Event - // -diff --git a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf -index 5e55eff7..9e26828b 100644 ---- a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf -+++ b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf -@@ -46,6 +46,7 @@ - MemoryAllocationLib - PcdLib - PrintLib -+ TimerLib - UefiBootManagerLib - UefiBootServicesTableLib - UefiLib -@@ -63,6 +64,7 @@ - [Pcd] - gEfiMdeModulePkgTokenSpaceGuid.PcdBootDiscoveryPolicy - gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut -+ gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay - gRaspberryPiTokenSpaceGuid.PcdSdIsArasan - - [Guids] -@@ -78,6 +80,7 @@ - gEfiBootManagerPolicyConnectAllGuid - - [Protocols] -+ gEdkiiPlatformSpecificResetHandlerProtocolGuid - gEfiBootManagerPolicyProtocolGuid - gEfiDevicePathProtocolGuid - gEfiGraphicsOutputProtocolGuid -@@ -86,3 +89,6 @@ - gEfiSimpleFileSystemProtocolGuid - gEsrtManagementProtocolGuid - gEfiUsb2HcProtocolGuid -+ -+[Depex] -+ gEdkiiPlatformSpecificResetHandlerProtocolGuid -diff --git a/Platform/RaspberryPi/Library/ResetLib/ResetLib.c b/Platform/RaspberryPi/Library/ResetLib/ResetLib.c -deleted file mode 100644 -index 2bcef8d4..00000000 ---- a/Platform/RaspberryPi/Library/ResetLib/ResetLib.c -+++ /dev/null -@@ -1,151 +0,0 @@ --/** @file -- * -- * Support ResetSystem Runtime call using PSCI calls. -- * Signals the gRaspberryPiEventResetGuid event group on reset. -- * -- * Copyright (c) 2018, Andrei Warkentin -- * Copyright (c) 2014, Linaro Ltd. All rights reserved. -- * Copyright (c) 2013-2015, ARM Ltd. All rights reserved. -- * Copyright (c) 2008-2009, Apple Inc. All rights reserved. -- * -- * SPDX-License-Identifier: BSD-2-Clause-Patent -- * -- **/ -- --#include -- --#include --#include --#include --#include --#include --#include --#include --#include -- --#include -- -- --/** -- Disconnect everything. -- Modified from the UEFI 2.3 spec (May 2009 version) -- --**/ --STATIC --VOID --DisconnectAll ( -- VOID -- ) --{ -- EFI_STATUS Status; -- UINTN HandleCount; -- EFI_HANDLE *HandleBuffer; -- UINTN HandleIndex; -- -- /* -- * Retrieve the list of all handles from the handle database -- */ -- Status = gBS->LocateHandleBuffer ( -- AllHandles, -- NULL, -- NULL, -- &HandleCount, -- &HandleBuffer -- ); -- if (EFI_ERROR (Status)) { -- return; -- } -- -- for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) { -- gBS->DisconnectController (HandleBuffer[HandleIndex], NULL, NULL); -- } -- -- gBS->FreePool(HandleBuffer); --} -- -- --/** -- Resets the entire platform. -- -- @param ResetType The type of reset to perform. -- @param ResetStatus The status code for the reset. -- @param DataSize The size, in bytes, of WatchdogData. -- @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or -- EfiResetShutdown the data buffer starts with a Null-terminated -- Unicode string, optionally followed by additional binary data. -- --**/ --EFI_STATUS --EFIAPI --LibResetSystem ( -- IN EFI_RESET_TYPE ResetType, -- IN EFI_STATUS ResetStatus, -- IN UINTN DataSize, -- IN CHAR16 *ResetData OPTIONAL -- ) --{ -- ARM_SMC_ARGS ArmSmcArgs; -- UINT32 Delay; -- -- if (!EfiAtRuntime ()) { -- /* -- * Only if still in UEFI. -- */ -- EfiEventGroupSignal (&gRaspberryPiEventResetGuid); -- -- DisconnectAll (); -- -- Delay = PcdGet32 (PcdPlatformResetDelay); -- if (Delay != 0) { -- DEBUG ((DEBUG_INFO, "Platform will be reset in %d.%d seconds...\n", -- Delay / 1000000, (Delay % 1000000) / 100000)); -- MicroSecondDelay (Delay); -- } -- } -- DEBUG ((DEBUG_INFO, "Platform %a.\n", -- (ResetType == EfiResetShutdown) ? "shutdown" : "reset")); -- -- switch (ResetType) { -- case EfiResetPlatformSpecific: -- // Map the platform specific reset as reboot -- case EfiResetWarm: -- // Map a warm reset into a cold reset -- case EfiResetCold: -- // Send a PSCI 0.2 SYSTEM_RESET command -- ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET; -- break; -- case EfiResetShutdown: -- // Send a PSCI 0.2 SYSTEM_OFF command -- ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_OFF; -- break; -- default: -- ASSERT (FALSE); -- return EFI_UNSUPPORTED; -- } -- -- ArmCallSmc (&ArmSmcArgs); -- -- // We should never be here -- DEBUG ((DEBUG_ERROR, "%a: PSCI Reset failed\n", __FUNCTION__)); -- CpuDeadLoop (); -- return EFI_UNSUPPORTED; --} -- --/** -- Initialize any infrastructure required for LibResetSystem () to function. -- -- @param ImageHandle The firmware allocated handle for the EFI image. -- @param SystemTable A pointer to the EFI System Table. -- -- @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS. -- --**/ --EFI_STATUS --EFIAPI --LibInitializeResetSystem ( -- IN EFI_HANDLE ImageHandle, -- IN EFI_SYSTEM_TABLE *SystemTable -- ) --{ -- return EFI_SUCCESS; --} -diff --git a/Platform/RaspberryPi/Library/ResetLib/ResetLib.inf b/Platform/RaspberryPi/Library/ResetLib/ResetLib.inf -deleted file mode 100644 -index 9bdb94a5..00000000 ---- a/Platform/RaspberryPi/Library/ResetLib/ResetLib.inf -+++ /dev/null -@@ -1,45 +0,0 @@ --#/** @file --# --# Reset System lib using PSCI hypervisor or secure monitor calls. --# Signals the gRaspberryPiEventResetGuid event group on reset. --# --# Copyright (c) 2018, Andrei Warkentin --# Copyright (c) 2014, Linaro Ltd. All rights reserved. --# Copyright (c) 2014, ARM Ltd. All rights reserved. --# Copyright (c) 2008, Apple Inc. All rights reserved. --# --# SPDX-License-Identifier: BSD-2-Clause-Patent --# --#**/ -- --[Defines] -- INF_VERSION = 0x0001001A -- BASE_NAME = ResetLib -- FILE_GUID = B9F59B69-A105-41C7-8F5A-2C60DD7FD7AB -- MODULE_TYPE = BASE -- VERSION_STRING = 1.0 -- LIBRARY_CLASS = EfiResetSystemLib -- --[Sources] -- ResetLib.c -- --[Packages] -- ArmPkg/ArmPkg.dec -- MdePkg/MdePkg.dec -- EmbeddedPkg/EmbeddedPkg.dec -- Platform/RaspberryPi/RaspberryPi.dec -- --[LibraryClasses] -- DebugLib -- BaseLib -- ArmSmcLib -- PcdLib -- TimerLib -- UefiLib -- UefiRuntimeLib -- --[Guids] -- gRaspberryPiEventResetGuid -- --[Pcd] -- gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay ## CONSUMES -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S b/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S -index 5972fcdf..21457c89 100644 ---- a/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S -@@ -86,31 +86,4 @@ ASM_FUNC (ArmPlatformPeiBootAction) - .long 0 // end tag - .set .Lmeminfo_size, . - .Lmeminfo_buffer - --//UINTN --//ArmPlatformGetPrimaryCoreMpId ( --// VOID --// ); --ASM_FUNC (ArmPlatformGetPrimaryCoreMpId) -- MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) -- ret -- --//UINTN --//ArmPlatformIsPrimaryCore ( --// IN UINTN MpId --// ); --ASM_FUNC (ArmPlatformIsPrimaryCore) -- mov x0, #1 -- ret -- --//UINTN --//ArmPlatformGetCorePosition ( --// IN UINTN MpId --// ); --// With this function: CorePos = (ClusterId * 4) + CoreId --ASM_FUNC (ArmPlatformGetCorePosition) -- and x1, x0, #ARM_CORE_MASK -- and x0, x0, #ARM_CLUSTER_MASK -- add x0, x1, x0, LSR #6 -- ret -- - ASM_FUNCTION_REMOVE_IF_UNREFERENCED -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 3aab6ea8..0f3b669c 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -138,9 +138,7 @@ - ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf - TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf -- ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf - ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf -- ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf - ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf - - # Dual serial port library -@@ -212,7 +210,6 @@ - MemoryInitPeiLib|Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf - PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf - ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf -- LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf - PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf - HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf - PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf -@@ -251,8 +248,8 @@ - DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf -- EfiResetSystemLib|Platform/RaspberryPi/Library/ResetLib/ResetLib.inf -- ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf -+ ArmMonitorLib|ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf -+ ResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf - VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf - - !if $(SECURE_BOOT_ENABLE) == TRUE -@@ -523,9 +520,11 @@ - # - # PEI Phase modules - # -- ArmPlatformPkg/PrePi/PeiUniCore.inf -- -- # -+ ArmPlatformPkg/PeilessSec/PeilessSec.inf { -+ -+ NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf -+ } -+# - # DXE - # - MdeModulePkg/Core/Dxe/DxeMain.inf { -@@ -543,9 +542,13 @@ - ArmPkg/Drivers/CpuDxe/CpuDxe.inf - MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.inf -- MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf -+ MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf { -+ -+ NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf -+ } - MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { - -+ NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf - NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf - DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf - } -@@ -562,7 +565,7 @@ - !endif - MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf -- EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf -+ MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf - EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf { - - RealTimeClockLib|Platform/RaspberryPi/Library/RpiRtcLib/RpiRtcLib.inf -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index 8d79e453..125d5fee 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -195,7 +195,7 @@ READ_LOCK_STATUS = TRUE - INF SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureBootDefaultKeysDxe.inf - !endif - INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf -- INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf -+ INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf - INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf - INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf -@@ -351,7 +351,7 @@ READ_STATUS = TRUE - READ_LOCK_CAP = TRUE - READ_LOCK_STATUS = TRUE - -- INF ArmPlatformPkg/PrePi/PeiUniCore.inf -+ INF ArmPlatformPkg/PeilessSec/PeilessSec.inf - FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { - SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { - SECTION FV_IMAGE = FVMAIN -diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/RaspberryPi.dec -index 0c636cbf..5c050f89 100644 ---- a/Platform/RaspberryPi/RaspberryPi.dec -+++ b/Platform/RaspberryPi/RaspberryPi.dec -@@ -24,7 +24,6 @@ - - [Guids] - gRaspberryPiTokenSpaceGuid = {0xCD7CC258, 0x31DB, 0x11E6, {0x9F, 0xD3, 0x63, 0xB0, 0xB8, 0xEE, 0xD6, 0xB5}} -- gRaspberryPiEventResetGuid = {0xCD7CC258, 0x31DB, 0x11E6, {0x9F, 0xD3, 0x63, 0xB4, 0xB4, 0xE4, 0xD4, 0xB4}} - gConfigDxeFormSetGuid = {0xCD7CC258, 0x31DB, 0x22E6, {0x9F, 0x22, 0x63, 0xB0, 0xB8, 0xEE, 0xD6, 0xB5}} - gMemoryAttributeManagerFormSetGuid = { 0xefab3427, 0x4793, 0x4e9e, { 0xaa, 0x29, 0x88, 0x0c, 0x9a, 0x77, 0x5b, 0x5f } } - --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0023-Nov-29-update.patch b/packages/edk2/patches/platforms/0023-Nov-29-update.patch deleted file mode 100644 index 63e0abe..0000000 --- a/packages/edk2/patches/platforms/0023-Nov-29-update.patch +++ /dev/null @@ -1,9472 +0,0 @@ -From 62140f89b91dce32ace2b795c64f4e2aeddeade2 Mon Sep 17 00:00:00 2001 -From: mattp -Date: Tue, 8 Jul 2025 16:09:25 -0400 -Subject: [PATCH 23/29] Nov 29 update - ---- - Drivers/OpTee/OpteeRpmbPkg/FixupPcd.c | 6 +- - Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c | 22 +- - .../S3FeaturePkg/S3Dxe/S3Dxe.c | 4 +- - .../96Boards/96BoardsI2cDxe/96BoardsI2cDxe.c | 6 +- - .../96Boards/LsConnectorDxe/LsConnectorDxe.c | 12 +- - Platform/96Boards/Secure96Dxe/Secure96Dxe.c | 6 +- - .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.c | 2 +- - .../FspWrapperPlatformLibSample.c | 2 +- - .../FvbServices/FwBlockService.c | 2 +- - .../ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 4 +- - .../ARM/Drivers/NorFlashDxe/NorFlashFvb.c | 22 +- - .../NorFlashDxe/NorFlashStandaloneMm.c | 4 +- - .../Drivers/PlatformDxe/PlatformDxeFvp.c | 4 +- - .../Drivers/PlatformDxe/VirtioDevices.c | 12 +- - .../N1Sdp/Drivers/PlatformDxe/PlatformDxe.c | 4 +- - .../SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 2 +- - .../Drivers/PlatformDxe/VirtioDevices.c | 12 +- - .../Drivers/AcpiPlatformDxe/AcpiApei.c | 12 +- - .../Drivers/AcpiPlatformDxe/AcpiPcct.c | 4 +- - .../Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c | 2 +- - .../Drivers/PciPlatformDxe/PciPlatformDxe.c | 2 +- - .../SmbiosMemInfoDxe/SmbiosMemInfoDxe.c | 6 +- - .../PCF85063RealTimeClockLib/PCF85063.c | 6 +- - .../OemNicConfig2PHi1610/OemNicConfig2P.c | 20 +- - .../DS3231RealTimeClockLib.c | 2 +- - .../D03/Library/FdtUpdateLib/FdtUpdateLib.c | 10 +- - .../HisiOemMiscLib2P/BoardFeature2PHi1610.c | 2 +- - .../HisiOemMiscLibD05/BoardFeatureD05.c | 2 +- - .../OemNicConfig2PHi1620/OemNicConfig2P.c | 2 +- - .../HisiOemMiscLibD06/BoardFeatureD06.c | 4 +- - .../D06/Library/OemNicLib/OemNicLib.c | 16 +- - .../PciHostBridgeLib/PciHostBridgeLib.c | 4 +- - .../BoardBdsHookDxe/BoardBdsHookDxe.c | 2 +- - .../PeiBoardPolicyUpdate.c | 8 +- - .../SmmAspireVn7Dash572GAcpiEnableLib.c | 8 +- - .../Library/BoardEcLib/EcCommands.c | 16 +- - .../BoardInitLib/PeiBoardInitPreMemLib.c | 2 +- - .../Acpi/AcpiTables/AcpiPlatform.c | 4 +- - .../DxePlatformBootManagerLib/BdsPlatform.c | 6 +- - .../Bus/Pci/PciBusDxe/PciCommand.c | 2 +- - .../DxePlatformBootManagerLib/BdsPlatform.c | 6 +- - .../Library/BoardBdsHookLib/BoardBdsHookLib.c | 24 +- - .../PciHostBridgeLib/PciHostBridgeLib.c | 6 +- - .../SimicsOpenBoardPkg/SecCore/SecMain.c | 2 +- - .../SimicsOpenBoardPkg/SimicsDxe/Platform.c | 14 +- - .../SimicsPei/FeatureControl.c | 6 +- - .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 10 +- - .../SimicsOpenBoardPkg/SimicsPei/Platform.c | 2 +- - .../SimicsVideoDxe/Initialize.c | 4 +- - .../SimicsVideoDxe/VbeShim.c | 12 +- - .../Uba/TypeAowanda/Pei/AcpiTablePcds.c | 2 +- - .../Aowanda/Uba/TypeAowanda/Pei/PcdData.c | 2 +- - .../TypeBoardPortTemplate/Pei/AcpiTablePcds.c | 2 +- - .../Features/Acpi/AcpiPlatform/AcpiPlatform.c | 8 +- - .../Pci/Dxe/PciPlatform/PciPlatformHooks.c | 2 +- - .../Uba/TypeJunctionCity/Pei/AcpiTablePcds.c | 2 +- - .../AcpiPlatformLibHmat.c | 4 +- - .../Common/Pei/IioPortBifurcationVer1.c | 2 +- - .../TypeWilsonCityRP/Pei/AcpiTablePcds.c | 2 +- - .../TypeWilsonCitySMT/Pei/AcpiTablePcds.c | 2 +- - .../Library/NorFlashQemuLib/NorFlashQemuLib.c | 4 +- - .../PlatformBootManagerLib/PlatformBm.c | 16 +- - .../PlatformBootManagerLib/QemuKernel.c | 2 +- - .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.c | 2 +- - .../BaseResetSystemAcpiGed.c | 2 +- - .../DxeResetSystemAcpiGed.c | 20 +- - .../LoongArchQemuPkg/PlatformPei/Platform.c | 4 +- - .../NonDiscoverableInitLib.c | 2 +- - .../NonDiscoverableInitLib.c | 2 +- - .../NonDiscoverableInitLib.c | 2 +- - .../ArmPlatformLib/ArmPlatformLibMem.c | 2 +- - .../Drivers/PlatformDxe/PlatformDxe.c | 2 +- - .../ArmPlatformLib/ArmPlatformLibMem.c | 2 +- - .../Edk2OpensbiPlatformWrapperLib.c | 48 +- - .../PlatformPkg/Universal/FdtPeim/FdtPeim.c | 6 +- - .../Universal/Pei/PlatformPei/MemDetect.c | 2 +- - .../PlatformPkg/Universal/Sec/SecMain.c | 42 +- - .../ArasanMmcHostDxe/ArasanMmcHostDxe.c | 22 +- - .../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 2 +- - .../RaspberryPi/Drivers/ConfigDxe/XhciQuirk.c | 4 +- - .../Drivers/DisplayDxe/Screenshot.c | 10 +- - Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c | 44 +- - .../RaspberryPi/Drivers/MmcDxe/MmcBlockIo.c | 12 +- - .../RaspberryPi/Drivers/MmcDxe/MmcDebug.c | 4 +- - .../Drivers/MmcDxe/MmcIdentification.c | 34 +- - .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c | 619 +++++++++--------- - .../RaspberryPi/Drivers/SdHostDxe/SdHostDxe.c | 4 +- - .../PlatformBootManagerLib/PlatformBm.c | 26 +- - .../PlatformLib/AArch64/RaspberryPiHelper.S | 2 +- - Platform/RaspberryPi/RPi5/RPi5.dsc | 9 - - .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 4 +- - .../PlatformSecPpiLib/PlatformSecPpiLib.c | 6 +- - .../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 6 +- - .../NonDiscoverableInitLib.c | 2 +- - .../NonDiscoverableInitLib.c | 2 +- - .../StyxSataPlatformDxe/InitController.c | 4 +- - .../Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c | 2 +- - .../Library/MemoryInitPei/MemoryInitPeiLib.c | 2 +- - .../StyxDtbLoaderLib/StyxDtbLoaderLib.c | 10 +- - .../StyxPlatformFlashAccessLib.c | 16 +- - .../Drivers/AcpiConfigDxe/AcpiConfigDxe.c | 4 +- - .../Drivers/CpuConfigDxe/CpuConfigDxe.c | 4 +- - .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 8 +- - .../Drivers/FlashPei/FlashPei.c | 4 +- - .../Drivers/PlatformInfoDxe/PlatformInfoDxe.c | 2 +- - .../Drivers/RasConfigDxe/RasConfigDxe.c | 18 +- - .../AmpereAltraPkg/Drivers/RngDxe/RngDxe.c | 2 +- - .../Library/Ac01PcieLib/PcieCore.c | 2 +- - .../Library/AmpereCpuLib/AmpereCpuLib.c | 2 +- - .../AmpereCpuLib/RuntimeAmpereCpuLib.c | 2 +- - .../Library/DwI2cLib/DwI2cLib.c | 32 +- - .../Library/FlashLib/FlashLibCommon.c | 12 +- - .../PciHostBridgeLib/PciHostBridgeLib.c | 4 +- - .../AmpereAltraPkg/Library/TrngLib/TrngLib.c | 2 +- - .../Library/PlatformUiLib/PlatformManager.c | 2 +- - Silicon/Atmel/AtSha204a/AtSha204aDriver.c | 8 +- - .../Drivers/InterruptDxe/InterruptDxe.c | 4 +- - .../Drivers/Net/BcmGenetDxe/DriverBinding.c | 12 +- - .../Drivers/Net/BcmGenetDxe/GenericPhy.c | 8 +- - .../Drivers/Net/BcmGenetDxe/GenetUtil.c | 8 +- - .../Drivers/Net/BcmGenetDxe/SimpleNetwork.c | 28 +- - .../Drivers/AcpiPlatformDxe/UpdateDsdt.c | 14 +- - .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 +- - .../Drivers/NorFlashDxe/NorFlashDxe.c | 36 +- - .../Drivers/NorFlashDxe/NorFlashHw.c | 20 +- - .../Drivers/SasPlatform/SasPlatform.c | 2 +- - .../Smbios/AddSmbiosType9/AddSmbiosType9.c | 6 +- - .../Smbios/MemorySubClassDxe/MemorySubClass.c | 6 +- - .../ProcessorSubClassDxe/ProcessorSubClass.c | 2 +- - .../Type00/MiscBiosVendorFunction.c | 6 +- - .../Type01/MiscSystemManufacturerFunction.c | 2 +- - .../MiscBaseBoardManufacturerFunction.c | 2 +- - .../Type03/MiscChassisManufacturerFunction.c | 2 +- - .../MiscSystemSlotDesignationFunction.c | 4 +- - ...MiscNumberOfInstallableLanguagesFunction.c | 2 +- - .../Type32/MiscBootInformationFunction.c | 2 +- - .../MiscIpmiDeviceInformationFunction.c | 2 +- - .../Drivers/UpdateFdtDxe/UpdateFdtDxe.c | 2 +- - .../Hi1610/Drivers/IoInitDxe/IoInitDxe.c | 2 +- - .../Hi161xPciPlatformLib.c | 20 +- - Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 4 +- - .../Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 4 +- - .../Hisilicon/Hi1620/Drivers/Apei/Hest/Hest.c | 6 +- - .../Hi1620/Drivers/Apei/OemApeiHi1620.c | 4 +- - .../Hi1620/Hi1620OemConfigUiLib/OemConfig.c | 2 +- - Silicon/Hisilicon/Hi1620/Pptt/Pptt.c | 2 +- - .../ArmPlatformLibMem.c | 2 +- - .../Library/CpldIoLib/CpldIoLibRuntime.c | 4 +- - .../Hisilicon/Library/I2CLib/I2CLibRuntime.c | 6 +- - .../M41T83RealTimeClockLib.c | 24 +- - .../PlatformBootManagerLib/PlatformBm.c | 16 +- - .../Library/RtcHelperLib/RtcHelperLib.c | 4 +- - .../Flash/SpiFvbService/SpiFvbServiceMm.c | 6 +- - .../ShadowMicrocode/ShadowMicrocodePei.c | 4 +- - .../PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c | 2 +- - .../MemoryInit/Pei/memory_options.h | 6 +- - .../SmmControl/RuntimeDxe/SmmControl2Dxe.c | 18 +- - .../PeiDxeSmmPchDmiLib/PchDmiLib.c | 4 +- - .../BaseSpiCommonLib/SpiCommon.c | 8 +- - .../PchCycleDecodingLib.c | 4 +- - .../PlatformFlashAccessLib.c | 22 +- - .../PciHostBridgeLib.c | 6 +- - .../PciHostBridgeLibConstructor.c | 12 +- - .../Armada7k8kSoCDescLib.c | 24 +- - .../Drivers/BoardDesc/MvBoardDescDxe.c | 56 +- - .../Drivers/Gpio/MvGpioDxe/MvGpioDxe.c | 8 +- - .../Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.c | 46 +- - .../Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 2 +- - .../Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c | 12 +- - Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 2 +- - .../SdMmc/XenonDxe/XenonSdMmcOverride.c | 4 +- - .../Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c | 44 +- - .../Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c | 8 +- - .../Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.c | 6 +- - Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 4 +- - Silicon/Marvell/Library/MvGpioLib/MvGpioLib.c | 6 +- - .../Maxim/Library/Ds1307RtcLib/Ds1307RtcLib.c | 8 +- - Silicon/NXP/LS1043A/Library/SocLib/SerDes.c | 2 +- - Silicon/NXP/LS1046A/Library/SocLib/SerDes.c | 2 +- - Silicon/NXP/LX2160A/Library/SocLib/SerDes.c | 6 +- - .../Pcf8563RealTimeClockLib.c | 8 +- - .../Library/SerDesHelperLib/SerDesHelperLib.c | 2 +- - .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 10 +- - .../SbsaQemuSmbiosDxe/SbsaQemuSmbiosDxe.c | 4 +- - .../Library/SbsaQemuLib/SbsaQemuMem.c | 8 +- - .../CpuExceptionHandlerLib.c | 2 +- - .../ProcessorPkg/Universal/FdtDxe/FdtDxe.c | 6 +- - .../Universal/SmbiosDxe/RiscVSmbiosDxe.c | 6 +- - .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 2 +- - .../SynQuacer/Drivers/Fip006Dxe/NorFlashDxe.c | 6 +- - .../SynQuacer/Drivers/Fip006Dxe/NorFlashFvb.c | 10 +- - .../SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c | 4 +- - .../Drivers/Net/NetsecDxe/NetsecDxe.c | 4 +- - .../SynQuacer/Drivers/PlatformDxe/Pci.c | 6 +- - .../Drivers/PlatformDxe/PlatformDxe.c | 12 +- - .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 26 +- - .../SynQuacerDtbLoaderLib.c | 6 +- - .../SynQuacerMemoryInitPeiLib.c | 6 +- - .../SynQuacerPlatformFlashAccessLib.c | 24 +- - .../SynQuacerPlatformPeiLib.c | 8 +- - .../Drivers/DwEmacSnpDxe/DriverBinding.c | 14 +- - .../Drivers/DwEmacSnpDxe/DwEmacSnpDxe.c | 18 +- - .../Drivers/DwEmacSnpDxe/EmacDxeUtil.c | 14 +- - .../Drivers/DwEmacSnpDxe/PhyDxeUtil.c | 10 +- - .../InterruptDxe/HardwareInterrupt.c | 6 +- - 205 files changed, 1146 insertions(+), 1188 deletions(-) - -diff --git a/Drivers/OpTee/OpteeRpmbPkg/FixupPcd.c b/Drivers/OpTee/OpteeRpmbPkg/FixupPcd.c -index 56402fd1..7b8980d5 100644 ---- a/Drivers/OpTee/OpteeRpmbPkg/FixupPcd.c -+++ b/Drivers/OpTee/OpteeRpmbPkg/FixupPcd.c -@@ -71,11 +71,11 @@ FixPcdMemory ( - ); - - DEBUG ((DEBUG_INFO, "%a: Fixup PcdFlashNvStorageVariableBase64: 0x%lx\n", -- __FUNCTION__, PcdGet64 (PcdFlashNvStorageVariableBase64))); -+ __func__, PcdGet64 (PcdFlashNvStorageVariableBase64))); - DEBUG ((DEBUG_INFO, "%a: Fixup PcdFlashNvStorageFtwWorkingBase64: 0x%lx\n", -- __FUNCTION__, PcdGet64 (PcdFlashNvStorageFtwWorkingBase64))); -+ __func__, PcdGet64 (PcdFlashNvStorageFtwWorkingBase64))); - DEBUG ((DEBUG_INFO, "%a: Fixup PcdFlashNvStorageFtwSpareBase64: 0x%lx\n", -- __FUNCTION__, PcdGet64 (PcdFlashNvStorageFtwSpareBase64))); -+ __func__, PcdGet64 (PcdFlashNvStorageFtwSpareBase64))); - - return Status; - } -diff --git a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c -index 83c27503..19252698 100644 ---- a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c -+++ b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c -@@ -575,14 +575,14 @@ ValidateFvHeader ( - || (FwVolHeader->Signature != EFI_FVH_SIGNATURE) - || (FwVolHeader->FvLength != FvLength)) { - DEBUG ((DEBUG_INFO, "%a: No Firmware Volume header present\n", -- __FUNCTION__)); -+ __func__)); - return EFI_NOT_FOUND; - } - - // Check the Firmware Volume Guid - if (!CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid)) { - DEBUG ((DEBUG_INFO, "%a: Firmware Volume Guid non-compatible\n", -- __FUNCTION__)); -+ __func__)); - return EFI_VOLUME_CORRUPTED; - } - -@@ -590,7 +590,7 @@ ValidateFvHeader ( - Checksum = CalculateSum16 ((UINT16*)FwVolHeader, FwVolHeader->HeaderLength); - if (Checksum != 0) { - DEBUG ((DEBUG_INFO, "%a: FV checksum is invalid (Checksum:0x%X)\n", -- __FUNCTION__, Checksum)); -+ __func__, Checksum)); - return EFI_VOLUME_CORRUPTED; - } - -@@ -600,7 +600,7 @@ ValidateFvHeader ( - // Check the Variable Store Guid - if (!CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) && - !CompareGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGuid)) { -- DEBUG ((DEBUG_INFO, "%a: Variable Store Guid non-compatible\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Variable Store Guid non-compatible\n", __func__)); - return EFI_VOLUME_CORRUPTED; - } - -@@ -608,7 +608,7 @@ ValidateFvHeader ( - FwVolHeader->HeaderLength; - if (VariableStoreHeader->Size != VariableStoreLength) { - DEBUG ((DEBUG_INFO, "%a: Variable Store Length does not match\n", -- __FUNCTION__)); -+ __func__)); - return EFI_VOLUME_CORRUPTED; - } - -@@ -754,7 +754,7 @@ FvbInitialize ( - Status = ValidateFvHeader (FwVolHeader); - if (EFI_ERROR (Status)) { - // There is no valid header, so time to install one. -- DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __func__)); - - // Reset memory - SetMem64 ( -@@ -762,7 +762,7 @@ FvbInitialize ( - Instance->NBlocks * Instance->BlockSize, - ~0UL - ); -- DEBUG ((DEBUG_INFO, "%a: Erasing Flash.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Erasing Flash.\n", __func__)); - Status = ReadWriteRpmb ( - SP_SVC_RPMB_WRITE, - Instance->MemBaseAddress, -@@ -776,13 +776,13 @@ FvbInitialize ( - } - // Install all appropriate headers - DEBUG ((DEBUG_INFO, "%a: Installing a correct one for this volume.\n", -- __FUNCTION__)); -+ __func__)); - Status = InitializeFvAndVariableStoreHeaders (Instance); - if (EFI_ERROR (Status)) { - return Status; - } - } else { -- DEBUG ((DEBUG_INFO, "%a: Found valid FVB Header.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Found valid FVB Header.\n", __func__)); - } - Instance->Initialized = TRUE; - -@@ -861,9 +861,9 @@ OpTeeRpmbFvbInit ( - ); - ASSERT_EFI_ERROR (Status); - -- DEBUG ((DEBUG_INFO, "%a: Register OP-TEE RPMB Fvb\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Register OP-TEE RPMB Fvb\n", __func__)); - DEBUG ((DEBUG_INFO, "%a: Using NV store FV in-memory copy at 0x%lx\n", -- __FUNCTION__, PatchPcdGet64 (PcdFlashNvStorageVariableBase64))); -+ __func__, PatchPcdGet64 (PcdFlashNvStorageVariableBase64))); - - return Status; - } -diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/S3Dxe/S3Dxe.c b/Features/Intel/PowerManagement/S3FeaturePkg/S3Dxe/S3Dxe.c -index 47b2cc27..102d5c39 100644 ---- a/Features/Intel/PowerManagement/S3FeaturePkg/S3Dxe/S3Dxe.c -+++ b/Features/Intel/PowerManagement/S3FeaturePkg/S3Dxe/S3Dxe.c -@@ -129,7 +129,7 @@ S3DxeEntryPoint ( - ACPI_S3_MEMORY S3MemoryInfo; - EFI_STATUS Status; - -- DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a() Start\n", __func__)); - - S3PeiMemSize = (UINTN) GetPeiMemSize (); - S3PeiMemBase = (UINTN) AllocateAcpiNvsMemoryBelow4G (S3PeiMemSize); -@@ -150,6 +150,6 @@ S3DxeEntryPoint ( - ); - ASSERT_EFI_ERROR (Status); - -- DEBUG ((DEBUG_INFO, "%a() End\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a() End\n", __func__)); - return EFI_SUCCESS; - } -diff --git a/Platform/96Boards/96BoardsI2cDxe/96BoardsI2cDxe.c b/Platform/96Boards/96BoardsI2cDxe/96BoardsI2cDxe.c -index a751769c..362dacb1 100644 ---- a/Platform/96Boards/96BoardsI2cDxe/96BoardsI2cDxe.c -+++ b/Platform/96Boards/96BoardsI2cDxe/96BoardsI2cDxe.c -@@ -109,7 +109,7 @@ EnableI2cBusConfiguration ( - &gEfiI2cMasterProtocolGuid, (VOID **)&I2cMaster); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: gBS->HandleProtocol() failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - -@@ -117,7 +117,7 @@ EnableI2cBusConfiguration ( - Status = I2cMaster->SetBusFrequency (I2cMaster, &BusClockHertz); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: I2cMaster->SetBusFrequency() failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - -@@ -162,7 +162,7 @@ RegisterI2cBus ( - Status = gBS->LocateHandle (ByProtocol, Guid, NULL, &BufferSize, - &I2cBus->I2cMasterHandle); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a: gBS->LocateHandle() failed - %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_INFO, "%a: gBS->LocateHandle() failed - %r\n", __func__, - Status)); - return; - } -diff --git a/Platform/96Boards/LsConnectorDxe/LsConnectorDxe.c b/Platform/96Boards/LsConnectorDxe/LsConnectorDxe.c -index a55f56f4..ed98a6dd 100644 ---- a/Platform/96Boards/LsConnectorDxe/LsConnectorDxe.c -+++ b/Platform/96Boards/LsConnectorDxe/LsConnectorDxe.c -@@ -105,7 +105,7 @@ PublishOsDescription ( - Status = gBS->LocateProtocol (&g96BoardsMezzanineProtocolGuid, NULL, - (VOID **)&Mezzanine); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a: no mezzanine driver active\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: no mezzanine driver active\n", __func__)); - return; - } - -@@ -115,7 +115,7 @@ PublishOsDescription ( - Status = Mezzanine->InstallSsdtTable (Mezzanine, AcpiProtocol); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to install SSDT table - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - return; - } -@@ -133,7 +133,7 @@ PublishOsDescription ( - - Status = Mezzanine->ApplyDeviceTreeOverlay (Mezzanine, Dtb); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_WARN, "%a: failed to apply DT overlay - %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_WARN, "%a: failed to apply DT overlay - %r\n", __func__, - Status)); - } - } -@@ -169,7 +169,7 @@ EntryPoint ( - Status = gRT->GetVariable (NINETY_SIX_BOARDS_CONFIG_VARIABLE_NAME, - &g96BoardsFormsetGuid, NULL, &BufferSize, &ConfigData); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a: no config data found\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: no config data found\n", __func__)); - ConfigData.MezzanineType = MEZZANINE_NONE; - } - -@@ -177,7 +177,7 @@ EntryPoint ( - ConfigData.MezzanineType >= MEZZANINE_MAX) { - DEBUG ((DEBUG_WARN, - "%a: invalid value for %s, defaulting to MEZZANINE_NONE\n", -- __FUNCTION__, NINETY_SIX_BOARDS_CONFIG_VARIABLE_NAME)); -+ __func__, NINETY_SIX_BOARDS_CONFIG_VARIABLE_NAME)); - ConfigData.MezzanineType = MEZZANINE_NONE; - Status = EFI_INVALID_PARAMETER; // trigger setvar below - } -@@ -194,7 +194,7 @@ EntryPoint ( - - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: gRT->SetVariable () failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - } -diff --git a/Platform/96Boards/Secure96Dxe/Secure96Dxe.c b/Platform/96Boards/Secure96Dxe/Secure96Dxe.c -index a9794845..b45497ca 100644 ---- a/Platform/96Boards/Secure96Dxe/Secure96Dxe.c -+++ b/Platform/96Boards/Secure96Dxe/Secure96Dxe.c -@@ -68,7 +68,7 @@ SetOverlayFragmentTarget ( - AsciiStrLen (Target) + 1); - if (Err) { - DEBUG ((DEBUG_ERROR, "%a: fdt_setprop() failed - %a\n", -- __FUNCTION__, fdt_strerror (Err))); -+ __func__, fdt_strerror (Err))); - } - } - -@@ -103,7 +103,7 @@ FixupOverlay ( - if (Err) { - DEBUG ((DEBUG_ERROR, - "%a: fdt_setprop_u32(.., .., \"phandle\", 0x%x) failed - %a\n", -- __FUNCTION__, GpioPhandle, fdt_strerror (Err))); -+ __func__, GpioPhandle, fdt_strerror (Err))); - } - } - -@@ -171,7 +171,7 @@ ApplyDeviceTreeOverlay ( - Err = fdt_overlay_apply (Dtb, Overlay); - if (Err) { - DEBUG ((DEBUG_ERROR, "%a: fdt_overlay_apply() failed - %a\n", -- __FUNCTION__, fdt_strerror (Err))); -+ __func__, fdt_strerror (Err))); - return EFI_NOT_FOUND; - } - -diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c -index 0c997b40..0df64cdb 100644 ---- a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c -+++ b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c -@@ -386,7 +386,7 @@ OnReadyToBoot ( - FspsUpd = ((FSPS_UPD *)(UINTN)(*(UINT32 *)GET_GUID_HOB_DATA (FspsUpdHob))); - Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **)&AcpiTableProtocol); - if (!EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a:FSP-S UPD Ptr:%x\n", __FUNCTION__, FspsUpd)); -+ DEBUG ((DEBUG_INFO, "%a:FSP-S UPD Ptr:%x\n", __func__, FspsUpd)); - UINTN TableKey = 0; - if (ExportedInterfaceHob->AcpiTpm2Table != 0) { - DEBUG ((DEBUG_INFO, "TPM2 Table: %x\n", ExportedInterfaceHob->AcpiTpm2Table)); -diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c -index 2a616482..68437ac8 100644 ---- a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c -+++ b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c -@@ -112,7 +112,7 @@ UpdateFspmUpdDataForFabric ( - IN OUT VOID *FspUpdRgnPtr - ) - { -- DEBUG ((DEBUG_INFO, "%a Enter\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a Enter\n", __func__)); - FSPM_UPD *Upd = (FSPM_UPD *)FspUpdRgnPtr; - EFI_PEI_READ_ONLY_VARIABLE2_PPI *ReadVariable2 = NULL; - EFI_STATUS Status = PeiServicesLocatePpi (&gEfiPeiReadOnlyVariable2PpiGuid, 0, NULL, (VOID **)&ReadVariable2); -diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c -index f514ad77..5159b201 100644 ---- a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c -+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c -@@ -345,7 +345,7 @@ FvbReadBlock ( - UINTN LbaLength; - EFI_STATUS Status; - -- DEBUG ((DEBUG_INFO, "Smm %a() enter\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "Smm %a() enter\n", __func__)); - - // - // Check for invalid conditions -diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c -index f7b92de2..09f7a567 100644 ---- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c -+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c -@@ -455,11 +455,11 @@ NorFlashFvbInitialize ( - // Install the Default FVB header if required - if (EFI_ERROR (Status)) { - // There is no valid header, so time to install one. -- DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __func__)); - DEBUG (( - DEBUG_INFO, - "%a: Installing a correct one for this volume.\n", -- __FUNCTION__ -+ __func__ - )); - - // Erase all the NorFlash that is reserved for variable storage -diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c b/Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c -index 07675813..b057100c 100644 ---- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c -+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c -@@ -74,7 +74,7 @@ InitializeFvAndVariableStoreHeaders ( - DEBUG (( - DEBUG_ERROR, - "%a: NvStorageFtwWorkingBase is not contiguous with NvStorageVariableBase region\n", -- __FUNCTION__ -+ __func__ - )); - return EFI_INVALID_PARAMETER; - } -@@ -83,7 +83,7 @@ InitializeFvAndVariableStoreHeaders ( - DEBUG (( - DEBUG_ERROR, - "%a: NvStorageFtwSpareBase is not contiguous with NvStorageFtwWorkingBase region\n", -- __FUNCTION__ -+ __func__ - )); - return EFI_INVALID_PARAMETER; - } -@@ -93,7 +93,7 @@ InitializeFvAndVariableStoreHeaders ( - DEBUG (( - DEBUG_ERROR, - "%a: NvStorageVariableSize is 0x%x, should be atleast one block size\n", -- __FUNCTION__, -+ __func__, - NvStorageVariableSize - )); - return EFI_INVALID_PARAMETER; -@@ -103,7 +103,7 @@ InitializeFvAndVariableStoreHeaders ( - DEBUG (( - DEBUG_ERROR, - "%a: NvStorageFtwWorkingSize is 0x%x, should be atleast one block size\n", -- __FUNCTION__, -+ __func__, - NvStorageFtwWorkingSize - )); - return EFI_INVALID_PARAMETER; -@@ -113,7 +113,7 @@ InitializeFvAndVariableStoreHeaders ( - DEBUG (( - DEBUG_ERROR, - "%a: NvStorageFtwSpareSize is 0x%x, should be atleast one block size\n", -- __FUNCTION__, -+ __func__, - NvStorageFtwSpareSize - )); - return EFI_INVALID_PARAMETER; -@@ -124,7 +124,7 @@ InitializeFvAndVariableStoreHeaders ( - (NvStorageFtwWorkingBase % Instance->Media.BlockSize != 0) || - (NvStorageFtwSpareBase % Instance->Media.BlockSize != 0)) - { -- DEBUG ((DEBUG_ERROR, "%a: NvStorage Base addresses must be aligned to block size boundaries", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: NvStorage Base addresses must be aligned to block size boundaries", __func__)); - return EFI_INVALID_PARAMETER; - } - -@@ -209,7 +209,7 @@ ValidateFvHeader ( - DEBUG (( - DEBUG_INFO, - "%a: No Firmware Volume header present\n", -- __FUNCTION__ -+ __func__ - )); - return EFI_NOT_FOUND; - } -@@ -219,7 +219,7 @@ ValidateFvHeader ( - DEBUG (( - DEBUG_INFO, - "%a: Firmware Volume Guid non-compatible\n", -- __FUNCTION__ -+ __func__ - )); - return EFI_NOT_FOUND; - } -@@ -230,7 +230,7 @@ ValidateFvHeader ( - DEBUG (( - DEBUG_INFO, - "%a: FV checksum is invalid (Checksum:0x%X)\n", -- __FUNCTION__, -+ __func__, - Checksum - )); - return EFI_NOT_FOUND; -@@ -245,7 +245,7 @@ ValidateFvHeader ( - DEBUG (( - DEBUG_INFO, - "%a: Variable Store Guid non-compatible\n", -- __FUNCTION__ -+ __func__ - )); - return EFI_NOT_FOUND; - } -@@ -255,7 +255,7 @@ ValidateFvHeader ( - DEBUG (( - DEBUG_INFO, - "%a: Variable Store Length does not match\n", -- __FUNCTION__ -+ __func__ - )); - return EFI_NOT_FOUND; - } -diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c -index b72ad97b..3ab06794 100644 ---- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c -+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c -@@ -357,11 +357,11 @@ NorFlashFvbInitialize ( - // Install the Default FVB header if required - if (EFI_ERROR (Status)) { - // There is no valid header, so time to install one. -- DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __func__)); - DEBUG (( - DEBUG_INFO, - "%a: Installing a correct one for this volume.\n", -- __FUNCTION__ -+ __func__ - )); - - // Erase all the NorFlash that is reserved for variable storage -diff --git a/Platform/ARM/Morello/Drivers/PlatformDxe/PlatformDxeFvp.c b/Platform/ARM/Morello/Drivers/PlatformDxe/PlatformDxeFvp.c -index 93c5ec67..67a21c13 100644 ---- a/Platform/ARM/Morello/Drivers/PlatformDxe/PlatformDxeFvp.c -+++ b/Platform/ARM/Morello/Drivers/PlatformDxe/PlatformDxeFvp.c -@@ -45,7 +45,7 @@ ArmMorelloEntryPoint ( - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Couldn't find the RAM Disk protocol %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - -@@ -58,7 +58,7 @@ ArmMorelloEntryPoint ( - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Failed to register RAM Disk - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - } - -diff --git a/Platform/ARM/Morello/Drivers/PlatformDxe/VirtioDevices.c b/Platform/ARM/Morello/Drivers/PlatformDxe/VirtioDevices.c -index 365e5fdd..37e43730 100644 ---- a/Platform/ARM/Morello/Drivers/PlatformDxe/VirtioDevices.c -+++ b/Platform/ARM/Morello/Drivers/PlatformDxe/VirtioDevices.c -@@ -91,7 +91,7 @@ InitVirtioDevices ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Failed to install EFI_DEVICE_PATH protocol " - "for Virtio Block device (Status = %r)\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } else { - // Declare the Virtio BlockIo device - Status = VirtioMmioInstallDevice ( -@@ -100,7 +100,7 @@ InitVirtioDevices ( - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Unable to find Virtio Block MMIO device " -- "(Status = %r)\n", __FUNCTION__, Status)); -+ "(Status = %r)\n", __func__, Status)); - gBS->UninstallProtocolInterface ( - mVirtIoBlkController, - &gEfiDevicePathProtocolGuid, -@@ -108,7 +108,7 @@ InitVirtioDevices ( - ); - } else { - DEBUG ((DEBUG_INIT, "%a: Installed Virtio Block device\n", -- __FUNCTION__)); -+ __func__)); - } - } - } -@@ -125,7 +125,7 @@ InitVirtioDevices ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Failed to install EFI_DEVICE_PATH protocol " - "for Virtio Net (Status = %r)\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } else { - // Declare the Virtio Net device - Status = VirtioMmioInstallDevice ( -@@ -134,14 +134,14 @@ InitVirtioDevices ( - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Unable to find Virtio Block MMIO device " -- "(Status == %r)\n", __FUNCTION__, Status)); -+ "(Status == %r)\n", __func__, Status)); - gBS->UninstallProtocolInterface ( - mVirtIoNetController, - &gEfiDevicePathProtocolGuid, - &mVirtioNetDevicePath - ); - } else { -- DEBUG ((DEBUG_INIT, "%a: Installed Virtio Net\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INIT, "%a: Installed Virtio Net\n", __func__)); - } - } - } -diff --git a/Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.c -index a4c2af18..2c1d5bf5 100644 ---- a/Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.c -+++ b/Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.c -@@ -44,7 +44,7 @@ ArmN1SdpEntryPoint ( - DEBUG (( - DEBUG_ERROR, - "%a: Couldn't find the RAM Disk protocol - %r\n", -- __FUNCTION__, -+ __func__, - Status - )); - return Status; -@@ -60,7 +60,7 @@ ArmN1SdpEntryPoint ( - if (EFI_ERROR (Status)) { - DEBUG (( - DEBUG_ERROR, "%a: Failed to register RAM Disk - %r\n", -- __FUNCTION__, -+ __func__, - Status - )); - } -diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c -index 9ee0e78a..090139d4 100644 ---- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c -+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c -@@ -91,7 +91,7 @@ ArmSgiPkgEntryPoint ( - - Status = LocateAndInstallAcpiFromFv (&gArmSgiAcpiTablesGuid); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables\n", __func__)); - return Status; - } - -diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioDevices.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioDevices.c -index 5cf8f6a7..7e222569 100644 ---- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioDevices.c -+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioDevices.c -@@ -89,14 +89,14 @@ InitVirtioDevices ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Failed to install EFI_DEVICE_PATH protocol " - "for Virtio Block device (Status = %r)\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } else { - // Declare the Virtio BlockIo device - Status = VirtioMmioInstallDevice (FixedPcdGet32 (PcdVirtioBlkBaseAddress), - mVirtIoBlkController); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Unable to find Virtio Block MMIO device " -- "(Status == %r)\n", __FUNCTION__, Status)); -+ "(Status == %r)\n", __func__, Status)); - gBS->UninstallProtocolInterface ( - mVirtIoBlkController, - &gEfiDevicePathProtocolGuid, -@@ -104,7 +104,7 @@ InitVirtioDevices ( - ); - } else { - DEBUG ((DEBUG_INIT, "%a: Installed Virtio Block device\n", -- __FUNCTION__)); -+ __func__)); - } - } - } -@@ -118,7 +118,7 @@ InitVirtioDevices ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Failed to install EFI_DEVICE_PATH protocol " - "for Virtio Network device (Status = %r)\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } else { - // Declare the Virtio Net device - Status = VirtioMmioInstallDevice (FixedPcdGet32 (PcdVirtioNetBaseAddress), -@@ -126,7 +126,7 @@ InitVirtioDevices ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Unable to find Virtio Network MMIO device " - "(Status == %r)\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - gBS->UninstallProtocolInterface ( - mVirtIoNetController, - &gEfiDevicePathProtocolGuid, -@@ -134,7 +134,7 @@ InitVirtioDevices ( - ); - } else { - DEBUG ((DEBUG_INIT, "%a: Installed Virtio Network device\n", -- __FUNCTION__)); -+ __func__)); - } - } - } -diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.c -index aec96e6a..3763d248 100644 ---- a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.c -+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiApei.c -@@ -34,13 +34,13 @@ AcpiApeiUninstallTable ( - */ - Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **)&AcpiTableProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d: Unable to locate ACPI table protocol\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d: Unable to locate ACPI table protocol\n", __func__, __LINE__)); - return; - } - - Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID **)&AcpiTableSdtProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d: Unable to locate ACPI table support protocol\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d: Unable to locate ACPI table support protocol\n", __func__, __LINE__)); - return; - } - -@@ -56,7 +56,7 @@ AcpiApeiUninstallTable ( - &TableKey - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d Unable to get ACPI table\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d Unable to get ACPI table\n", __func__, __LINE__)); - return; - } - -@@ -65,7 +65,7 @@ AcpiApeiUninstallTable ( - */ - Status = AcpiTableProtocol->UninstallAcpiTable (AcpiTableProtocol, TableKey); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d: Unable to uninstall table\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d: Unable to uninstall table\n", __func__, __LINE__)); - } - } - -@@ -102,7 +102,7 @@ AdjustBERTRegionLen ( - &TableKey - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d Unable to get ACPI BERT table\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d Unable to get ACPI BERT table\n", __func__, __LINE__)); - return; - } - -@@ -401,7 +401,7 @@ AcpiApeiHestUpdateTable1P ( - &TableKey - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d Unable to get ACPI HEST table\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d Unable to get ACPI HEST table\n", __func__, __LINE__)); - return; - } - -diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPcct.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPcct.c -index 6f4b252a..dc2e4a64 100644 ---- a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPcct.c -+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPcct.c -@@ -242,7 +242,7 @@ PcctAdvertiseSharedMemoryAddress ( - - Status = MailboxMsgSetPccSharedMem (Socket, Doorbell, TRUE, (UINT64)PccSharedMemoryRegion); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to send mailbox message!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to send mailbox message!\n", __func__)); - ASSERT_EFI_ERROR (Status); - return Status; - } -@@ -253,7 +253,7 @@ PcctAdvertiseSharedMemoryAddress ( - Timeout = PCC_COMMAND_POLL_COUNT; - while (PccSharedMemoryRegion->Status.CommandComplete != 1) { - if (--Timeout <= 0) { -- DEBUG ((DEBUG_ERROR, "%a - Timeout occurred when polling the PCC Status Complete\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a - Timeout occurred when polling the PCC Status Complete\n", __func__)); - return EFI_TIMEOUT; - } - MicroSecondDelay (PCC_COMMAND_POLL_INTERVAL_US); -diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c -index 28c422df..fcd2e671 100644 ---- a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c -+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c -@@ -57,7 +57,7 @@ AcpiNotificationEvent ( - Rsdp->RsdtAddress = 0; - } - -- DEBUG ((DEBUG_INFO, "[%a:%d]-\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_INFO, "[%a:%d]-\n", __func__, __LINE__)); - } - - VOID -diff --git a/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c -index 865dfb89..22254266 100644 ---- a/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c -+++ b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c -@@ -120,7 +120,7 @@ PhaseNotify ( - (VOID **)&RootBridgeDevPath - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a %d: Failed to locate RootBridge DevicePath\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a %d: Failed to locate RootBridge DevicePath\n", __func__, __LINE__)); - break; - } - -diff --git a/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.c b/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.c -index 673a819e..d2738b95 100644 ---- a/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.c -+++ b/Platform/Ampere/JadePkg/Drivers/SmbiosMemInfoDxe/SmbiosMemInfoDxe.c -@@ -538,7 +538,7 @@ InstallMemStructures ( - (EFI_SMBIOS_TABLE_HEADER *)Table - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: adding SMBIOS type 16 socket %d failed\n", __FUNCTION__, Index)); -+ DEBUG ((DEBUG_ERROR, "%a: adding SMBIOS type 16 socket %d failed\n", __func__, Index)); - FreePool (Table); - // stop adding rather than continuing - return Status; -@@ -611,7 +611,7 @@ InstallMemStructures ( - DEBUG (( - DEBUG_ERROR, - "%a: adding SMBIOS type 17 Socket %d Slot %d failed\n", -- __FUNCTION__, -+ __func__, - Index, - SlotIndex - )); -@@ -656,7 +656,7 @@ InstallMemStructures ( - DEBUG (( - DEBUG_ERROR, - "%a: adding SMBIOS type 19 Socket %d MemRegion %d failed\n", -- __FUNCTION__, -+ __func__, - Index, - MemRegionIndex - )); -diff --git a/Platform/Ampere/JadePkg/Library/PCF85063RealTimeClockLib/PCF85063.c b/Platform/Ampere/JadePkg/Library/PCF85063RealTimeClockLib/PCF85063.c -index bc886b53..f5106b21 100644 ---- a/Platform/Ampere/JadePkg/Library/PCF85063RealTimeClockLib/PCF85063.c -+++ b/Platform/Ampere/JadePkg/Library/PCF85063RealTimeClockLib/PCF85063.c -@@ -82,7 +82,7 @@ RtcI2cWaitAccess ( - } - - if (Timeout <= 0) { -- DEBUG ((DEBUG_ERROR, "%a: Timeout while waiting access RTC\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Timeout while waiting access RTC\n", __func__)); - return EFI_TIMEOUT; - } - -@@ -293,7 +293,7 @@ PlatformInitialize ( - DEBUG (( - DEBUG_ERROR, - "%a:%d I2cSetupRuntime() failed - %r \n", -- __FUNCTION__, -+ __func__, - __LINE__, - Status - )); -@@ -306,7 +306,7 @@ PlatformInitialize ( - DEBUG (( - DEBUG_ERROR, - "%a:%d GpioSetupRuntime() failed - %r \n", -- __FUNCTION__, -+ __func__, - __LINE__, - Status - )); -diff --git a/Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.c b/Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.c -index 814378b3..147d32d1 100644 ---- a/Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.c -+++ b/Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.c -@@ -111,7 +111,7 @@ EFI_STATUS OemGetMacE2prom(IN UINT32 Port, OUT UINT8 *pucAddr) - Status = I2CInit(0, EEPROM_I2C_PORT, Normal); - if (EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Call I2CInit failed! p1=0x%x.\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Call I2CInit failed! p1=0x%x.\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -142,7 +142,7 @@ EFI_STATUS OemGetMacE2prom(IN UINT32 Port, OUT UINT8 *pucAddr) - } - if (EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Call I2cRead failed! p1=0x%x.\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Call I2cRead failed! p1=0x%x.\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -177,7 +177,7 @@ EFI_STATUS OemSetMacE2prom(IN UINT32 Port, IN UINT8 *pucAddr) - Status = I2CInit(0, EEPROM_I2C_PORT, Normal); - if (EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Call I2CInit failed! p1=0x%x.\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Call I2CInit failed! p1=0x%x.\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -208,7 +208,7 @@ EFI_STATUS OemSetMacE2prom(IN UINT32 Port, IN UINT8 *pucAddr) - } - if (EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Call I2cWrite failed! p1=0x%x.\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Call I2cWrite failed! p1=0x%x.\n", __func__, __LINE__, Status)); - return Status; - } - return EFI_SUCCESS; -@@ -224,14 +224,14 @@ EFIAPI OemGetMac2P ( - - if (NULL == Mac) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Mac buffer is null!\n", __FUNCTION__, __LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Mac buffer is null!\n", __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - - Status = OemGetMacE2prom(Port, Mac->Addr); - if ((EFI_ERROR(Status))) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Get mac failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Get mac failed!\n", __func__, __LINE__)); - - Mac->Addr[0] = 0x00; - Mac->Addr[1] = 0x18; -@@ -255,14 +255,14 @@ EFIAPI OemSetMac2P ( - - if (NULL == Mac) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Mac buffer is null!\n", __FUNCTION__, __LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Mac buffer is null!\n", __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - - Status = OemSetMacE2prom(Port, Mac->Addr); - if ((EFI_ERROR(Status))) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Set mac failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Set mac failed!\n", __func__, __LINE__)); - return Status; - } - -@@ -334,7 +334,7 @@ OemNicConfigEntry ( - - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Install Protocol failed %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Install Protocol failed %r\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -347,7 +347,7 @@ OemNicConfigEntry ( - - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Install Protocol failed %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Install Protocol failed %r\n", __func__, __LINE__, Status)); - return Status; - } - -diff --git a/Platform/Hisilicon/D03/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c b/Platform/Hisilicon/D03/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c -index be143c47..5bf69e90 100644 ---- a/Platform/Hisilicon/D03/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c -+++ b/Platform/Hisilicon/D03/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.c -@@ -444,7 +444,7 @@ LibRtcInitialize ( - Status = LibSetTime(&EfiTime); - if (EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Status : %r\n", __func__, __LINE__, Status)); - } - } - -diff --git a/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c b/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c -index a242e4bd..2cb8342f 100755 ---- a/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c -+++ b/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.c -@@ -98,14 +98,14 @@ GetMacAddress (UINT32 Port) - Status = gBS->LocateProtocol(&gHisiBoardNicProtocolGuid, NULL, (VOID **)&OemNic); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] LocateProtocol failed %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] LocateProtocol failed %r\n", __func__, __LINE__, Status)); - return Status; - } - - Status = OemNic->GetMac(&Mac, Port); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] GetMac failed %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] GetMac failed %r\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -192,7 +192,7 @@ UpdateRefClk (IN VOID* Fdt) - - ArmArchTimerReadReg (CntFrq, &ArchTimerFreq); - if (!ArchTimerFreq) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Get timer frequency failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Get timer frequency failed!\n", __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - -@@ -210,7 +210,7 @@ UpdateRefClk (IN VOID* Fdt) - - m_prop = fdt_get_property_w(Fdt, node, Property, &m_oldlen); - if(!m_prop) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Can't find property %a\n", __FUNCTION__, __LINE__, Property)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Can't find property %a\n", __func__, __LINE__, Property)); - return EFI_INVALID_PARAMETER; - } - -@@ -250,7 +250,7 @@ GetMemoryNode(VOID* Fdt) - - if(node < 0) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] fdt add subnode error\n", __FUNCTION__, __LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] fdt add subnode error\n", __func__, __LINE__)); - - return node; - } -diff --git a/Platform/Hisilicon/D03/Library/HisiOemMiscLib2P/BoardFeature2PHi1610.c b/Platform/Hisilicon/D03/Library/HisiOemMiscLib2P/BoardFeature2PHi1610.c -index 5c4f7325..b7ee8777 100644 ---- a/Platform/Hisilicon/D03/Library/HisiOemMiscLib2P/BoardFeature2PHi1610.c -+++ b/Platform/Hisilicon/D03/Library/HisiOemMiscLib2P/BoardFeature2PHi1610.c -@@ -71,7 +71,7 @@ SERDES_PARAM gSerdesParam1 = { - EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId) - { - if (ParamA == NULL) { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Param == NULL!\n", __FUNCTION__, __LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Param == NULL!\n", __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - -diff --git a/Platform/Hisilicon/D05/Library/HisiOemMiscLibD05/BoardFeatureD05.c b/Platform/Hisilicon/D05/Library/HisiOemMiscLibD05/BoardFeatureD05.c -index 2cda0fd7..0746ff32 100644 ---- a/Platform/Hisilicon/D05/Library/HisiOemMiscLibD05/BoardFeatureD05.c -+++ b/Platform/Hisilicon/D05/Library/HisiOemMiscLibD05/BoardFeatureD05.c -@@ -87,7 +87,7 @@ OemGetSerdesParam ( - ) - { - if (ParamA == NULL || ParamB == NULL) { -- DEBUG((DEBUG_ERROR, "[%a]:[%dL] Param == NULL!\n", __FUNCTION__, __LINE__)); -+ DEBUG((DEBUG_ERROR, "[%a]:[%dL] Param == NULL!\n", __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - -diff --git a/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c -index c5c32901..4a26d811 100644 ---- a/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c -+++ b/Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c -@@ -56,7 +56,7 @@ OemNicConfigEntry ( - - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Install Protocol failed %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return Status; - } - -diff --git a/Platform/Hisilicon/D06/Library/HisiOemMiscLibD06/BoardFeatureD06.c b/Platform/Hisilicon/D06/Library/HisiOemMiscLibD06/BoardFeatureD06.c -index 01f5e091..b8a4003c 100644 ---- a/Platform/Hisilicon/D06/Library/HisiOemMiscLibD06/BoardFeatureD06.c -+++ b/Platform/Hisilicon/D06/Library/HisiOemMiscLibD06/BoardFeatureD06.c -@@ -89,10 +89,10 @@ OemGetSerdesParam ( - ) - { - if (NULL == ParamA) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Param == NULL!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Param == NULL!\n", __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } if (NULL == ParamB) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Param == NULL!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Param == NULL!\n", __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - -diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c -index 42a5a080..11e539f7 100644 ---- a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c -+++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c -@@ -129,7 +129,7 @@ OemGetMacE2prom( - if (EFI_ERROR (Status)) - { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Call I2CInit failed! p1=0x%x.\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return Status; - } - -@@ -160,7 +160,7 @@ OemGetMacE2prom( - } - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Call I2cRead failed! p1=0x%x.\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return Status; - } - -@@ -209,7 +209,7 @@ OemSetMacE2prom ( - Status = I2CInit (0, EEPROM_I2C_PORT, Normal); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Call I2CInit failed! p1=0x%x.\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return Status; - } - -@@ -245,7 +245,7 @@ OemSetMacE2prom ( - } - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Call I2cWrite failed! p1=0x%x.\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return Status; - } - return EFI_SUCCESS; -@@ -262,7 +262,7 @@ OemGetMac ( - - if (Mac == NULL) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Mac buffer is null!\n", -- __FUNCTION__, __LINE__)); -+ __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - -@@ -270,7 +270,7 @@ OemGetMac ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "[%a]:[%dL] Cannot get MAC from EEPROM, Status: %r; using default MAC.\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - - Mac->Addr[0] = 0xFF; - Mac->Addr[1] = 0xFF; -@@ -295,13 +295,13 @@ OemSetMac ( - - if (Mac == NULL) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Mac buffer is null!\n", -- __FUNCTION__, __LINE__)); -+ __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - - Status = OemSetMacE2prom (Port, Mac->Addr); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Set mac failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Set mac failed!\n", __func__, __LINE__)); - return Status; - } - -diff --git a/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c -index 7a2d7b26..bdbc7cec 100644 ---- a/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c -+++ b/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c -@@ -123,7 +123,7 @@ ConstructRootBridge ( - - DevicePath = AllocateCopyPool(sizeof mEfiPciRootBridgeDevicePath, &mEfiPciRootBridgeDevicePath); - if (DevicePath == NULL) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL] AllocatePool failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] AllocatePool failed!\n", __func__, __LINE__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -182,7 +182,7 @@ PciHostBridgeGetRootBridges ( - - Bridges = AllocatePool (RootBridgeCount * sizeof *Bridges); - if (Bridges == NULL) { -- DEBUG ((DEBUG_ERROR, "[%a:%d] - AllocatePool failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a:%d] - AllocatePool failed!\n", __func__, __LINE__)); - return NULL; - } - -diff --git a/Platform/Intel/BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.c b/Platform/Intel/BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.c -index 88eb7d70..c1f329b9 100644 ---- a/Platform/Intel/BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.c -+++ b/Platform/Intel/BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.c -@@ -41,7 +41,7 @@ BdsHookDxeEntryPoint ( - EFI_STATUS Status; - VOID *Registration; - -- DEBUG ((DEBUG_INFO, "%a starts\n", __FUNCTION__ )); -+ DEBUG ((DEBUG_INFO, "%a starts\n", __func__ )); - - // - // Create event to set proper video resolution and text mode for internal shell. -diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c -index 81cd8b94..9fa68638 100644 ---- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c -+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiBoardPolicyUpdate.c -@@ -49,7 +49,7 @@ PeiFspBoardPolicyUpdatePreMem ( - IN OUT FSPM_UPD *FspmUpd - ) - { -- DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a() Start\n", __func__)); - - // BUGBUG: Preserve FSP defaults - PeiSiliconPolicyInitLibFsp ultimately overrides to 0. - // Drop when https://edk2.groups.io/g/devel/message/79391 is merged -@@ -71,7 +71,7 @@ PeiFspBoardPolicyUpdatePreMem ( - /* PCIe config */ - FspmUpd->FspmConfig.PcieRpEnableMask = 0x341; // Ports 1, 7, 9 and 10 - -- DEBUG ((DEBUG_INFO, "%a() End\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a() End\n", __func__)); - return EFI_SUCCESS; - } - -@@ -92,7 +92,7 @@ PeiFspBoardPolicyUpdate ( - { - INTN Index; - -- DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a() Start\n", __func__)); - - // FIXME/NB: This is insecure and not production-ready! - // TODO: Configure SPI lockdown by variable on FrontPage? -@@ -281,6 +281,6 @@ PeiFspBoardPolicyUpdate ( - /* GbE config */ - FspsUpd->FspsConfig.PchLanEnable = 0; - -- DEBUG ((DEBUG_INFO, "%a() End\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a() End\n", __func__)); - return EFI_SUCCESS; - } -diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/SmmAspireVn7Dash572GAcpiEnableLib.c b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/SmmAspireVn7Dash572GAcpiEnableLib.c -index 69e9c928..3e96ce49 100644 ---- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/SmmAspireVn7Dash572GAcpiEnableLib.c -+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardAcpiLib/SmmAspireVn7Dash572GAcpiEnableLib.c -@@ -24,13 +24,13 @@ AspireVn7Dash572GBoardEnableAcpi ( - * Further reversing will be performed */ - Status = SendEcCommand (0xE9); /* Vendor implements using ACPI "CMDB" register" */ - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(): SendEcCommand(0xE9) failed!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a(): SendEcCommand(0xE9) failed!\n", __func__)); - return EFI_DEVICE_ERROR; - } - - Status = SendEcData (0x81); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(): SendEcData(0x81) failed!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a(): SendEcData(0x81) failed!\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -52,13 +52,13 @@ AspireVn7Dash572GBoardDisableAcpi ( - * Further reversing will be performed */ - Status = SendEcCommand (0xE9); /* Vendor implements using ACPI "CMDB" register" */ - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(): SendEcCommand(0xE9) failed!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a(): SendEcCommand(0xE9) failed!\n", __func__)); - return EFI_DEVICE_ERROR; - } - - Status = SendEcData (0x80); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(): SendEcData(0x80) failed!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a(): SendEcData(0x80) failed!\n", __func__)); - return EFI_DEVICE_ERROR; - } - -diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c -index 6e752b4e..673449e6 100644 ---- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c -+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardEcLib/EcCommands.c -@@ -61,19 +61,19 @@ EcCmd90Read ( - - Status = SendEcCommand (0x90); - if (EFI_ERROR (Status)) { -- DEBUG((DEBUG_ERROR, "%a(): SendEcCommand(0x90) failed!\n", __FUNCTION__)); -+ DEBUG((DEBUG_ERROR, "%a(): SendEcCommand(0x90) failed!\n", __func__)); - return Status; - } - - Status = SendEcData (Address); - if (EFI_ERROR (Status)) { -- DEBUG((DEBUG_ERROR, "%a(): SendEcData(Address) failed!\n", __FUNCTION__)); -+ DEBUG((DEBUG_ERROR, "%a(): SendEcData(Address) failed!\n", __func__)); - return Status; - } - - Status = ReceiveEcData (Data); - if (EFI_ERROR (Status)) { -- DEBUG((DEBUG_ERROR, "%a(): ReceiveEcData(Data) failed!\n", __FUNCTION__)); -+ DEBUG((DEBUG_ERROR, "%a(): ReceiveEcData(Data) failed!\n", __func__)); - return Status; - } - return EFI_SUCCESS; -@@ -99,19 +99,19 @@ EcCmd91Write ( - - Status = SendEcCommand (0x91); - if (EFI_ERROR (Status)) { -- DEBUG((DEBUG_ERROR, "%a(): SendEcCommand(0x91) failed!\n", __FUNCTION__)); -+ DEBUG((DEBUG_ERROR, "%a(): SendEcCommand(0x91) failed!\n", __func__)); - return Status; - } - - Status = SendEcData (Address); - if (EFI_ERROR (Status)) { -- DEBUG((DEBUG_ERROR, "%a(): SendEcData(Address) failed!\n", __FUNCTION__)); -+ DEBUG((DEBUG_ERROR, "%a(): SendEcData(Address) failed!\n", __func__)); - return Status; - } - - Status = SendEcData (Data); - if (EFI_ERROR (Status)) { -- DEBUG((DEBUG_ERROR, "%a(): SendEcData(Data) failed!\n", __FUNCTION__)); -+ DEBUG((DEBUG_ERROR, "%a(): SendEcData(Data) failed!\n", __func__)); - return Status; - } - return EFI_SUCCESS; -@@ -140,13 +140,13 @@ EcCmd94Query ( - - Status = SendEcCommand (0x94); - if (EFI_ERROR (Status)) { -- DEBUG((DEBUG_ERROR, "%a(): SendEcCommand(0x94) failed!\n", __FUNCTION__)); -+ DEBUG((DEBUG_ERROR, "%a(): SendEcCommand(0x94) failed!\n", __func__)); - return Status; - } - - Status = ReceiveEcData (Data); - if (EFI_ERROR (Status)) { -- DEBUG((DEBUG_ERROR, "%a(): ReceiveEcData(Data) failed!\n", __FUNCTION__)); -+ DEBUG((DEBUG_ERROR, "%a(): ReceiveEcData(Data) failed!\n", __func__)); - return Status; - } - return EFI_SUCCESS; -diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.c b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.c -index 5f89d87e..d6ffb175 100644 ---- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.c -+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.c -@@ -40,7 +40,7 @@ BoardDetect ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a(): Deferred until LPC programming is complete\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a(): Deferred until LPC programming is complete\n", __func__)); - return EFI_SUCCESS; - } - -diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c -index 2a833ec9..e7897cc2 100644 ---- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c -+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c -@@ -1375,7 +1375,7 @@ IsAcpiTableChange ( - Xsdt = NULL; - FacsPtr = NULL; - -- DEBUG ((DEBUG_INFO, "%a() - Start\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a() - Start\n", __func__)); - - Status = EfiGetSystemConfigurationTable (&gEfiAcpiTableGuid, (VOID **)&Rsdp); - if (EFI_ERROR (Status) || (Rsdp == NULL)) { -@@ -1430,7 +1430,7 @@ IsAcpiTableChange ( - DEBUG ((DEBUG_INFO, "HardwareSignature = %x and Status = %r\n", FacsPtr->HardwareSignature, Status)); - - FreePool (TableCrcRecord); -- DEBUG ((DEBUG_INFO, "%a() - End\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a() - End\n", __func__)); - } - - VOID -diff --git a/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c b/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c -index 31a9ef4a..a340c148 100644 ---- a/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c -+++ b/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c -@@ -106,7 +106,7 @@ BdsSignalEventBeforeConsoleAfterTrustedConsole ( - EFI_STATUS Status; - EFI_EVENT BdsConsoleEvent; - -- DEBUG ((DEBUG_INFO, "%a \n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a \n", __func__)); - - Status = CreateBdsEvent ( - TPL_CALLBACK, -@@ -137,7 +137,7 @@ BdsSignalEventBeforeConsoleBeforeEndOfDxe ( - EFI_STATUS Status; - EFI_EVENT BdsConsoleEvent; - -- DEBUG ((DEBUG_INFO, "%a \n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a \n", __func__)); - - Status = CreateBdsEvent ( - TPL_CALLBACK, -@@ -167,7 +167,7 @@ BdsSignalEventAfterConsoleReadyBeforeBootOption ( - EFI_STATUS Status; - EFI_EVENT BdsConsoleEvent; - -- DEBUG ((DEBUG_INFO, "%a \n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a \n", __func__)); - - Status = CreateBdsEvent ( - TPL_CALLBACK, -diff --git a/Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c -index 6283d602..60882daf 100644 ---- a/Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c -+++ b/Platform/Intel/PurleyOpenBoardPkg/Override/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c -@@ -240,7 +240,7 @@ LocatePciExpressCapabilityRegBlock ( - DEBUG (( - DEBUG_WARN, - "%a: [%02x|%02x|%02x] failed to access config space at offset 0x%x\n", -- __FUNCTION__, -+ __func__, - PciIoDevice->BusNumber, - PciIoDevice->DeviceNumber, - PciIoDevice->FunctionNumber, -diff --git a/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c b/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c -index b03d5bbb..ecdb6851 100644 ---- a/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c -+++ b/Platform/Intel/PurleyOpenBoardPkg/Override/Platform/Intel/MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/BdsPlatform.c -@@ -112,7 +112,7 @@ BdsSignalEventBeforeConsoleAfterTrustedConsole ( - EFI_STATUS Status; - EFI_EVENT BdsConsoleEvent; - -- DEBUG ((DEBUG_INFO, "%a \n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a \n", __func__)); - - Status = CreateBdsEvent ( - TPL_CALLBACK, -@@ -143,7 +143,7 @@ BdsSignalEventBeforeConsoleBeforeEndOfDxe ( - EFI_STATUS Status; - EFI_EVENT BdsConsoleEvent; - -- DEBUG ((DEBUG_INFO, "%a \n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a \n", __func__)); - - Status = CreateBdsEvent ( - TPL_CALLBACK, -@@ -173,7 +173,7 @@ BdsSignalEventAfterConsoleReadyBeforeBootOption ( - EFI_STATUS Status; - EFI_EVENT BdsConsoleEvent; - -- DEBUG ((DEBUG_INFO, "%a \n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a \n", __func__)); - - Status = CreateBdsEvent ( - TPL_CALLBACK, -diff --git a/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c b/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c -index 238513f6..0c45ea9f 100644 ---- a/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c -+++ b/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c -@@ -275,7 +275,7 @@ RemoveStaleFvFileOptions ( - DEBUG (( - EFI_ERROR (Status) ? EFI_D_WARN : DEBUG_VERBOSE, - "%a: removing stale Boot#%04x %s: %r\n", -- __FUNCTION__, -+ __func__, - (UINT32)BootOptions[Index].OptionNumber, - DevicePathString == NULL ? L"" : DevicePathString, - Status -@@ -948,7 +948,7 @@ SetPciIntLine ( - // DEBUG(( - // DEBUG_ERROR, - // "%a: PCI host bridge (00:00.0) should have no interrupts!\n", --// __FUNCTION__ -+// __func__ - // )); - // ASSERT (FALSE); - } -@@ -997,7 +997,7 @@ SetPciIntLine ( - Status = PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function); - ASSERT_EFI_ERROR (Status); - -- DEBUG ((DEBUG_VERBOSE, "%a: [%02x:%02x.%x] %s -> 0x%02x\n", __FUNCTION__, -+ DEBUG ((DEBUG_VERBOSE, "%a: [%02x:%02x.%x] %s -> 0x%02x\n", __func__, - (UINT32)Bus, (UINT32)Device, (UINT32)Function, DevPathString, - IrqLine)); - -@@ -1081,7 +1081,7 @@ PciAcpiInitialization ( - break; - default: - DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n", -- __FUNCTION__, mHostBridgeDevId)); -+ __func__, mHostBridgeDevId)); - ASSERT (FALSE); - return; - } -@@ -1113,7 +1113,7 @@ PlatformBdsConnectSequence ( - { - UINTN Index; - -- DEBUG ((DEBUG_INFO, "%a called\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a called\n", __func__)); - - Index = 0; - -@@ -1283,7 +1283,7 @@ BdsReadyToBootCallback ( - IN VOID *Context - ) - { -- DEBUG ((DEBUG_INFO, "%a called\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a called\n", __func__)); - } - - -@@ -1313,7 +1313,7 @@ BdsSmmReadyToLockCallback ( - return; - } - -- DEBUG ((DEBUG_INFO, "%a called\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a called\n", __func__)); - - // - // Dispatch the deferred 3rd party images. -@@ -1377,7 +1377,7 @@ BdsPciEnumCompleteCallback ( - PlatformConsole[MaxCount - 1].DevicePath = NULL; - } - -- DEBUG ((DEBUG_INFO, "%a called\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a called\n", __func__)); - - PlatformInitializeConsole (PlatformConsole); - } -@@ -1401,7 +1401,7 @@ BdsBeforeConsoleAfterTrustedConsoleCallback ( - UINTN Index; - EFI_STATUS Status; - -- DEBUG ((DEBUG_INFO, "%a called\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a called\n", __func__)); - - NvBootOptions = EfiBootManagerGetLoadOptions (&NvBootOptionCount, LoadOptionTypeBoot); - for (Index = 0; Index < NvBootOptionCount; Index++) { -@@ -1410,7 +1410,7 @@ BdsBeforeConsoleAfterTrustedConsoleCallback ( - DEBUG (( - DEBUG_ERROR, - "%a: removing Boot#%04x %r\n", -- __FUNCTION__, -+ __func__, - (UINT32) NvBootOptions[Index].OptionNumber, - Status - )); -@@ -1441,7 +1441,7 @@ BdsBeforeConsoleBeforeEndOfDxeGuidCallback ( - IN EFI_EVENT Event, - IN VOID *Context - ){ -- DEBUG ((DEBUG_INFO, "%a called\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a called\n", __func__)); - } - - /** -@@ -1459,7 +1459,7 @@ BdsAfterConsoleReadyBeforeBootOptionCallback ( - { - EFI_BOOT_MODE BootMode; - -- DEBUG ((DEBUG_INFO, "%a called\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a called\n", __func__)); - - // - // Get current Boot Mode -diff --git a/Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c -index 3b71c8ae..673f90a1 100644 ---- a/Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c -+++ b/Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c -@@ -151,7 +151,7 @@ InitRootBridge ( - DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate, - &mRootBridgeDevicePathTemplate); - if (DevicePath == NULL) { -- DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES)); -+ DEBUG ((EFI_D_ERROR, "%a: %r\n", __func__, EFI_OUT_OF_RESOURCES)); - return EFI_OUT_OF_RESOURCES; - } - DevicePath->AcpiDevicePath.UID = RootBusNumber; -@@ -159,7 +159,7 @@ InitRootBridge ( - - DEBUG ((EFI_D_INFO, - "%a: populated root bus %d, with room for %d subordinate bus(es)\n", -- __FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber)); -+ __func__, RootBusNumber, MaxSubBusNumber - RootBusNumber)); - return EFI_SUCCESS; - } - -@@ -243,7 +243,7 @@ PciHostBridgeGetRootBridges ( - // - Bridges = AllocatePool ((1 + (UINTN)ExtraRootBridges) * sizeof *Bridges); - if (Bridges == NULL) { -- DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES)); -+ DEBUG ((EFI_D_ERROR, "%a: %r\n", __func__, EFI_OUT_OF_RESOURCES)); - return NULL; - } - Initialized = 0; -diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c -index 09d43c6b..2e4bc648 100644 ---- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c -+++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c -@@ -370,7 +370,7 @@ DecompressMemFvs ( - DEBUG ((EFI_D_VERBOSE, "PcdSimicsDecompressionScratchEnd: 0x%x\n", PcdGet32 (PcdSimicsDecompressionScratchEnd))); - - DEBUG ((EFI_D_VERBOSE, "%a: OutputBuffer@%p+0x%x ScratchBuffer@%p+0x%x " -- "PcdSimicsDecompressionScratchEnd=0x%x\n", __FUNCTION__, OutputBuffer, -+ "PcdSimicsDecompressionScratchEnd=0x%x\n", __func__, OutputBuffer, - OutputBufferSize, ScratchBuffer, ScratchBufferSize, - PcdGet32 (PcdSimicsDecompressionScratchEnd))); - ASSERT ((UINTN)ScratchBuffer + ScratchBufferSize == -diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c b/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c -index c856ff44..ddfed72d 100644 ---- a/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c -+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c -@@ -228,7 +228,7 @@ ExtractConfig ( - MAIN_FORM_STATE MainFormState; - EFI_STATUS Status; - -- DEBUG ((EFI_D_VERBOSE, "%a: Request=\"%s\"\n", __FUNCTION__, Request)); -+ DEBUG ((EFI_D_VERBOSE, "%a: Request=\"%s\"\n", __func__, Request)); - - Status = PlatformConfigToFormState (&MainFormState); - if (EFI_ERROR (Status)) { -@@ -244,9 +244,9 @@ ExtractConfig ( - Results, Progress); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "%a: BlockToConfig(): %r, Progress=\"%s\"\n", -- __FUNCTION__, Status, (Status == EFI_DEVICE_ERROR) ? NULL : *Progress)); -+ __func__, Status, (Status == EFI_DEVICE_ERROR) ? NULL : *Progress)); - } else { -- DEBUG ((EFI_D_VERBOSE, "%a: Results=\"%s\"\n", __FUNCTION__, *Results)); -+ DEBUG ((EFI_D_VERBOSE, "%a: Results=\"%s\"\n", __func__, *Results)); - } - return Status; - } -@@ -321,7 +321,7 @@ RouteConfig ( - UINTN BlockSize; - EFI_STATUS Status; - -- DEBUG ((EFI_D_VERBOSE, "%a: Configuration=\"%s\"\n", __FUNCTION__, -+ DEBUG ((EFI_D_VERBOSE, "%a: Configuration=\"%s\"\n", __func__, - Configuration)); - - // -@@ -344,7 +344,7 @@ RouteConfig ( - (VOID *) &MainFormState, &BlockSize, Progress); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "%a: ConfigToBlock(): %r, Progress=\"%s\"\n", -- __FUNCTION__, Status, -+ __func__, Status, - (Status == EFI_BUFFER_TOO_SMALL) ? NULL : *Progress)); - return Status; - } -@@ -373,7 +373,7 @@ Callback ( - ) - { - DEBUG ((EFI_D_VERBOSE, "%a: Action=0x%Lx QuestionId=%d Type=%d\n", -- __FUNCTION__, (UINT64) Action, QuestionId, Type)); -+ __func__, (UINT64) Action, QuestionId, Type)); - - if (Action != EFI_BROWSER_ACTION_CHANGED) { - return EFI_UNSUPPORTED; -@@ -661,7 +661,7 @@ ExecutePlatformConfig ( - Status = PlatformConfigLoad (&PlatformConfig, &OptionalElements); - if (EFI_ERROR (Status)) { - DEBUG (((Status == EFI_NOT_FOUND) ? EFI_D_VERBOSE : EFI_D_ERROR, -- "%a: failed to load platform config: %r\n", __FUNCTION__, Status)); -+ "%a: failed to load platform config: %r\n", __func__, Status)); - return Status; - } - -diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/FeatureControl.c b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/FeatureControl.c -index 9d2fc65a..0790bc53 100644 ---- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/FeatureControl.c -+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/FeatureControl.c -@@ -63,7 +63,7 @@ OnMpServicesAvailable ( - EFI_PEI_MP_SERVICES_PPI *MpServices; - EFI_STATUS Status; - -- DEBUG ((EFI_D_VERBOSE, "%a: %a\n", gEfiCallerBaseName, __FUNCTION__)); -+ DEBUG ((EFI_D_VERBOSE, "%a: %a\n", gEfiCallerBaseName, __func__)); - // - // Write the MSR on all the APs in parallel. - // -@@ -77,7 +77,7 @@ OnMpServicesAvailable ( - NULL // ProcedureArgument - ); - if (EFI_ERROR (Status) && Status != EFI_NOT_STARTED) { -- DEBUG ((EFI_D_ERROR, "%a: StartupAllAps(): %r\n", __FUNCTION__, Status)); -+ DEBUG ((EFI_D_ERROR, "%a: StartupAllAps(): %r\n", __func__, Status)); - return Status; - } - -@@ -110,6 +110,6 @@ InstallFeatureControlCallback ( - Status = PeiServicesNotifyPpi (&mMpServicesNotify); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "%a: failed to set up MP Services callback: %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - } -diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c -index b1df1c2e..bef2221e 100644 ---- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c -+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c -@@ -49,7 +49,7 @@ X58TsegMbytesInitialization( - DEBUG_ERROR, - "%a: no TSEG (SMRAM) on host bridge DID=0x%04x; " - "only DID=0x%04x (X58) is supported\n", -- __FUNCTION__, -+ __func__, - mHostBridgeDevId, - INTEL_ICH10_DEVICE_ID - )); -@@ -155,7 +155,7 @@ GetFirstNonAddress ( - if (Pci64Size == 0) { - if (mBootMode != BOOT_ON_S3_RESUME) { - DEBUG ((EFI_D_INFO, "%a: disabling 64-bit PCI host aperture\n", -- __FUNCTION__)); -+ __func__)); - PcdSet64S (PcdPciMmio64Size, 0); - } - -@@ -191,7 +191,7 @@ GetFirstNonAddress ( - PcdSet64S (PcdPciMmio64Base, Pci64Base); - PcdSet64S (PcdPciMmio64Size, Pci64Size); - DEBUG ((EFI_D_INFO, "%a: Pci64Base=0x%Lx Pci64Size=0x%Lx\n", -- __FUNCTION__, Pci64Base, Pci64Size)); -+ __func__, Pci64Base, Pci64Size)); - } - - // -@@ -351,7 +351,7 @@ PublishPeiMemory ( - } else { - PeiMemoryCap = GetPeiMemoryCap (); - DEBUG ((EFI_D_INFO, "%a: mPhysMemAddressWidth=%d PeiMemoryCap=%u KB\n", -- __FUNCTION__, mPhysMemAddressWidth, PeiMemoryCap >> 10)); -+ __func__, mPhysMemAddressWidth, PeiMemoryCap >> 10)); - - // - // Determine the range of memory to use during PEI -@@ -397,7 +397,7 @@ QemuInitializeRam ( - EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *SmramHobDescriptorBlock; - VOID *GuidHob; - -- DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__)); -+ DEBUG ((EFI_D_INFO, "%a called\n", __func__)); - - // - // Determine total memory size available -diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c -index 6963f39a..39ce2b46 100644 ---- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c -+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c -@@ -363,7 +363,7 @@ MiscInitialization ( - break; - default: - DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n", -- __FUNCTION__, mHostBridgeDevId)); -+ __func__, mHostBridgeDevId)); - ASSERT (FALSE); - return; - } -diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/Initialize.c b/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/Initialize.c -index c8a76636..8c4b2144 100644 ---- a/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/Initialize.c -+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/Initialize.c -@@ -289,14 +289,14 @@ QemuVideoBochsModeSetup ( - Private->PciIo->Mem.Read (Private->PciIo, EfiPciIoWidthUint32, - PCI_BAR_IDX2, 40, 1, &AvailableFbSize))) { - DEBUG ((EFI_D_ERROR, "%a: can't read size of drawable buffer from QXL " -- "ROM\n", __FUNCTION__)); -+ "ROM\n", __func__)); - return EFI_NOT_FOUND; - } - } else { - AvailableFbSize = BochsRead (Private, VBE_DISPI_INDEX_VIDEO_MEMORY_64K); - AvailableFbSize *= SIZE_64KB; - } -- DEBUG ((EFI_D_INFO, "%a: AvailableFbSize=0x%x\n", __FUNCTION__, -+ DEBUG ((EFI_D_INFO, "%a: AvailableFbSize=0x%x\n", __func__, - AvailableFbSize)); - - // -diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/VbeShim.c b/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/VbeShim.c -index ba13e3d8..bb16cca0 100644 ---- a/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/VbeShim.c -+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/VbeShim.c -@@ -71,12 +71,12 @@ InstallVbeShim ( - DEBUG (( - DEBUG_WARN, - "%a: page 0 protected, not installing VBE shim\n", -- __FUNCTION__ -+ __func__ - )); - DEBUG (( - DEBUG_WARN, - "%a: page 0 protection prevents Windows 7 from booting anyway\n", -- __FUNCTION__ -+ __func__ - )); - return; - } -@@ -113,7 +113,7 @@ InstallVbeShim ( - Handler = (Int0x10->Segment << 4) + Int0x10->Offset; - if (Handler >= SegmentC && Handler < SegmentF) { - DEBUG ((EFI_D_INFO, "%a: Video BIOS handler found at %04x:%04x\n", -- __FUNCTION__, Int0x10->Segment, Int0x10->Offset)); -+ __func__, Int0x10->Segment, Int0x10->Offset)); - return; - } - -@@ -124,7 +124,7 @@ InstallVbeShim ( - DEBUG (( - DEBUG_INFO, - "%a: failed to allocate page at zero: %r\n", -- __FUNCTION__, -+ __func__, - Segment0AllocationStatus - )); - } else { -@@ -144,7 +144,7 @@ InstallVbeShim ( - DEBUG(( - DEBUG_ERROR, - "%a: unknown host bridge device ID: 0x%04x\n", -- __FUNCTION__, -+ __func__, - HostBridgeDevId - )); - ASSERT (FALSE); -@@ -298,5 +298,5 @@ InstallVbeShim ( - Int0x10->Segment = (UINT16) ((UINT32)SegmentC >> 4); - Int0x10->Offset = (UINT16) ((UINTN) (VbeModeInfo + 1) - SegmentC); - -- DEBUG ((EFI_D_INFO, "%a: VBE shim installed\n", __FUNCTION__)); -+ DEBUG ((EFI_D_INFO, "%a: VBE shim installed\n", __func__)); - } -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Aowanda/Uba/TypeAowanda/Pei/AcpiTablePcds.c b/Platform/Intel/WhitleyOpenBoardPkg/Aowanda/Uba/TypeAowanda/Pei/AcpiTablePcds.c -index 1810990b..be1977dc 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/Aowanda/Uba/TypeAowanda/Pei/AcpiTablePcds.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/Aowanda/Uba/TypeAowanda/Pei/AcpiTablePcds.c -@@ -41,7 +41,7 @@ TypeAowandaPlatformUpdateAcpiTablePcds ( - // # - Size = AsciiStrSize (AcpiName10nm); - Status = PcdSetPtrS (PcdOemSkuAcpiName, &Size, AcpiName10nm); -- DEBUG ((DEBUG_INFO, "%a TypeAowanda ICX\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a TypeAowanda ICX\n", __func__)); - ASSERT_EFI_ERROR (Status); - - Size = AsciiStrSize (OemTableIdXhci); -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Aowanda/Uba/TypeAowanda/Pei/PcdData.c b/Platform/Intel/WhitleyOpenBoardPkg/Aowanda/Uba/TypeAowanda/Pei/PcdData.c -index 07fdb966..7775f7b6 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/Aowanda/Uba/TypeAowanda/Pei/PcdData.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/Aowanda/Uba/TypeAowanda/Pei/PcdData.c -@@ -57,7 +57,7 @@ GpioGetRiserId ( - RevId = 0; - DynamicSiLibraryPpi = NULL; - -- DEBUG((EFI_D_INFO, "%a Entry...\n", __FUNCTION__)); -+ DEBUG((EFI_D_INFO, "%a Entry...\n", __func__)); - - Status = PeiServicesLocatePpi (&gDynamicSiLibraryPpiGuid, 0, NULL, (VOID **) &DynamicSiLibraryPpi); - if (EFI_ERROR (Status)) { -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/AcpiTablePcds.c b/Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/AcpiTablePcds.c -index 1fdb9c21..cc745701 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/AcpiTablePcds.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/AcpiTablePcds.c -@@ -40,7 +40,7 @@ TypeBoardPortTemplatePlatformUpdateAcpiTablePcds ( - //# - Size = AsciiStrSize (AcpiName10nm); - Status = PcdSetPtrS (PcdOemSkuAcpiName , &Size, AcpiName10nm); -- DEBUG ((DEBUG_INFO, "%a TypeBoardPortTemplate ICX\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a TypeBoardPortTemplate ICX\n", __func__)); - ASSERT_EFI_ERROR (Status); - - Size = AsciiStrSize (OemTableIdXhci); -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiPlatform/AcpiPlatform.c b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiPlatform/AcpiPlatform.c -index a884c974..b3bcc680 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiPlatform/AcpiPlatform.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiPlatform/AcpiPlatform.c -@@ -57,7 +57,7 @@ AcpiOnPciEnumCmplCallback ( - } - gBS->CloseEvent (Event); - -- DEBUG ((DEBUG_INFO, "[ACPI] %a\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "[ACPI] %a\n", __func__)); - AcpiVtdTablesInstall (); - } - -@@ -69,7 +69,7 @@ AcpiOnEndOfDxeCallback ( - IN VOID *Context - ) - { -- DEBUG ((DEBUG_INFO, "[ACPI] %a\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "[ACPI] %a\n", __func__)); - // - // Installing ACPI Tables: NFIT, PCAT - // -@@ -92,7 +92,7 @@ AcpiOnExitBootServicesCallback ( - - gBS->CloseEvent (Event); - -- DEBUG ((DEBUG_INFO, "[ACPI] %a\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "[ACPI] %a\n", __func__)); - // - // Enable SCI - // -@@ -212,7 +212,7 @@ AcpiOnReadyToBootCallback ( - return; - } - mFirstNotify = TRUE; -- DEBUG ((DEBUG_INFO, "[ACPI] %a\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "[ACPI] %a\n", __func__)); - - Status = GetEntireConfig (&SetupData); - ASSERT_EFI_ERROR (Status); -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatformHooks.c b/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatformHooks.c -index 42751a10..ee1ce08c 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatformHooks.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatformHooks.c -@@ -720,7 +720,7 @@ PlatformPrepController ( - &DummyData - ); - PCIDEBUG ("%a: For B(0x%x)-D(0x%x)-F(0x%x),Pci.Write() returns with %r\n", -- __FUNCTION__, SecBus, Device, Func, Status); -+ __func__, SecBus, Device, Func, Status); - - if (EFI_ERROR (Status)) { - // -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/Uba/TypeJunctionCity/Pei/AcpiTablePcds.c b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/Uba/TypeJunctionCity/Pei/AcpiTablePcds.c -index 8a6fc174..3cf10cf5 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/Uba/TypeJunctionCity/Pei/AcpiTablePcds.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/JunctionCity/Uba/TypeJunctionCity/Pei/AcpiTablePcds.c -@@ -41,7 +41,7 @@ TypeJunctionCityPlatformUpdateAcpiTablePcds ( - //# - Size = AsciiStrSize (AcpiName10nm); - Status = PcdSetPtrS (PcdOemSkuAcpiName , &Size, AcpiName10nm); -- DEBUG ((DEBUG_INFO, "%a TypeJunctionCity ICX\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a TypeJunctionCity ICX\n", __func__)); - ASSERT_EFI_ERROR (Status); - - Size = AsciiStrSize (OemTableIdXhci); -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Library/AcpiPlatformTableLib/AcpiPlatformLibHmat.c b/Platform/Intel/WhitleyOpenBoardPkg/Library/AcpiPlatformTableLib/AcpiPlatformLibHmat.c -index f0fe01a6..eb4c9d26 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/Library/AcpiPlatformTableLib/AcpiPlatformLibHmat.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/Library/AcpiPlatformTableLib/AcpiPlatformLibHmat.c -@@ -721,7 +721,7 @@ GetProcessorDomains ( - NodeId = (NodeId * HmatData->VirtualNumOfCluster) + (Index % HmatData->VirtualNumOfCluster); - - DEBUG ((DEBUG_INFO, "%a: SocketId: 0x%x SncNumOfCluster: 0x%x ImcInterBitmap:0x%x and NodeId:0x%x\n", -- __FUNCTION__, mSystemMemoryMap->Element[Index].SocketId, HmatData->SncNumOfCluster, mSystemMemoryMap->Element[Index].ImcInterBitmap, NodeId)); -+ __func__, mSystemMemoryMap->Element[Index].SocketId, HmatData->SncNumOfCluster, mSystemMemoryMap->Element[Index].ImcInterBitmap, NodeId)); - } else { - NodeId = SocketLogicalId; - } -@@ -917,7 +917,7 @@ PatchHmatMsars ( - } - ProcessorNodeId = (ProcessorNodeId * HmatData->VirtualNumOfCluster) + (Index % HmatData->VirtualNumOfCluster); - DEBUG ((DEBUG_INFO, "%a: SocketId: 0x%x SncNumOfCluster: 0x%x ImcInterBitmap:0x%x and NodeId:0x%x \n", -- __FUNCTION__, mSystemMemoryMap->Element[Index].SocketId, HmatData->SncNumOfCluster, mSystemMemoryMap->Element[Index].ImcInterBitmap, ProcessorNodeId)); -+ __func__, mSystemMemoryMap->Element[Index].SocketId, HmatData->SncNumOfCluster, mSystemMemoryMap->Element[Index].ImcInterBitmap, ProcessorNodeId)); - } else { - ProcessorNodeId = SocketLogicalId; - } -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Pei/IioPortBifurcationVer1.c b/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Pei/IioPortBifurcationVer1.c -index 153cc505..1367125a 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Pei/IioPortBifurcationVer1.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/Common/Pei/IioPortBifurcationVer1.c -@@ -373,7 +373,7 @@ CalculatePEXPHideFromIouBif_SKX ( - - if (IioIndex >= MaxIIO || Iou >= NELEMENTS (IioGlobalData->SetupData.ConfigIOU[IioIndex])) { - -- DEBUG ((DEBUG_ERROR, "[IIO] ERROR: %a: IIO instance %d or IOU %d out of range", __FUNCTION__, IioIndex, Iou)); -+ DEBUG ((DEBUG_ERROR, "[IIO] ERROR: %a: IIO instance %d or IOU %d out of range", __func__, IioIndex, Iou)); - ASSERT (FALSE); - return; - } -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCityRP/Pei/AcpiTablePcds.c b/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCityRP/Pei/AcpiTablePcds.c -index 44b1e767..aa8f6f03 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCityRP/Pei/AcpiTablePcds.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCityRP/Pei/AcpiTablePcds.c -@@ -40,7 +40,7 @@ TypeWilsonCityRPPlatformUpdateAcpiTablePcds ( - //# - Size = AsciiStrSize (AcpiName10nm); - Status = PcdSetPtrS (PcdOemSkuAcpiName , &Size, AcpiName10nm); -- DEBUG ((DEBUG_INFO, "%a TypeWilsonCityRP ICX\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a TypeWilsonCityRP ICX\n", __func__)); - ASSERT_EFI_ERROR (Status); - - Size = AsciiStrSize (OemTableIdXhci); -diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCitySMT/Pei/AcpiTablePcds.c b/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCitySMT/Pei/AcpiTablePcds.c -index 0055323e..e8b65702 100644 ---- a/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCitySMT/Pei/AcpiTablePcds.c -+++ b/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCitySMT/Pei/AcpiTablePcds.c -@@ -38,7 +38,7 @@ TypeWilsonCitySMTPlatformUpdateAcpiTablePcds ( - //# - Size = AsciiStrSize (AcpiName10nm); - Status = PcdSetPtrS (PcdOemSkuAcpiName , &Size, AcpiName10nm); -- DEBUG ((DEBUG_INFO, "%a TypeWilsonCitySMT ICX\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a TypeWilsonCitySMT ICX\n", __func__)); - ASSERT_EFI_ERROR (Status); - - Size = AsciiStrSize (OemTableIdXhci); -diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c b/Platform/Loongson/LoongArchQemuPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c -index 1781c1c3..413bae78 100644 ---- a/Platform/Loongson/LoongArchQemuPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c -+++ b/Platform/Loongson/LoongArchQemuPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c -@@ -66,7 +66,7 @@ VirtNorFlashPlatformGetDevices ( - DEBUG (( - DEBUG_ERROR, - "%a: GetNodeProperty () failed (Status == %r)\n", -- __FUNCTION__, -+ __func__, - Status - )); - return Status; -@@ -78,7 +78,7 @@ VirtNorFlashPlatformGetDevices ( - DEBUG (( - DEBUG_ERROR, - "%a: reg node size(%d) is too small \n", -- __FUNCTION__, -+ __func__, - PropSize - )); - return EFI_NOT_FOUND; -diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c -index eb7f4241..2ed70d86 100644 ---- a/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c -+++ b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c -@@ -121,7 +121,7 @@ FilterAndProcess ( - // - // This is not an error, just an informative condition. - // -- DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid, -+ DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __func__, ProtocolGuid, - Status)); - return; - } -@@ -188,7 +188,7 @@ IsPciDisplay ( - Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */, - sizeof Pci / sizeof (UINT32), &Pci); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __func__, ReportText, Status)); - return FALSE; - } - -@@ -220,7 +220,7 @@ Connect ( - FALSE // Recursive - ); - DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n", -- __FUNCTION__, ReportText, Status)); -+ __func__, ReportText, Status)); - } - - /** -@@ -245,25 +245,25 @@ AddOutput ( - DevicePath = DevicePathFromHandle (Handle); - if (DevicePath == NULL) { - DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n", -- __FUNCTION__, ReportText, Handle)); -+ __func__, ReportText, Handle)); - return; - } - - Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __func__, - ReportText, Status)); - return; - } - - Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __func__, - ReportText, Status)); - return; - } - -- DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__, -+ DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __func__, - ReportText)); - } - /** -@@ -452,7 +452,7 @@ RemoveStaleFvFileOptions ( - DEBUG (( - EFI_ERROR (Status) ? EFI_D_WARN : DEBUG_VERBOSE, - "%a: removing stale Boot#%04x %s: %r\n", -- __FUNCTION__, -+ __func__, - (UINT32)BootOptions[Index].OptionNumber, - DevicePathString == NULL ? L"" : DevicePathString, - Status -diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/QemuKernel.c b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/QemuKernel.c -index 386003a8..bf55bb93 100644 ---- a/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/QemuKernel.c -+++ b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/QemuKernel.c -@@ -70,7 +70,7 @@ TryRunningQemuKernel ( - DEBUG (( - DEBUG_ERROR, - "%a: QemuStartKernelImage(): %r\n", -- __FUNCTION__, -+ __func__, - Status - )); - } -diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.c b/Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.c -index 5593856b..f9909713 100644 ---- a/Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.c -+++ b/Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.c -@@ -454,7 +454,7 @@ QemuFwCfgInitialize ( - break; - } else { - DEBUG ((DEBUG_ERROR, "%a: Failed to parse FDT QemuCfg node\n", -- __FUNCTION__)); -+ __func__)); - break; - } - } -diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c -index 0df629ff..4e86ec1d 100644 ---- a/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c -+++ b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c -@@ -136,7 +136,7 @@ ResetSystemLibConstructor ( - - Status = GetPowerManagerByParseAcpiInfo (); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a:%d\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_INFO, "%a:%d\n", __func__, __LINE__)); - } - - ASSERT (mPowerManager.SleepControlRegAddr); -diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGed.c b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGed.c -index ef48946a..aa85c8ad 100644 ---- a/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGed.c -+++ b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGed.c -@@ -45,7 +45,7 @@ SetMemoryAttributesRunTime ( - - Status = gDS->GetMemorySpaceDescriptor (Address, &Descriptor); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a: GetMemorySpaceDescriptor failed\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: GetMemorySpaceDescriptor failed\n", __func__)); - return Status; - } - -@@ -57,7 +57,7 @@ SetMemoryAttributesRunTime ( - EFI_MEMORY_UC | EFI_MEMORY_RUNTIME - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a: AddMemorySpace failed\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: AddMemorySpace failed\n", __func__)); - return Status; - } - -@@ -67,7 +67,7 @@ SetMemoryAttributesRunTime ( - EFI_MEMORY_RUNTIME - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a:%d SetMemorySpaceAttributes failed\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_INFO, "%a:%d SetMemorySpaceAttributes failed\n", __func__, __LINE__)); - return Status; - } - } else if (!(Descriptor.Attributes & EFI_MEMORY_RUNTIME)) { -@@ -78,7 +78,7 @@ SetMemoryAttributesRunTime ( - ); - - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a:%d SetMemorySpaceAttributes failed\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_INFO, "%a:%d SetMemorySpaceAttributes failed\n", __func__, __LINE__)); - return Status; - } - } -@@ -192,27 +192,27 @@ AcpiNotificationEvent ( - return ; - } - -- DEBUG ((DEBUG_INFO, "%a: sleepControl %llx\n", __FUNCTION__, mPowerManager.SleepControlRegAddr)); -+ DEBUG ((DEBUG_INFO, "%a: sleepControl %llx\n", __func__, mPowerManager.SleepControlRegAddr)); - ASSERT (mPowerManager.SleepControlRegAddr); - Status = SetMemoryAttributesRunTime (mPowerManager.SleepControlRegAddr); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a:%d\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_INFO, "%a:%d\n", __func__, __LINE__)); - return ; - } - -- DEBUG ((DEBUG_INFO, "%a: sleepStatus %llx\n", __FUNCTION__, mPowerManager.SleepStatusRegAddr)); -+ DEBUG ((DEBUG_INFO, "%a: sleepStatus %llx\n", __func__, mPowerManager.SleepStatusRegAddr)); - ASSERT (mPowerManager.SleepStatusRegAddr); - Status = SetMemoryAttributesRunTime (mPowerManager.SleepStatusRegAddr); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a:%d\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_INFO, "%a:%d\n", __func__, __LINE__)); - return ; - } - -- DEBUG ((DEBUG_INFO, "%a: ResetReg %llx\n", __FUNCTION__, mPowerManager.ResetRegAddr)); -+ DEBUG ((DEBUG_INFO, "%a: ResetReg %llx\n", __func__, mPowerManager.ResetRegAddr)); - ASSERT (mPowerManager.ResetRegAddr); - Status = SetMemoryAttributesRunTime (mPowerManager.ResetRegAddr); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a:%d\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_INFO, "%a:%d\n", __func__, __LINE__)); - } - return ; - } -diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c -index 84bb8e8a..16096e06 100644 ---- a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c -+++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c -@@ -289,7 +289,7 @@ GetRtcAddress ( - break; - } else { - DEBUG ((DEBUG_ERROR, "%a: Failed to parse FDT rtc node\n", -- __FUNCTION__)); -+ __func__)); - break; - } - } -@@ -383,7 +383,7 @@ SystemMemorySizeInitialization ( - - QemuFwCfgSelectItem (QemuFwCfgItemRamSize); - RamSize= QemuFwCfgRead64 (); -- DEBUG ((DEBUG_INFO, "%a: QEMU reports %dM system memory\n", __FUNCTION__, -+ DEBUG ((DEBUG_INFO, "%a: QEMU reports %dM system memory\n", __func__, - RamSize/1024/1024)); - - // -diff --git a/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c b/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c -index 4d790103..aa91cd0e 100644 ---- a/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c -+++ b/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c -@@ -38,7 +38,7 @@ ConfigurePins ( - - Status = MvGpioGetProtocol (DriverType, &GpioProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __func__)); - return Status; - } - -diff --git a/Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c b/Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c -index cde73dda..e6151d39 100644 ---- a/Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c -+++ b/Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLib.c -@@ -76,7 +76,7 @@ XhciInit ( - - Status = MvGpioGetProtocol (MV_GPIO_DRIVER_TYPE_PCA95XX, &GpioProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __func__)); - return Status; - } - -diff --git a/Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.c b/Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.c -index 965d8efe..7e01c3cd 100644 ---- a/Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.c -+++ b/Platform/Marvell/Cn913xDb/NonDiscoverableInitLib/NonDiscoverableInitLib.c -@@ -38,7 +38,7 @@ ConfigurePins ( - - Status = MvGpioGetProtocol (DriverType, &GpioProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __func__)); - return Status; - } - -diff --git a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c -index f712d593..060f65f4 100644 ---- a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c -+++ b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c -@@ -40,7 +40,7 @@ ArmPlatformGetVirtualMemoryMap ( - MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); - - if (VirtualMemoryTable == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __func__)); - return; - } - -diff --git a/Platform/NXP/LX2160aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/NXP/LX2160aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c -index 0c013dd0..c5973030 100644 ---- a/Platform/NXP/LX2160aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c -+++ b/Platform/NXP/LX2160aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c -@@ -62,7 +62,7 @@ SetPciControllerPcdOptions ( - PcdSetBoolS (PcdPciHideRootPort, TRUE); - break; - default: -- DEBUG ((DEBUG_ERROR, "%a: Invalid SoC Version 0x%x \n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a: Invalid SoC Version 0x%x \n", __func__, - SVR_MAJOR(Svr))); - return EFI_INVALID_PARAMETER; - } -diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c -index 98a6b2fc..050b4b88 100644 ---- a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c -+++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c -@@ -41,7 +41,7 @@ ArmPlatformGetVirtualMemoryMap ( - MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); - - if (VirtualMemoryTable == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __func__)); - return; - } - -diff --git a/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c b/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c -index c4f9dd02..68cb3386 100644 ---- a/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c -+++ b/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c -@@ -43,7 +43,7 @@ SecSetEdk2FwMemoryRegions ( - fw_memregs.flags = SBI_DOMAIN_MEMREGION_EXECUTABLE | SBI_DOMAIN_MEMREGION_READABLE; - Ret = sbi_domain_root_add_memregion ((CONST struct sbi_domain_memregion *)&fw_memregs); - if (Ret != 0) { -- DEBUG ((DEBUG_ERROR, "%a: Add firmware regions of FW Domain fail\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Add firmware regions of FW Domain fail\n", __func__)); - } - - // -@@ -54,7 +54,7 @@ SecSetEdk2FwMemoryRegions ( - fw_memregs.flags = SBI_DOMAIN_MEMREGION_READABLE | SBI_DOMAIN_MEMREGION_WRITEABLE; - Ret = sbi_domain_root_add_memregion ((CONST struct sbi_domain_memregion *)&fw_memregs); - if (Ret != 0) { -- DEBUG ((DEBUG_ERROR, "%a: Add firmware regions of variable FW Domain fail\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Add firmware regions of variable FW Domain fail\n", __func__)); - } - - return Ret; -@@ -76,7 +76,7 @@ SecPostOpenSbiPlatformEarlyInit ( - - if (!ColdBoot) { - HartId = current_hartid (); -- DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId)); -+ DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __func__, HartId)); - return 0; - } - -@@ -91,7 +91,7 @@ SecPostOpenSbiPlatformEarlyInit ( - // Boot HART is already in the process of OpenSBI initialization. - // We can let other HART to keep booting. - // -- DEBUG ((DEBUG_INFO, "%a: Set boot hart done.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Set boot hart done.\n", __func__)); - atomic_write (&BootHartDone, (UINT64)TRUE); - return 0; - } -@@ -117,11 +117,11 @@ SecPostOpenSbiPlatformFinalInit ( - - if (!ColdBoot) { - HartId = current_hartid (); -- DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId)); -+ DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __func__, HartId)); - return 0; - } - -- DEBUG ((DEBUG_INFO, "%a: Entry, preparing to jump to PEI Core\n\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry, preparing to jump to PEI Core\n\n", __func__)); - - SbiScratch = sbi_scratch_thishart_ptr (); - SbiPlatform = (struct sbi_platform *)sbi_platform_ptr (SbiScratch); -@@ -130,7 +130,7 @@ SecPostOpenSbiPlatformFinalInit ( - // - // Print out scratch address of each hart - // -- DEBUG ((DEBUG_INFO, "%a: OpenSBI scratch address for each hart:\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: OpenSBI scratch address for each hart:\n", __func__)); - for (HartId = 0; HartId < SBI_HARTMASK_MAX_BITS; HartId++) { - if (sbi_platform_hart_invalid (SbiPlatform, HartId)) { - continue; -@@ -159,14 +159,14 @@ SecPostOpenSbiPlatformFinalInit ( - DEBUG (( - DEBUG_INFO, - "%a: OpenSBI Hart %d Firmware Context Hart-specific at address: 0x%x\n", -- __FUNCTION__, -+ __func__, - HartId, - FirmwareContext->HartSpecific[HartId] - )); - } - } - -- DEBUG ((DEBUG_INFO, "%a: Will jump to PEI Core in OpenSBI with \n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Will jump to PEI Core in OpenSBI with \n", __func__)); - DEBUG ((DEBUG_INFO, " sbi_scratch = %x\n", SbiScratch)); - DEBUG ((DEBUG_INFO, " sbi_platform = %x\n", SbiPlatform)); - DEBUG ((DEBUG_INFO, " FirmwareContext = %x\n", FirmwareContext)); -@@ -189,7 +189,7 @@ Edk2OpensbiPlatformEarlyInit ( - { - INT32 ReturnCode; - -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.early_init) { - ReturnCode = platform_ops.early_init (ColdBoot); -@@ -219,7 +219,7 @@ Edk2OpensbiPlatformFinalInit ( - { - INT32 ReturnCode; - -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.final_init) { - ReturnCode = platform_ops.final_init (ColdBoot); -@@ -244,7 +244,7 @@ Edk2OpensbiPlatformEarlyExit ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.early_exit) { - return platform_ops.early_exit (); -@@ -260,7 +260,7 @@ Edk2OpensbiPlatformFinalExit ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.early_exit) { - return platform_ops.early_exit (); -@@ -316,7 +316,7 @@ Edk2OpensbiPlatformDomainsInit ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.domains_init) { - return platform_ops.domains_init (); -@@ -336,7 +336,7 @@ Edk2OpensbiPlatformSerialInit ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.console_init) { - return platform_ops.console_init (); -@@ -357,7 +357,7 @@ Edk2OpensbiPlatformIrqchipInit ( - IN BOOLEAN ColdBoot - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.irqchip_init) { - return platform_ops.irqchip_init (ColdBoot); -@@ -375,7 +375,7 @@ Edk2OpensbiPlatformIrqchipExit ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.irqchip_exit) { - return platform_ops.irqchip_exit (); -@@ -394,7 +394,7 @@ Edk2OpensbiPlatformIpiInit ( - IN BOOLEAN ColdBoot - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.ipi_init) { - return platform_ops.ipi_init (ColdBoot); -@@ -412,7 +412,7 @@ Edk2OpensbiPlatformIpiExit ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.ipi_exit) { - return platform_ops.ipi_exit (); -@@ -430,7 +430,7 @@ Edk2OpensbiPlatformTlbrFlushLimit ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.get_tlbr_flush_limit) { - return platform_ops.get_tlbr_flush_limit (); -@@ -451,7 +451,7 @@ Edk2OpensbiPlatformTimerInit ( - IN BOOLEAN ColdBoot - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.timer_init) { - return platform_ops.timer_init (ColdBoot); -@@ -469,7 +469,7 @@ Edk2OpensbiPlatformTimerExit ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.timer_exit) { - return platform_ops.timer_exit (); -@@ -488,7 +488,7 @@ Edk2OpensbiPlatformVendorExtCheck ( - IN long ExtId - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.vendor_ext_check) { - return platform_ops.vendor_ext_check (ExtId); -@@ -518,7 +518,7 @@ Edk2OpensbiPlatformVendorExtProvider ( - IN struct sbi_trap_info *OutTrap - ) - { -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (platform_ops.vendor_ext_provider) { - return platform_ops.vendor_ext_provider ( -diff --git a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c -index c56dc4e5..b64812b3 100644 ---- a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c -+++ b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c -@@ -44,17 +44,17 @@ PeimPassFdt ( - GetFirmwareContextPointer (&FirmwareContext); - - if (FirmwareContext == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: OpenSBI Firmware Context is NULL\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: OpenSBI Firmware Context is NULL\n", __func__)); - return EFI_UNSUPPORTED; - } - - FdtPointer = (VOID *)FirmwareContext->FlattenedDeviceTree; - if (FdtPointer == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Invalid FDT pointer\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Invalid FDT pointer\n", __func__)); - return EFI_UNSUPPORTED; - } - -- DEBUG ((DEBUG_ERROR, "%a: Build FDT HOB - FDT at address: 0x%x \n", __FUNCTION__, FdtPointer)); -+ DEBUG ((DEBUG_ERROR, "%a: Build FDT HOB - FDT at address: 0x%x \n", __func__, FdtPointer)); - Base = FdtPointer; - ASSERT (Base != NULL); - ASSERT (fdt_check_header (Base) == 0); -diff --git a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c -index 3e579bfb..2bff1e65 100644 ---- a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c -+++ b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c -@@ -52,7 +52,7 @@ PublishPeiMemory ( - MemoryBase = 0x80000000UL + 0x1000000UL; - MemorySize = 0x40000000UL - 0x1000000UL; // 1GB - 16MB - -- DEBUG ((DEBUG_INFO, "%a: MemoryBase:0x%x MemorySize:%x\n", __FUNCTION__, MemoryBase, MemorySize)); -+ DEBUG ((DEBUG_INFO, "%a: MemoryBase:0x%x MemorySize:%x\n", __func__, MemoryBase, MemorySize)); - - // - // Publish this memory to the PEI Core -diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c -index c488f03a..9688115b 100644 ---- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c -+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c -@@ -167,10 +167,10 @@ FindFfsFileAndSection ( - UINT32 Size; - EFI_PHYSICAL_ADDRESS EndOfFile; - -- DEBUG ((DEBUG_INFO, "%a: DBT FV at 0x%x\n", __FUNCTION__, Fv)); -+ DEBUG ((DEBUG_INFO, "%a: DBT FV at 0x%x\n", __func__, Fv)); - - if (Fv->Signature != EFI_FVH_SIGNATURE) { -- DEBUG ((DEBUG_ERROR, "%a: FV at %p does not have FV header signature\n", __FUNCTION__, Fv)); -+ DEBUG ((DEBUG_ERROR, "%a: FV at %p does not have FV header signature\n", __func__, Fv)); - return EFI_VOLUME_CORRUPTED; - } - -@@ -183,20 +183,20 @@ FindFfsFileAndSection ( - for (EndOfFile = CurrentAddress + Fv->HeaderLength; ; ) { - CurrentAddress = (EndOfFile + 7) & ~(7ULL); - if (CurrentAddress > EndOfFirmwareVolume) { -- DEBUG ((DEBUG_ERROR, "%a: FV corrupted\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: FV corrupted\n", __func__)); - return EFI_VOLUME_CORRUPTED; - } - - File = (EFI_FFS_FILE_HEADER *)(UINTN)CurrentAddress; - Size = *(UINT32 *)File->Size & 0xffffff; - if (Size < (sizeof (*File) + sizeof (EFI_COMMON_SECTION_HEADER))) { -- DEBUG ((DEBUG_ERROR, "%a: FV corrupted\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: FV corrupted\n", __func__)); - return EFI_VOLUME_CORRUPTED; - } - - EndOfFile = CurrentAddress + Size; - if (EndOfFile > EndOfFirmwareVolume) { -- DEBUG ((DEBUG_ERROR, "%a: FV corrupted\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: FV corrupted\n", __func__)); - return EFI_VOLUME_CORRUPTED; - } - -@@ -204,7 +204,7 @@ FindFfsFileAndSection ( - // Look for the request file type - // - if (File->Type != FileType) { -- DEBUG ((DEBUG_INFO, "%a: (File->Type != FileType), find next FFS\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: (File->Type != FileType), find next FFS\n", __func__)); - continue; - } - -@@ -215,16 +215,16 @@ FindFfsFileAndSection ( - FoundSection - ); - if (!EFI_ERROR (Status)) { -- DEBUG ((DEBUG_INFO, "%a: Get firmware file section\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Get firmware file section\n", __func__)); - return Status; - } - - if (Status == EFI_VOLUME_CORRUPTED) { -- DEBUG ((DEBUG_ERROR, "%a: FV corrupted\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: FV corrupted\n", __func__)); - return Status; - } - -- DEBUG ((DEBUG_INFO, "%a: Find next FFS\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Find next FFS\n", __func__)); - } - } - -@@ -262,12 +262,12 @@ FindPeiCoreImageBaseInFv ( - &Section - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to find PEI Core image\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to find PEI Core image\n", __func__)); - return Status; - } - } - -- DEBUG ((DEBUG_INFO, "%a: PeiCoreImageBase found\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: PeiCoreImageBase found\n", __func__)); - *PeiCoreImageBase = (EFI_PHYSICAL_ADDRESS)(UINTN)(Section + 1); - return EFI_SUCCESS; - } -@@ -287,7 +287,7 @@ FindPeiCoreImageBase ( - { - *PeiCoreImageBase = 0; - -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - FindPeiCoreImageBaseInFv (*BootFv, PeiCoreImageBase); - } - -@@ -311,7 +311,7 @@ FindAndReportEntryPoints ( - EFI_STATUS Status; - EFI_PHYSICAL_ADDRESS PeiCoreImageBase; - -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - FindPeiCoreImageBase (BootFirmwareVolumePtr, &PeiCoreImageBase); - // -@@ -322,7 +322,7 @@ FindAndReportEntryPoints ( - *PeiCoreEntryPoint = 0; - } - -- DEBUG ((DEBUG_INFO, "%a: PeCoffLoaderGetEntryPoint success: %x\n", __FUNCTION__, *PeiCoreEntryPoint)); -+ DEBUG ((DEBUG_INFO, "%a: PeCoffLoaderGetEntryPoint success: %x\n", __func__, *PeiCoreEntryPoint)); - - return; - } -@@ -364,7 +364,7 @@ SbiEcallFirmwareHandler ( - break; - default: - Ret = SBI_ENOTSUPP; -- DEBUG ((DEBUG_ERROR, "%a: Called SBI firmware ecall with invalid function ID\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Called SBI firmware ecall with invalid function ID\n", __func__)); - ASSERT (FALSE); - } - -@@ -452,7 +452,7 @@ PeiCore ( - DEBUG_ERROR, - "%a: OpenSBI platform table version 0x%x is newer than OpenSBI version 0x%x.\n" - "There maybe be some backward compatable issues.\n", -- __FUNCTION__, -+ __func__, - ThisSbiPlatform->opensbi_version, - OPENSBI_VERSION - )); -@@ -462,7 +462,7 @@ PeiCore ( - DEBUG (( - DEBUG_INFO, - "%a: OpenSBI platform table at address: 0x%x\nFirmware Context is located at 0x%x\n", -- __FUNCTION__, -+ __func__, - ThisSbiPlatform, - &FirmwareContext - )); -@@ -481,7 +481,7 @@ PeiCore ( - // - // Set supervisor translation mode to Bare mode - // -- DEBUG ((DEBUG_INFO, "%a: Set Supervisor address mode to Bare-mode.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Set Supervisor address mode to Bare-mode.\n", __func__)); - RiscVSetSupervisorAddressTranslationRegister ((UINT64)RISCV_SATP_MODE_OFF << RISCV_SATP_MODE_BIT_POSITION); - - // -@@ -489,7 +489,7 @@ PeiCore ( - // - Scratch->next_addr = (UINTN)(PeiCoreEntryPoint); - Scratch->next_mode = PRV_S; -- DEBUG ((DEBUG_INFO, "%a: Initializing OpenSBI library for booting hart %d\n", __FUNCTION__, BootHartId)); -+ DEBUG ((DEBUG_INFO, "%a: Initializing OpenSBI library for booting hart %d\n", __func__, BootHartId)); - sbi_init (Scratch); - } - -@@ -716,13 +716,13 @@ SecCoreStartUpWithStack ( - NonBootHartMessageLockValue = atomic_xchg (&NonBootHartMessageLock, TRUE); - } - -- DEBUG ((DEBUG_INFO, "%a: Non boot hart %d initialization.\n", __FUNCTION__, HartId)); -+ DEBUG ((DEBUG_INFO, "%a: Non boot hart %d initialization.\n", __func__, HartId)); - if (Scratch->next_arg1 == (unsigned long)NULL) { - DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n")); - ASSERT (FALSE); - } - -- DEBUG ((DEBUG_INFO, "%a: Non boot hart %d DTB is at 0x%x.\n", __FUNCTION__, HartId, Scratch->next_arg1)); -+ DEBUG ((DEBUG_INFO, "%a: Non boot hart %d DTB is at 0x%x.\n", __func__, HartId, Scratch->next_arg1)); - NonBootHartMessageLockValue = atomic_xchg (&NonBootHartMessageLock, FALSE); - // - // Non boot hart wiil be halted waiting for SBI_HART_STARTING. -diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c -index 6d1c5e1d..1a4fe258 100644 ---- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c -+++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c -@@ -375,7 +375,7 @@ MMCSendCommand ( - if (PollRegisterWithMask (MMCHS_PRES_STATE, - CmdSendOKMask, 0) == EFI_TIMEOUT) { - DEBUG ((DEBUG_ERROR, "%a(%u): not ready for MMC_CMD%u PresState 0x%x MmcStatus 0x%x\n", -- __FUNCTION__, __LINE__, MMC_CMD_NUM (MmcCmd), -+ __func__, __LINE__, MMC_CMD_NUM (MmcCmd), - MmioRead32 (MMCHS_PRES_STATE), MmioRead32 (MMCHS_INT_STAT))); - Status = EFI_TIMEOUT; - goto Exit; -@@ -418,7 +418,7 @@ MMCSendCommand ( - // - if (MmcCmd != CMD_IO_SEND_OP_COND) { - DEBUG ((DEBUG_ERROR, "%a(%u): MMC_CMD%u ERRI MmcStatus 0x%x\n", -- __FUNCTION__, __LINE__, MMC_CMD_NUM (MmcCmd), MmcStatus)); -+ __func__, __LINE__, MMC_CMD_NUM (MmcCmd), MmcStatus)); - } - - SoftReset (SRC); -@@ -441,7 +441,7 @@ MMCSendCommand ( - - if (RetryCount == MAX_RETRY_COUNT) { - DEBUG ((DEBUG_ERROR, "%a(%u): MMC_CMD%u completion TIMEOUT PresState 0x%x MmcStatus 0x%x\n", -- __FUNCTION__, __LINE__, MMC_CMD_NUM (MmcCmd), -+ __func__, __LINE__, MMC_CMD_NUM (MmcCmd), - MmioRead32 (MMCHS_PRES_STATE), MmcStatus)); - Status = EFI_TIMEOUT; - goto Exit; -@@ -691,15 +691,15 @@ MMCReadBlockData ( - UINTN Count; - - DEBUG ((DEBUG_VERBOSE, "%a(%u): LBA: 0x%x, Length: 0x%x, Buffer: 0x%x)\n", -- __FUNCTION__, __LINE__, Lba, Length, Buffer)); -+ __func__, __LINE__, Lba, Length, Buffer)); - - if (Buffer == NULL) { -- DEBUG ((DEBUG_ERROR, "%a(%u): NULL Buffer\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): NULL Buffer\n", __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - - if (Length % sizeof (UINT32) != 0) { -- DEBUG ((DEBUG_ERROR, "%a(%u): bad Length %u\n", __FUNCTION__, __LINE__, Length)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): bad Length %u\n", __func__, __LINE__, Length)); - return EFI_INVALID_PARAMETER; - } - -@@ -730,7 +730,7 @@ MMCReadBlockData ( - - if (RetryCount == MAX_RETRY_COUNT) { - DEBUG ((DEBUG_ERROR, "%a(%u): %lu/%lu MMCHS_INT_STAT: %08x\n", -- __FUNCTION__, __LINE__, Length - RemLength, Length, MmcStatus)); -+ __func__, __LINE__, Length - RemLength, Length, MmcStatus)); - return EFI_TIMEOUT; - } - -@@ -755,15 +755,15 @@ MMCWriteBlockData ( - UINTN Count; - - DEBUG ((DEBUG_VERBOSE, "%a(%u): LBA: 0x%x, Length: 0x%x, Buffer: 0x%x)\n", -- __FUNCTION__, __LINE__, Lba, Length, Buffer)); -+ __func__, __LINE__, Lba, Length, Buffer)); - - if (Buffer == NULL) { -- DEBUG ((DEBUG_ERROR, "%a(%u): NULL Buffer\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): NULL Buffer\n", __func__, __LINE__)); - return EFI_INVALID_PARAMETER; - } - - if (Length % sizeof (UINT32) != 0) { -- DEBUG ((DEBUG_ERROR, "%a(%u): bad Length %u\n", __FUNCTION__, __LINE__, Length)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): bad Length %u\n", __func__, __LINE__, Length)); - return EFI_INVALID_PARAMETER; - } - -@@ -794,7 +794,7 @@ MMCWriteBlockData ( - - if (RetryCount == MAX_RETRY_COUNT) { - DEBUG ((DEBUG_ERROR, "%a(%u): %lu/%lu MMCHS_INT_STAT: %08x\n", -- __FUNCTION__, __LINE__, Length - RemLength, Length, MmcStatus)); -+ __func__, __LINE__, Length - RemLength, Length, MmcStatus)); - return EFI_TIMEOUT; - } - -diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c -index 2a688fab..6980cc31 100644 ---- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c -+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c -@@ -430,7 +430,7 @@ SetupVariables ( - // - Status = mFwProtocol->GetMacAddress (mMacAddress.Addr); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_WARN, "%a: failed to retrieve MAC address\n", __FUNCTION__)); -+ DEBUG ((DEBUG_WARN, "%a: failed to retrieve MAC address\n", __func__)); - } - } - -diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/XhciQuirk.c b/Platform/RaspberryPi/Drivers/ConfigDxe/XhciQuirk.c -index 94c6f80c..e637930e 100644 ---- a/Platform/RaspberryPi/Drivers/ConfigDxe/XhciQuirk.c -+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/XhciQuirk.c -@@ -70,7 +70,7 @@ PciIoNotificationEvent ( - &DeviceNumber, &FunctionNumber); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to get SBDF for xHCI controller: %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return; - } - -@@ -81,7 +81,7 @@ PciIoNotificationEvent ( - Status = FwProtocol->NotifyXhciReset(BusNumber, DeviceNumber, FunctionNumber); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: couldn't signal xHCI firmware load: %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - } - -diff --git a/Platform/RaspberryPi/Drivers/DisplayDxe/Screenshot.c b/Platform/RaspberryPi/Drivers/DisplayDxe/Screenshot.c -index 5f31c64b..68e96da0 100644 ---- a/Platform/RaspberryPi/Drivers/DisplayDxe/Screenshot.c -+++ b/Platform/RaspberryPi/Drivers/DisplayDxe/Screenshot.c -@@ -122,7 +122,7 @@ FindWritableFs ( - - Status = SimpleFs->OpenVolume (SimpleFs, &Fs); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a OpenVolume[%u] returned %r\n", __FUNCTION__, Index, Status)); -+ DEBUG ((DEBUG_ERROR, "%a OpenVolume[%u] returned %r\n", __func__, Index, Status)); - continue; - } - -@@ -130,7 +130,7 @@ FindWritableFs ( - EFI_FILE_MODE_CREATE | EFI_FILE_MODE_READ | - EFI_FILE_MODE_WRITE, 0); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a Open[%u] returned %r\n", __FUNCTION__, Index, Status)); -+ DEBUG ((DEBUG_ERROR, "%a Open[%u] returned %r\n", __func__, Index, Status)); - continue; - } - -@@ -285,7 +285,7 @@ ProcessScreenshotHandler ( - &Handle - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: couldn't register key notification: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: couldn't register key notification: %r\n", __func__, Status)); - return Status; - } - -@@ -355,7 +355,7 @@ RegisterScreenshotHandlers ( - OnTextInExInstall, NULL, - &TextInExInstallEvent); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: couldn't create protocol install event: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: couldn't create protocol install event: %r\n", __func__, Status)); - return; - } - -@@ -363,7 +363,7 @@ RegisterScreenshotHandlers ( - TextInExInstallEvent, - &TextInExInstallRegistration); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: couldn't register protocol install notify: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: couldn't register protocol install notify: %r\n", __func__, Status)); - return; - } - } -diff --git a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c -index 5ad3c708..d0a448df 100644 ---- a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c -+++ b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c -@@ -47,14 +47,14 @@ FixEthernetAliases ( - // - Aliases = fdt_path_offset (mFdtImage, "/aliases"); - if (Aliases < 0) { -- DEBUG ((DEBUG_ERROR, "%a: failed to locate '/aliases'\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to locate '/aliases'\n", __func__)); - return EFI_NOT_FOUND; - } - Ethernet = fdt_getprop (mFdtImage, Aliases, "ethernet", NULL); - Ethernet0 = fdt_getprop (mFdtImage, Aliases, "ethernet0", NULL); - Alias = Ethernet ? Ethernet : Ethernet0; - if (!Alias) { -- DEBUG ((DEBUG_ERROR, "%a: failed to locate 'ethernet[0]' alias\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to locate 'ethernet[0]' alias\n", __func__)); - return EFI_NOT_FOUND; - } - -@@ -64,7 +64,7 @@ FixEthernetAliases ( - CopySize = AsciiStrSize (Alias); - Copy = AllocateCopyPool (CopySize, Alias); - if (!Copy) { -- DEBUG ((DEBUG_ERROR, "%a: failed to copy '%a'\n", __FUNCTION__, Alias)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to copy '%a'\n", __func__, Alias)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -77,18 +77,18 @@ FixEthernetAliases ( - if (Retval != 0) { - Status = EFI_NOT_FOUND; - DEBUG ((DEBUG_ERROR, "%a: failed to create 'ethernet' alias (%d)\n", -- __FUNCTION__, Retval)); -+ __func__, Retval)); - } -- DEBUG ((DEBUG_INFO, "%a: created 'ethernet' alias '%a'\n", __FUNCTION__, Copy)); -+ DEBUG ((DEBUG_INFO, "%a: created 'ethernet' alias '%a'\n", __func__, Copy)); - } - if (!Ethernet0) { - Retval = fdt_setprop (mFdtImage, Aliases, "ethernet0", Copy, CopySize); - if (Retval != 0) { - Status = EFI_NOT_FOUND; - DEBUG ((DEBUG_ERROR, "%a: failed to create 'ethernet0' alias (%d)\n", -- __FUNCTION__, Retval)); -+ __func__, Retval)); - } -- DEBUG ((DEBUG_INFO, "%a: created 'ethernet0' alias '%a'\n", __FUNCTION__, Copy)); -+ DEBUG ((DEBUG_INFO, "%a: created 'ethernet0' alias '%a'\n", __func__, Copy)); - } - - FreePool (Copy); -@@ -111,7 +111,7 @@ UpdateMacAddress ( - // - Node = fdt_path_offset (mFdtImage, "ethernet"); - if (Node < 0) { -- DEBUG ((DEBUG_ERROR, "%a: failed to locate 'ethernet' alias\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to locate 'ethernet' alias\n", __func__)); - return EFI_NOT_FOUND; - } - -@@ -120,7 +120,7 @@ UpdateMacAddress ( - // - Status = mFwProtocol->GetMacAddress (MacAddress); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to retrieve MAC address\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to retrieve MAC address\n", __func__)); - return Status; - } - -@@ -128,12 +128,12 @@ UpdateMacAddress ( - sizeof MacAddress); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to create 'mac-address' property (%d)\n", -- __FUNCTION__, Retval)); -+ __func__, Retval)); - return EFI_NOT_FOUND; - } - - DEBUG ((DEBUG_INFO, "%a: setting MAC address to %02x:%02x:%02x:%02x:%02x:%02x\n", -- __FUNCTION__, MacAddress[0], MacAddress[1], MacAddress[2], MacAddress[3], -+ __func__, MacAddress[0], MacAddress[1], MacAddress[2], MacAddress[3], - MacAddress[4], MacAddress[5])); - return EFI_SUCCESS; - } -@@ -159,38 +159,38 @@ AddUsbCompatibleProperty ( - // Locate the node that the 'usb' alias refers to - Node = fdt_path_offset (mFdtImage, "usb"); - if (Node < 0) { -- DEBUG ((DEBUG_ERROR, "%a: failed to locate 'usb' alias\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to locate 'usb' alias\n", __func__)); - return EFI_NOT_FOUND; - } - - // Get the property list. This is a list of NUL terminated strings. - List = fdt_getprop (mFdtImage, Node, "compatible", &ListSize); - if (List == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: failed to locate properties\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to locate properties\n", __func__)); - return EFI_NOT_FOUND; - } - - // Check if the compatible value we plan to add is already present - if (fdt_stringlist_contains (List, ListSize, NewProp)) { - DEBUG ((DEBUG_INFO, "%a: property '%a' is already set.\n", -- __FUNCTION__, NewProp)); -+ __func__, NewProp)); - return EFI_SUCCESS; - } - - // Make sure the compatible device is what we expect - if (!fdt_stringlist_contains (List, ListSize, Prop)) { - DEBUG ((DEBUG_ERROR, "%a: property '%a' is missing!\n", -- __FUNCTION__, Prop)); -+ __func__, Prop)); - return EFI_NOT_FOUND; - } - - // Add the new NUL terminated entry to our list - DEBUG ((DEBUG_INFO, "%a: adding '%a' to the properties\n", -- __FUNCTION__, NewProp)); -+ __func__, NewProp)); - - NewList = AllocatePool (ListSize + sizeof (NewProp)); - if (NewList == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: failed to allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES;; - } - CopyMem (NewList, List, ListSize); -@@ -201,7 +201,7 @@ AddUsbCompatibleProperty ( - FreePool (NewList); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to update properties (%d)\n", -- __FUNCTION__, Retval)); -+ __func__, Retval)); - return EFI_NOT_FOUND; - } - -@@ -351,7 +351,7 @@ SyncPcie ( - - Node = fdt_path_offset (mFdtImage, "pcie0"); - if (Node < 0) { -- DEBUG ((DEBUG_ERROR, "%a: failed to locate 'pcie0' alias\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to locate 'pcie0' alias\n", __func__)); - return EFI_NOT_FOUND; - } - -@@ -364,7 +364,7 @@ SyncPcie ( - DmaRanges[5] = cpu_to_fdt32 (0x00000000); - DmaRanges[6] = cpu_to_fdt32 (0xc0000000); - -- DEBUG ((DEBUG_INFO, "%a: Updating PCIe dma-ranges\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Updating PCIe dma-ranges\n", __func__)); - - /* - * Match dma-ranges with the EDK2+ACPI setup we are using. This works -@@ -375,7 +375,7 @@ SyncPcie ( - DmaRanges, sizeof DmaRanges); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate PCIe 'dma-ranges' property (%d)\n", -- __FUNCTION__, Retval)); -+ __func__, Retval)); - return EFI_NOT_FOUND; - } - -@@ -421,7 +421,7 @@ SyncPcie ( - Node = fdt_path_offset (mFdtImage, "/scb/pcie@7d500000/pci"); - if (Node < 0) { - // This can happen on CM4/etc which doesn't have an onboard XHCI -- DEBUG ((DEBUG_INFO, "%a: failed to locate /scb/pcie@7d500000/pci\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: failed to locate /scb/pcie@7d500000/pci\n", __func__)); - } else { - Retval = fdt_del_node (mFdtImage, Node); - if (Retval != 0) { -diff --git a/Platform/RaspberryPi/Drivers/MmcDxe/MmcBlockIo.c b/Platform/RaspberryPi/Drivers/MmcDxe/MmcBlockIo.c -index 8a2f7f42..b508ce80 100644 ---- a/Platform/RaspberryPi/Drivers/MmcDxe/MmcBlockIo.c -+++ b/Platform/RaspberryPi/Drivers/MmcDxe/MmcBlockIo.c -@@ -54,14 +54,14 @@ ValidateWrittenBlockCount ( - Status = MmcHost->SendCommand (MmcHost, MMC_CMD55, - MmcHostInstance->CardInfo.RCA << 16); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __func__, __LINE__, Status)); - return Status; - } - - Status = MmcHost->SendCommand (MmcHost, MMC_ACMD22, 0); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return Status; - } - -@@ -75,7 +75,7 @@ ValidateWrittenBlockCount ( - Status = MmcHost->ReadBlockData (MmcHost, 0, sizeof (Data), - (VOID*)Data); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -88,7 +88,7 @@ ValidateWrittenBlockCount ( - ((UINT32)Data[3] << 0); - if (BlocksWritten != Count) { - DEBUG ((DEBUG_ERROR, "%a(%u): expected %u != gotten %u\n", -- __FUNCTION__, __LINE__, Count, BlocksWritten)); -+ __func__, __LINE__, Count, BlocksWritten)); - if (BlocksWritten == 0) { - return EFI_DEVICE_ERROR; - } -@@ -118,7 +118,7 @@ WaitUntilTran ( - Status = MmcHost->SendCommand (MmcHost, MMC_CMD13, - MmcHostInstance->CardInfo.RCA << 16); - if (EFI_ERROR (Status) && Status != EFI_TIMEOUT) { -- DEBUG ((DEBUG_ERROR, "%a(%u) CMD13 failed: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a(%u) CMD13 failed: %r\n", __func__, __LINE__, Status)); - break; - } - -@@ -134,7 +134,7 @@ WaitUntilTran ( - } - - if (0 == Timeout) { -- DEBUG ((DEBUG_ERROR, "%a(%u) card is busy\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a(%u) card is busy\n", __func__, __LINE__)); - return EFI_NOT_READY; - } - -diff --git a/Platform/RaspberryPi/Drivers/MmcDxe/MmcDebug.c b/Platform/RaspberryPi/Drivers/MmcDxe/MmcDebug.c -index 22209fca..5f9e1adf 100644 ---- a/Platform/RaspberryPi/Drivers/MmcDxe/MmcDebug.c -+++ b/Platform/RaspberryPi/Drivers/MmcDxe/MmcDebug.c -@@ -9,9 +9,9 @@ - #include "Mmc.h" - - #if !defined(MDEPKG_NDEBUG) --CONST CHAR8* mStrUnit[] = { "100kbit/s", "1Mbit/s", "10Mbit/s", "100MBit/s", -+STATIC CONST CHAR8* mStrUnit[] = { "100kbit/s", "1Mbit/s", "10Mbit/s", "100MBit/s", - "Unknown", "Unknown", "Unknown", "Unknown" }; --CONST CHAR8* mStrValue[] = { "1.0", "1.2", "1.3", "1.5", "2.0", "2.5", -+STATIC CONST CHAR8* mStrValue[] = { "1.0", "1.2", "1.3", "1.5", "2.0", "2.5", - "3.0", "3.5", "4.0", "4.5", "5.0", "5.5", - "6.0", "7.0", "8.0" }; - #endif -diff --git a/Platform/RaspberryPi/Drivers/MmcDxe/MmcIdentification.c b/Platform/RaspberryPi/Drivers/MmcDxe/MmcIdentification.c -index c24e991b..82eabbed 100644 ---- a/Platform/RaspberryPi/Drivers/MmcDxe/MmcIdentification.c -+++ b/Platform/RaspberryPi/Drivers/MmcDxe/MmcIdentification.c -@@ -356,7 +356,7 @@ SdSelect ( - Status = MmcHost->SendCommand (MmcHost, MMC_CMD7, - MmcHostInstance->CardInfo.RCA << 16); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: error: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: error: %r\n", __func__, Status)); - } - - return Status; -@@ -376,7 +376,7 @@ SdDeselect ( - - Status = MmcHost->SendCommand (MmcHost, MMC_CMD7, 0); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: error: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: error: %r\n", __func__, Status)); - } - - return Status; -@@ -396,13 +396,13 @@ SdGetCsd ( - Status = MmcHost->SendCommand (MmcHost, MMC_CMD9, - MmcHostInstance->CardInfo.RCA << 16); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __func__, __LINE__, Status)); - return Status; - } - - Status = MmcHost->ReceiveResponse (MmcHost, MMC_RESPONSE_TYPE_CSD, Response); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(%u): error %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a(%u): error %r\n", __func__, - __LINE__, Status)); - return Status; - } -@@ -437,20 +437,20 @@ SdSet4Bit ( - CmdArg = MmcHostInstance->CardInfo.RCA << 16; - Status = MmcHost->SendCommand (MmcHost, MMC_CMD55, CmdArg); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __func__, __LINE__, Status)); - return Status; - } - - /* Width: 4 */ - Status = MmcHost->SendCommand (MmcHost, MMC_CMD6, 2); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(%u): error %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): error %r\n", __func__, __LINE__, Status)); - return Status; - } - - Status = MmcHost->SetIos (MmcHost, 0, BUSWIDTH_4, EMMCBACKWARD); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -488,7 +488,7 @@ SdSetSpeed ( - */ - Status = MmcHost->SetIos (MmcHost, Speed, 0, EMMCBACKWARD); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: error setting speed %u: %r\n", __FUNCTION__, Speed, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: error setting speed %u: %r\n", __func__, Speed, Status)); - return Status; - } - -@@ -506,14 +506,14 @@ SdSetSpeed ( - Status = MmcHost->SendCommand (MmcHost, MMC_CMD6, CmdArg); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return Status; - } else { - Status = MmcHost->ReadBlockData (MmcHost, 0, SWITCH_CMD_DATA_LENGTH, - Buffer); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return Status; - } - } -@@ -527,13 +527,13 @@ SdSetSpeed ( - CmdArg = SdSwitchCmdArgument (1, 0xf, 0xf, 0xf, TRUE); - Status = MmcHost->SendCommand (MmcHost, MMC_CMD6, CmdArg); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __func__, __LINE__, Status)); - return Status; - } else { - Status = MmcHost->ReadBlockData (MmcHost, 0, - SWITCH_CMD_DATA_LENGTH, Buffer); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a(%u): error: %r\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -561,7 +561,7 @@ SdSetSpeed ( - - Status = MmcHost->SetIos (MmcHost, Speed, 0, EMMCBACKWARD); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: error setting speed %u: %r\n", __FUNCTION__, Speed, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: error setting speed %u: %r\n", __func__, Speed, Status)); - return Status; - } - -@@ -585,13 +585,13 @@ SdExecuteScr ( - MmcHostInstance->CardInfo.RCA << 16); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a (MMC_CMD55): Error and Status = %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - Status = MmcHost->ReceiveResponse (MmcHost, MMC_RESPONSE_TYPE_R1, Response); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a (MMC_CMD55): Error and Status = %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - if ((Response[0] & MMC_STATUS_APP_CMD) == 0) { -@@ -602,7 +602,7 @@ SdExecuteScr ( - Status = MmcHost->SendCommand (MmcHost, MMC_ACMD51, 0); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a (MMC_ACMD51): Error and Status = %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - -@@ -610,7 +610,7 @@ SdExecuteScr ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a (MMC_ACMD51): ReadBlockData Error and Status = %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - -diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -index 64db6506..97720071 100644 ---- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -+++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c -@@ -35,6 +35,244 @@ - // - #define NUM_PAGES 1 - -+#pragma pack(1) -+typedef struct { -+ UINT32 BufferSize; -+ UINT32 Response; -+} RPI_FW_BUFFER_HEAD; -+ -+typedef struct { -+ UINT32 TagId; -+ UINT32 TagSize; -+ UINT32 TagValueSize; -+} RPI_FW_TAG_HEAD; -+ -+typedef struct { -+ UINT32 DeviceId; -+ UINT32 PowerState; -+} RPI_FW_POWER_STATE_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_POWER_STATE_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_SET_POWER_STATE_CMD; -+ -+typedef struct { -+ UINT32 Base; -+ UINT32 Size; -+} RPI_FW_ARM_MEMORY_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_ARM_MEMORY_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_GET_ARM_MEMORY_CMD; -+ -+typedef struct { -+ UINT8 MacAddress[6]; -+ UINT32 Padding; -+} RPI_FW_MAC_ADDR_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_MAC_ADDR_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_GET_MAC_ADDR_CMD; -+ -+typedef struct { -+ UINT64 Serial; -+} RPI_FW_SERIAL_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_SERIAL_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_GET_SERIAL_CMD; -+ -+typedef struct { -+ UINT32 Model; -+} RPI_FW_MODEL_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_MODEL_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_GET_MODEL_CMD; -+ -+typedef struct { -+ UINT32 Revision; -+} RPI_FW_MODEL_REVISION_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_MODEL_REVISION_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_GET_REVISION_CMD; -+ -+typedef struct { -+ UINT32 Width; -+ UINT32 Height; -+} RPI_FW_FB_SIZE_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_FB_SIZE_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_GET_FB_SIZE_CMD; -+ -+typedef struct { -+ UINT32 Depth; -+} RPI_FW_FB_DEPTH_TAG; -+ -+typedef struct { -+ UINT32 Pitch; -+} RPI_FW_FB_PITCH_TAG; -+ -+typedef struct { -+ UINT32 AlignmentBase; -+ UINT32 Size; -+} RPI_FW_FB_ALLOC_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD FreeFbTag; -+ UINT32 EndTag; -+} RPI_FW_FREE_FB_CMD; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD PhysSizeTag; -+ RPI_FW_FB_SIZE_TAG PhysSize; -+ RPI_FW_TAG_HEAD VirtSizeTag; -+ RPI_FW_FB_SIZE_TAG VirtSize; -+ RPI_FW_TAG_HEAD DepthTag; -+ RPI_FW_FB_DEPTH_TAG Depth; -+ RPI_FW_TAG_HEAD AllocFbTag; -+ RPI_FW_FB_ALLOC_TAG AllocFb; -+ RPI_FW_TAG_HEAD PitchTag; -+ RPI_FW_FB_PITCH_TAG Pitch; -+ UINT32 EndTag; -+} RPI_FW_INIT_FB_CMD; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ UINT8 CommandLine[0]; -+} RPI_FW_GET_COMMAND_LINE_CMD; -+ -+typedef struct { -+ UINT32 ClockId; -+ UINT32 ClockRate; -+ UINT32 SkipTurbo; -+} RPI_FW_SET_CLOCK_RATE_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_SET_CLOCK_RATE_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_SET_CLOCK_RATE_CMD; -+ -+typedef struct { -+ UINT32 ClockId; -+ UINT32 ClockRate; -+} RPI_FW_CLOCK_RATE_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_CLOCK_RATE_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_GET_CLOCK_RATE_CMD; -+ -+typedef struct { -+ UINT32 ClockId; -+ UINT32 ClockState; -+} RPI_FW_GET_CLOCK_STATE_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_GET_CLOCK_STATE_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_SET_CLOCK_STATE_CMD; -+ -+typedef struct { -+ UINT32 Pin; -+ UINT32 State; -+} RPI_FW_SET_GPIO_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_SET_GPIO_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_SET_GPIO_CMD; -+ -+typedef struct { -+ UINT32 DeviceAddress; -+} RPI_FW_NOTIFY_XHCI_RESET_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_NOTIFY_XHCI_RESET_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_NOTIFY_XHCI_RESET_CMD; -+ -+typedef struct { -+ UINT32 Gpio; -+ UINT32 Direction; -+ UINT32 Polarity; -+ UINT32 TermEn; -+ UINT32 TermPullUp; -+} RPI_FW_GPIO_GET_CFG_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_GPIO_GET_CFG_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_NOTIFY_GPIO_GET_CFG_CMD; -+ -+typedef struct { -+ UINT32 Gpio; -+ UINT32 Direction; -+ UINT32 Polarity; -+ UINT32 TermEn; -+ UINT32 TermPullUp; -+ UINT32 State; -+} RPI_FW_GPIO_SET_CFG_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_GPIO_SET_CFG_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_NOTIFY_GPIO_SET_CFG_CMD; -+ -+typedef struct { -+ UINT32 Register; -+ UINT32 Value; -+} RPI_FW_RTC_TAG; -+ -+typedef struct { -+ RPI_FW_BUFFER_HEAD BufferHead; -+ RPI_FW_TAG_HEAD TagHead; -+ RPI_FW_RTC_TAG TagBody; -+ UINT32 EndTag; -+} RPI_FW_RTC_CMD; -+ -+#pragma pack() -+ - STATIC UINTN mMboxBaseAddress; - - STATIC VOID *mDmaBuffer; -@@ -110,7 +348,7 @@ MailboxTransaction ( - // - if (!DrainMailbox ()) { - DEBUG ((DEBUG_ERROR, "%a: timeout waiting for mailbox to drain\n", -- __FUNCTION__)); -+ __func__)); - return EFI_TIMEOUT; - } - -@@ -119,7 +357,7 @@ MailboxTransaction ( - // - if (!MailboxWaitForStatusCleared (1U << BCM2836_MBOX_STATUS_FULL)) { - DEBUG ((DEBUG_ERROR, "%a: timeout waiting for outbox to become empty\n", -- __FUNCTION__)); -+ __func__)); - return EFI_TIMEOUT; - } - -@@ -146,7 +384,7 @@ MailboxTransaction ( - // - if (!MailboxWaitForStatusCleared (1U << BCM2836_MBOX_STATUS_EMPTY)) { - DEBUG ((DEBUG_ERROR, "%a: timeout waiting for inbox to become full\n", -- __FUNCTION__)); -+ __func__)); - return EFI_TIMEOUT; - } - -@@ -164,31 +402,6 @@ MailboxTransaction ( - return EFI_SUCCESS; - } - --#pragma pack(1) --typedef struct { -- UINT32 BufferSize; -- UINT32 Response; --} RPI_FW_BUFFER_HEAD; -- --typedef struct { -- UINT32 TagId; -- UINT32 TagSize; -- UINT32 TagValueSize; --} RPI_FW_TAG_HEAD; -- --typedef struct { -- UINT32 DeviceId; -- UINT32 PowerState; --} RPI_FW_POWER_STATE_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_POWER_STATE_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_SET_POWER_STATE_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -203,7 +416,7 @@ RpiFirmwareSetPowerState ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -227,14 +440,14 @@ RpiFirmwareSetPowerState ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - Status = EFI_DEVICE_ERROR; - } - - if (!EFI_ERROR (Status) && - PowerState ^ (Cmd->TagBody.PowerState & RPI_MBOX_POWER_STATE_ENABLE)) { - DEBUG ((DEBUG_ERROR, "%a: failed to %sable power for device %d\n", -- __FUNCTION__, PowerState ? "en" : "dis", DeviceId)); -+ __func__, PowerState ? "en" : "dis", DeviceId)); - Status = EFI_DEVICE_ERROR; - } - ReleaseSpinLock (&mMailboxLock); -@@ -242,20 +455,6 @@ RpiFirmwareSetPowerState ( - return Status; - } - --#pragma pack() --typedef struct { -- UINT32 Base; -- UINT32 Size; --} RPI_FW_ARM_MEMORY_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_ARM_MEMORY_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_GET_ARM_MEMORY_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -269,7 +468,7 @@ RpiFirmwareGetArmMemory ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -290,7 +489,7 @@ RpiFirmwareGetArmMemory ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -302,20 +501,6 @@ RpiFirmwareGetArmMemory ( - return EFI_SUCCESS; - } - --#pragma pack() --typedef struct { -- UINT8 MacAddress[6]; -- UINT32 Padding; --} RPI_FW_MAC_ADDR_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_MAC_ADDR_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_GET_MAC_ADDR_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -328,7 +513,7 @@ RpiFirmwareGetMacAddress ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -348,7 +533,7 @@ RpiFirmwareGetMacAddress ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -359,19 +544,6 @@ RpiFirmwareGetMacAddress ( - return EFI_SUCCESS; - } - --#pragma pack() --typedef struct { -- UINT64 Serial; --} RPI_FW_SERIAL_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_SERIAL_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_GET_SERIAL_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -384,7 +556,7 @@ RpiFirmwareGetSerial ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -404,7 +576,7 @@ RpiFirmwareGetSerial ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -422,19 +594,6 @@ RpiFirmwareGetSerial ( - return Status; - } - --#pragma pack() --typedef struct { -- UINT32 Model; --} RPI_FW_MODEL_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_MODEL_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_GET_MODEL_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -447,7 +606,7 @@ RpiFirmwareGetModel ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -467,7 +626,7 @@ RpiFirmwareGetModel ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -478,19 +637,6 @@ RpiFirmwareGetModel ( - return EFI_SUCCESS; - } - --#pragma pack() --typedef struct { -- UINT32 Revision; --} RPI_FW_MODEL_REVISION_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_MODEL_REVISION_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_GET_REVISION_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -503,7 +649,7 @@ RpiFirmwareGetModelRevision ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -523,7 +669,7 @@ RpiFirmwareGetModelRevision ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -546,7 +692,7 @@ RpiFirmwareGetFirmwareRevision ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -566,7 +712,7 @@ RpiFirmwareGetFirmwareRevision ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -577,54 +723,6 @@ RpiFirmwareGetFirmwareRevision ( - return EFI_SUCCESS; - } - --#pragma pack() --typedef struct { -- UINT32 Width; -- UINT32 Height; --} RPI_FW_FB_SIZE_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_FB_SIZE_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_GET_FB_SIZE_CMD; -- --typedef struct { -- UINT32 Depth; --} RPI_FW_FB_DEPTH_TAG; -- --typedef struct { -- UINT32 Pitch; --} RPI_FW_FB_PITCH_TAG; -- --typedef struct { -- UINT32 AlignmentBase; -- UINT32 Size; --} RPI_FW_FB_ALLOC_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD FreeFbTag; -- UINT32 EndTag; --} RPI_FW_FREE_FB_CMD; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD PhysSizeTag; -- RPI_FW_FB_SIZE_TAG PhysSize; -- RPI_FW_TAG_HEAD VirtSizeTag; -- RPI_FW_FB_SIZE_TAG VirtSize; -- RPI_FW_TAG_HEAD DepthTag; -- RPI_FW_FB_DEPTH_TAG Depth; -- RPI_FW_TAG_HEAD AllocFbTag; -- RPI_FW_FB_ALLOC_TAG AllocFb; -- RPI_FW_TAG_HEAD PitchTag; -- RPI_FW_FB_PITCH_TAG Pitch; -- UINT32 EndTag; --} RPI_FW_INIT_FB_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -638,7 +736,7 @@ RpiFirmwareGetFbSize ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -658,7 +756,7 @@ RpiFirmwareGetFbSize ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -680,7 +778,7 @@ RpiFirmwareFreeFb (VOID) - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -701,7 +799,7 @@ RpiFirmwareFreeFb (VOID) - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -731,7 +829,7 @@ RpiFirmwareAllocFb ( - ASSERT (FbBase != NULL); - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -765,7 +863,7 @@ RpiFirmwareAllocFb ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -778,14 +876,6 @@ RpiFirmwareAllocFb ( - return EFI_SUCCESS; - } - --#pragma pack() --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- UINT8 CommandLine[0]; --} RPI_FW_GET_COMMAND_LINE_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -800,18 +890,18 @@ RpiFirmwareGetCommmandLine ( - - if ((BufferSize % sizeof (UINT32)) != 0) { - DEBUG ((DEBUG_ERROR, "%a: BufferSize must be a multiple of 4\n", -- __FUNCTION__)); -+ __func__)); - return EFI_INVALID_PARAMETER; - } - - if (sizeof (*Cmd) + BufferSize > EFI_PAGES_TO_SIZE (NUM_PAGES)) { - DEBUG ((DEBUG_ERROR, "%a: BufferSize exceeds size of DMA buffer\n", -- __FUNCTION__)); -+ __func__)); - return EFI_OUT_OF_RESOURCES; - } - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -830,7 +920,7 @@ RpiFirmwareGetCommmandLine ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -838,7 +928,7 @@ RpiFirmwareGetCommmandLine ( - Cmd->TagHead.TagValueSize &= ~RPI_MBOX_VALUE_SIZE_RESPONSE_MASK; - if (Cmd->TagHead.TagValueSize >= BufferSize && - Cmd->CommandLine[Cmd->TagHead.TagValueSize - 1] != '\0') { -- DEBUG ((DEBUG_ERROR, "%a: insufficient buffer size\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: insufficient buffer size\n", __func__)); - ReleaseSpinLock (&mMailboxLock); - return EFI_OUT_OF_RESOURCES; - } -@@ -857,21 +947,6 @@ RpiFirmwareGetCommmandLine ( - return EFI_SUCCESS; - } - --#pragma pack() --typedef struct { -- UINT32 ClockId; -- UINT32 ClockRate; -- UINT32 SkipTurbo; --} RPI_FW_SET_CLOCK_RATE_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_SET_CLOCK_RATE_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_SET_CLOCK_RATE_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -886,7 +961,7 @@ RpiFirmwareSetClockRate ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -903,14 +978,14 @@ RpiFirmwareSetClockRate ( - Cmd->TagBody.SkipTurbo = SkipTurbo ? 1 : 0; - Cmd->EndTag = 0; - -- DEBUG ((DEBUG_INFO, "%a: Request clock rate %X = %d\n", __FUNCTION__, ClockId, ClockRate)); -+ DEBUG ((DEBUG_INFO, "%a: Request clock rate %X = %d\n", __func__, ClockId, ClockRate)); - Status = MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_CHANNEL, &Result); - - if (EFI_ERROR (Status) || - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -920,20 +995,6 @@ RpiFirmwareSetClockRate ( - return EFI_SUCCESS; - } - --#pragma pack() --typedef struct { -- UINT32 ClockId; -- UINT32 ClockRate; --} RPI_FW_CLOCK_RATE_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_CLOCK_RATE_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_GET_CLOCK_RATE_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - RpiFirmwareGetClockRate ( -@@ -947,7 +1008,7 @@ RpiFirmwareGetClockRate ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -968,7 +1029,7 @@ RpiFirmwareGetClockRate ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -976,7 +1037,7 @@ RpiFirmwareGetClockRate ( - *ClockRate = Cmd->TagBody.ClockRate; - ReleaseSpinLock (&mMailboxLock); - -- DEBUG ((DEBUG_INFO, "%a: Get Clock Rate return: ClockRate=%d ClockId=%X\n", __FUNCTION__, *ClockRate, ClockId)); -+ DEBUG ((DEBUG_INFO, "%a: Get Clock Rate return: ClockRate=%d ClockId=%X\n", __func__, *ClockRate, ClockId)); - - return EFI_SUCCESS; - } -@@ -1025,20 +1086,6 @@ RpiFirmwareGetMinClockRate ( - return RpiFirmwareGetClockRate (ClockId, RPI_MBOX_GET_MIN_CLOCK_RATE, ClockRate); - } - --#pragma pack() --typedef struct { -- UINT32 ClockId; -- UINT32 ClockState; --} RPI_FW_GET_CLOCK_STATE_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_GET_CLOCK_STATE_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_SET_CLOCK_STATE_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - RpiFirmwareSetClockState ( -@@ -1051,7 +1098,7 @@ RpiFirmwareSetClockState ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -1073,7 +1120,7 @@ RpiFirmwareSetClockState ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - ReleaseSpinLock (&mMailboxLock); - return EFI_DEVICE_ERROR; - } -@@ -1083,20 +1130,6 @@ RpiFirmwareSetClockState ( - return EFI_SUCCESS; - } - --#pragma pack() --typedef struct { -- UINT32 Pin; -- UINT32 State; --} RPI_FW_SET_GPIO_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_SET_GPIO_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_SET_GPIO_CMD; --#pragma pack() -- - STATIC - VOID - EFIAPI -@@ -1110,7 +1143,7 @@ RpiFirmwareSetGpio ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return; - } - -@@ -1135,7 +1168,7 @@ RpiFirmwareSetGpio ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - } - ReleaseSpinLock (&mMailboxLock); - } -@@ -1150,19 +1183,6 @@ RpiFirmwareSetLed ( - RpiFirmwareSetGpio (RPI_EXP_GPIO_LED, On); - } - --#pragma pack() --typedef struct { -- UINT32 DeviceAddress; --} RPI_FW_NOTIFY_XHCI_RESET_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_NOTIFY_XHCI_RESET_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_NOTIFY_XHCI_RESET_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -1177,7 +1197,7 @@ RpiFirmwareNotifyXhciReset ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -1198,7 +1218,7 @@ RpiFirmwareNotifyXhciReset ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - } - - ReleaseSpinLock (&mMailboxLock); -@@ -1206,24 +1226,6 @@ RpiFirmwareNotifyXhciReset ( - return Status; - } - --#pragma pack() --typedef struct { -- UINT32 Gpio; -- UINT32 Direction; -- UINT32 Polarity; -- UINT32 TermEn; -- UINT32 TermPullUp; --} RPI_FW_GPIO_GET_CFG_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_GPIO_GET_CFG_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_NOTIFY_GPIO_GET_CFG_CMD; --#pragma pack() -- -- - STATIC - EFI_STATUS - EFIAPI -@@ -1237,7 +1239,7 @@ RpiFirmwareNotifyGpioGetCfg ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -1261,7 +1263,7 @@ RpiFirmwareNotifyGpioGetCfg ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - } - - ReleaseSpinLock (&mMailboxLock); -@@ -1269,26 +1271,6 @@ RpiFirmwareNotifyGpioGetCfg ( - return Status; - } - -- --#pragma pack() --typedef struct { -- UINT32 Gpio; -- UINT32 Direction; -- UINT32 Polarity; -- UINT32 TermEn; -- UINT32 TermPullUp; -- UINT32 State; --} RPI_FW_GPIO_SET_CFG_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_GPIO_SET_CFG_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_NOTIFY_GPIO_SET_CFG_CMD; --#pragma pack() -- -- - STATIC - EFI_STATUS - EFIAPI -@@ -1304,13 +1286,13 @@ RpiFirmwareNotifyGpioSetCfg ( - - Status = RpiFirmwareNotifyGpioGetCfg (Gpio, &Result); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to get GPIO polarity\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get GPIO polarity\n", __func__)); - Result = 0; //default polarity - } - - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -1338,7 +1320,7 @@ RpiFirmwareNotifyGpioSetCfg ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - } - - ReleaseSpinLock (&mMailboxLock); -@@ -1349,21 +1331,6 @@ RpiFirmwareNotifyGpioSetCfg ( - return Status; - } - -- --#pragma pack() --typedef struct { -- UINT32 Register; -- UINT32 Value; --} RPI_FW_RTC_TAG; -- --typedef struct { -- RPI_FW_BUFFER_HEAD BufferHead; -- RPI_FW_TAG_HEAD TagHead; -- RPI_FW_RTC_TAG TagBody; -- UINT32 EndTag; --} RPI_FW_RTC_CMD; --#pragma pack() -- - STATIC - EFI_STATUS - EFIAPI -@@ -1377,7 +1344,7 @@ RpiFirmwareGetRtc ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -1399,7 +1366,7 @@ RpiFirmwareGetRtc ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - Status = EFI_DEVICE_ERROR; - } else { - *Value = Cmd->TagBody.Value; -@@ -1423,7 +1390,7 @@ RpiFirmwareSetRtc ( - UINT32 Result; - - if (!AcquireSpinLockOrFail (&mMailboxLock)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -1445,7 +1412,7 @@ RpiFirmwareSetRtc ( - Cmd->BufferHead.Response != RPI_MBOX_RESP_SUCCESS) { - DEBUG ((DEBUG_ERROR, - "%a: mailbox transaction error: Status == %r, Response == 0x%x\n", -- __FUNCTION__, Status, Cmd->BufferHead.Response)); -+ __func__, Status, Cmd->BufferHead.Response)); - Status = EFI_DEVICE_ERROR; - } - -@@ -1525,7 +1492,7 @@ RpiFirmwareDxeInitialize ( - - Status = DmaAllocateBuffer (EfiRuntimeServicesData, NUM_PAGES, &mDmaBuffer); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to allocate DMA buffer (Status == %r)\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to allocate DMA buffer (Status == %r)\n", __func__)); - return Status; - } - -@@ -1533,7 +1500,7 @@ RpiFirmwareDxeInitialize ( - Status = DmaMap (MapOperationBusMasterCommonBuffer, mDmaBuffer, &mDmaBufferSize, - &mDmaBufferBusAddress, &mDmaBufferMapping); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: failed to map DMA buffer (Status == %r)\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed to map DMA buffer (Status == %r)\n", __func__)); - goto FreeBuffer; - } - -@@ -1549,7 +1516,7 @@ RpiFirmwareDxeInitialize ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: failed to install RPI firmware protocol (Status == %r)\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - goto UnmapBuffer; - } - -@@ -1562,7 +1529,7 @@ RpiFirmwareDxeInitialize ( - EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: AddMemorySpace failed. Status=%r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - goto UnmapBuffer; - } - -@@ -1572,7 +1539,7 @@ RpiFirmwareDxeInitialize ( - EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: SetMemorySpaceAttributes failed. Status=%r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - goto UnmapBuffer; - } - -diff --git a/Platform/RaspberryPi/Drivers/SdHostDxe/SdHostDxe.c b/Platform/RaspberryPi/Drivers/SdHostDxe/SdHostDxe.c -index 0fd1ac6e..336c18c7 100644 ---- a/Platform/RaspberryPi/Drivers/SdHostDxe/SdHostDxe.c -+++ b/Platform/RaspberryPi/Drivers/SdHostDxe/SdHostDxe.c -@@ -388,7 +388,7 @@ SdSendCommand ( - if (MmioRead32 (SDHOST_CMD) & SDHOST_CMD_NEW_FLAG) { - DEBUG ((DEBUG_MMCHOST_SD_ERROR, - "%a(%u): CMD%d is still being executed after %d trial(s)\n", -- __FUNCTION__, __LINE__, MMC_GET_INDX (MmcCmd), RetryCount)); -+ __func__, __LINE__, MMC_GET_INDX (MmcCmd), RetryCount)); - } - - // Write command and set it to start execution -@@ -445,7 +445,7 @@ SdSendCommand ( - Status = EFI_SUCCESS; - } else { - DEBUG ((DEBUG_MMCHOST_SD_ERROR, "%a(%u): CMD%d execution failed after %d trial(s)\n", -- __FUNCTION__, __LINE__, MMC_GET_INDX (MmcCmd), RetryCount)); -+ __func__, __LINE__, MMC_GET_INDX (MmcCmd), RetryCount)); - SdHostDumpStatus (); - } - -diff --git a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c -index daa4e6ae..323a2364 100644 ---- a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c -+++ b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c -@@ -246,7 +246,7 @@ FilterAndProcess ( - // - // This is not an error, just an informative condition. - // -- DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid, -+ DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __func__, ProtocolGuid, - Status)); - return; - } -@@ -297,25 +297,25 @@ AddOutput ( - DevicePath = DevicePathFromHandle (Handle); - if (DevicePath == NULL) { - DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n", -- __FUNCTION__, ReportText, Handle)); -+ __func__, ReportText, Handle)); - return; - } - - Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __func__, - ReportText, Status)); - return; - } - - Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __func__, - ReportText, Status)); - return; - } - -- DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__, -+ DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __func__, - ReportText)); - } - -@@ -339,8 +339,8 @@ Connect ( - NULL, // RemainingDevicePath -- produce all children - FALSE // Recursive - ); -- DEBUG ((EFI_ERROR (Status) ? EFI_D_ERROR : EFI_D_VERBOSE, "%a: %s: %r\n", -- __FUNCTION__, ReportText, Status)); -+ DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n", -+ __func__, ReportText, Status)); - } - - STATIC -@@ -457,9 +457,9 @@ RemoveStaleBootOptions ( - - DevicePathString = ConvertDevicePathToText(BootOptions[Index].FilePath, FALSE, FALSE); - DEBUG (( -- EFI_ERROR (Status) ? EFI_D_WARN : EFI_D_INFO, -+ EFI_ERROR (Status) ? DEBUG_WARN : DEBUG_INFO, - "%a: removing stale Boot#%04x %s: %r\n", -- __FUNCTION__, -+ __func__, - (UINT32)BootOptions[Index].OptionNumber, - DevicePathString == NULL ? L"" : DevicePathString, - Status -@@ -735,7 +735,7 @@ BootDiscoveryPolicyHandler ( - DEBUG (( - DEBUG_INFO, - "%a - Unexpected DiscoveryPolicy (0x%x). Run Minimal Discovery Policy\n", -- __FUNCTION__, -+ __func__, - DiscoveryPolicy - )); - return EFI_SUCCESS; -@@ -747,13 +747,13 @@ BootDiscoveryPolicyHandler ( - (VOID **)&BMPolicy - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a - Failed to locate gEfiBootManagerPolicyProtocolGuid - %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a - Failed to locate gEfiBootManagerPolicyProtocolGuid - %r\n", __func__, Status)); - return Status; - } - - Status = BMPolicy->ConnectDeviceClass (BMPolicy, Class); - if (EFI_ERROR (Status)){ -- DEBUG ((DEBUG_ERROR, "%a - ConnectDeviceClass returns - %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a - ConnectDeviceClass returns - %r\n", __func__, Status)); - return Status; - } - -@@ -927,7 +927,7 @@ PlatformBootManagerUnableToBoot ( - // - if (NewBootOptionCount != OldBootOptionCount) { - DEBUG ((DEBUG_WARN, "%a: rebooting after refreshing all boot options\n", -- __FUNCTION__)); -+ __func__)); - gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL); - } - -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S b/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S -index 21457c89..c6741b46 100644 ---- a/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/AArch64/RaspberryPiHelper.S -@@ -10,7 +10,7 @@ - * - **/ - --#include -+#include - #include - #include - #include -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 0f3b669c..8ab4f15a 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -120,15 +120,6 @@ - # use the accelerated BaseMemoryLibOptDxe by default, overrides for SEC/PEI below - BaseMemoryLib|MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf - -- # -- # It is not possible to prevent the ARM compiler from inserting calls to intrinsic functions. -- # This library provides the instrinsic functions such a compiler may generate calls to. -- # -- NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf -- -- # Add support for GCC stack protector -- NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf -- - # ARM Architectural Libraries - CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf - DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf -diff --git a/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c b/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c -index 5e66a983..d0c0eee7 100644 ---- a/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c -+++ b/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c -@@ -106,7 +106,7 @@ CreateU5MCProcessorSmbiosDataHob ( - RISC_V_PROCESSOR_TYPE7_HOB_DATA *L2CacheDataHobPtr; - RISC_V_PROCESSOR_SMBIOS_HOB_DATA *SmbiosDataHobPtr; - -- DEBUG ((DEBUG_INFO, "%a: Entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry\n", __func__)); - - if (SmbiosHobPtr == NULL) { - return EFI_INVALID_PARAMETER; -@@ -154,7 +154,7 @@ CreateU5MCProcessorSmbiosDataHob ( - ASSERT (FALSE); - } - *SmbiosHobPtr = SmbiosDataHobPtr; -- DEBUG ((DEBUG_INFO, "%a: Exit\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Exit\n", __func__)); - - return EFI_SUCCESS; - } -diff --git a/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/PlatformSecPpiLib.c b/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/PlatformSecPpiLib.c -index ef84e8c1..fdd971c2 100644 ---- a/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/PlatformSecPpiLib.c -+++ b/Platform/SiFive/U5SeriesPkg/Library/PlatformSecPpiLib/PlatformSecPpiLib.c -@@ -87,7 +87,7 @@ TemporaryRamMigration ( - - DEBUG ((DEBUG_INFO, - "%a: Temp Mem Base:0x%Lx, Permanent Mem Base:0x%Lx, CopySize:0x%Lx\n", -- __FUNCTION__, -+ __func__, - TemporaryMemoryBase, - PermanentMemoryBase, - (UINT64)CopySize -@@ -113,7 +113,7 @@ TemporaryRamMigration ( - // Relocate PEI Service ** - // - FirmwareContext->PeiServiceTable += (unsigned long)((UINTN)NewStack - (UINTN)OldStack); -- DEBUG ((DEBUG_INFO, "%a: OpenSBI Firmware Context is relocated to 0x%x\n", __FUNCTION__, FirmwareContext)); -+ DEBUG ((DEBUG_INFO, "%a: OpenSBI Firmware Context is relocated to 0x%x\n", __func__, FirmwareContext)); - DEBUG ((DEBUG_INFO, "OpenSBI Firmware Context at 0x%x\n", FirmwareContext)); - DEBUG ((DEBUG_INFO, " PEI Service at 0x%x\n\n", FirmwareContext->PeiServiceTable)); - -@@ -129,7 +129,7 @@ EFI_STATUS EFIAPI TemporaryRamDone ( - VOID - ) - { -- DEBUG ((DEBUG_INFO, "%a: 2nd time PEI core, temporary ram done.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: 2nd time PEI core, temporary ram done.\n", __func__)); - return EFI_SUCCESS; - } - /** Return platform SEC PPI before PEI Core -diff --git a/Platform/Socionext/DeveloperBox/SmbiosPlatformDxe/SmbiosPlatformDxe.c b/Platform/Socionext/DeveloperBox/SmbiosPlatformDxe/SmbiosPlatformDxe.c -index f071aa01..9442c9e2 100644 ---- a/Platform/Socionext/DeveloperBox/SmbiosPlatformDxe/SmbiosPlatformDxe.c -+++ b/Platform/Socionext/DeveloperBox/SmbiosPlatformDxe/SmbiosPlatformDxe.c -@@ -902,7 +902,7 @@ InstallAllStructures ( - Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle, FixedTables[Idx]); - if (EFI_ERROR(Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to add SMBIOS type %u table - %r\n", -- __FUNCTION__, FixedTables[Idx]->Type, Status)); -+ __func__, FixedTables[Idx]->Type, Status)); - break; - } - } -@@ -914,7 +914,7 @@ InstallAllStructures ( - Status = InstallMemoryDeviceStructure(); - if (EFI_ERROR(Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to add SMBIOS type 17 table - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - - for (Hob.Raw = GetHobList (); -@@ -926,7 +926,7 @@ InstallAllStructures ( - Hob.ResourceDescriptor->ResourceLength); - if (EFI_ERROR(Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to add SMBIOS type 19 table - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - break; - } - } -diff --git a/Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.c b/Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.c -index f4e72463..755bb08c 100644 ---- a/Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.c -+++ b/Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableInitLib.c -@@ -40,7 +40,7 @@ XhciInit ( - - Status = MvGpioGetProtocol (MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER, &GpioProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __func__)); - return Status; - } - -diff --git a/Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c b/Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c -index 18312ac4..f12fac01 100644 ---- a/Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c -+++ b/Platform/SolidRun/Cn913xCEx7Eval/NonDiscoverableInitLib/NonDiscoverableInitLib.c -@@ -39,7 +39,7 @@ ConfigurePins ( - - Status = MvGpioGetProtocol (DriverType, &GpioProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __func__)); - return Status; - } - -diff --git a/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c b/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c -index fb329cbd..1063e992 100644 ---- a/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c -+++ b/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c -@@ -161,7 +161,7 @@ StyxSataPlatformDxeEntryPoint ( - FixedPcdGet8(PcdSata0PortCount), 0); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to initialize primary SATA controller!\n", -- __FUNCTION__)); -+ __func__)); - return Status; - } - -@@ -186,7 +186,7 @@ StyxSataPlatformDxeEntryPoint ( - FixedPcdGet8(PcdSata0PortCount)); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to initialize secondary SATA controller!\n", -- __FUNCTION__)); -+ __func__)); - } else { - for (PortNum = 0; PortNum < FixedPcdGet8(PcdSata1PortCount); PortNum++) { - SetPrdSingleSata1 (PortNum); -diff --git a/Silicon/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c b/Silicon/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c -index e34842e5..4295f4b4 100644 ---- a/Silicon/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c -+++ b/Silicon/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c -@@ -474,7 +474,7 @@ StyxSpiFvDxeInitialize ( - - DEBUG ((EFI_D_INFO, - "%a: Using NV store FV in-memory copy at 0x%lx, LBA offset == 0x%lx\n", -- __FUNCTION__, mNvStorageBase, mNvStorageLbaOffset)); -+ __func__, mNvStorageBase, mNvStorageLbaOffset)); - - Status = gBS->LocateProtocol (&gAmdIscpDxeProtocolGuid, NULL, - (VOID **)&mIscpDxeProtocol); -diff --git a/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c b/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c -index c047d744..37d63adc 100644 ---- a/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c -+++ b/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c -@@ -76,7 +76,7 @@ MoveNvStoreImage ( - CopyMem (NewBase, OldBase, Size); - - DEBUG ((EFI_D_INFO, "%a: Relocating NV store FV from %p to %p\n", -- __FUNCTION__, OldBase, NewBase)); -+ __func__, OldBase, NewBase)); - - Status = PcdSet64S (PcdFlashNvStorageVariableBase64, (UINT64)NewBase); - ASSERT_EFI_ERROR (Status); -diff --git a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c -index 178fb569..d6440957 100644 ---- a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c -+++ b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c -@@ -149,7 +149,7 @@ SetDeviceStatus ( - if (Rc) { - DEBUG ((DEBUG_ERROR, - "%a: Could not set 'status' property for '%a' node\n", -- __FUNCTION__, Device)); -+ __func__, Device)); - } - } - } -@@ -178,7 +178,7 @@ SetMacAddress ( - if (Rc) { - DEBUG ((DEBUG_ERROR, - "%a: Could not set 'mac-address' property for '%a' node\n", -- __FUNCTION__, Device)); -+ __func__, Device)); - } - } - } -@@ -199,14 +199,14 @@ DisableSmmu ( - Node = fdt_path_offset (Fdt, DeviceNodeName); - if (Node <= 0) { - DEBUG ((DEBUG_WARN, "%a: Failed to find path %s: %a\n", -- __FUNCTION__, DeviceNodeName, fdt_strerror (Node))); -+ __func__, DeviceNodeName, fdt_strerror (Node))); - return; - } - - Error = fdt_delprop (Fdt, Node, IommuPropName); - if (Error != 0) { - DEBUG ((DEBUG_WARN, "%a: Failed to delete property %a: %a\n", -- __FUNCTION__, IommuPropName, fdt_strerror (Error))); -+ __func__, IommuPropName, fdt_strerror (Error))); - return; - } - -@@ -218,7 +218,7 @@ DisableSmmu ( - Error = fdt_del_node (Fdt, Node); - if (Error != 0) { - DEBUG ((DEBUG_WARN, "%a: Failed to delete node %a: %a\n", -- __FUNCTION__, SmmuNodeName, fdt_strerror (Error))); -+ __func__, SmmuNodeName, fdt_strerror (Error))); - } - } - -diff --git a/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c -index 7eeee082..ac795fe5 100644 ---- a/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c -+++ b/Silicon/AMD/Styx/Library/StyxPlatformFlashAccessLib/StyxPlatformFlashAccessLib.c -@@ -69,7 +69,7 @@ PerformFlashWriteWithProgress ( - - if (FlashAddressType != FlashAddressTypeRelativeAddress) { - DEBUG ((DEBUG_ERROR, "%a: only FlashAddressTypeRelativeAddress supported\n", -- __FUNCTION__)); -+ __func__)); - - return EFI_INVALID_PARAMETER; - } -@@ -77,7 +77,7 @@ PerformFlashWriteWithProgress ( - if (FirmwareType != PlatformFirmwareTypeSystemFirmware) { - DEBUG ((DEBUG_ERROR, - "%a: only PlatformFirmwareTypeSystemFirmware supported\n", -- __FUNCTION__)); -+ __func__)); - - return EFI_INVALID_PARAMETER; - } -@@ -85,14 +85,14 @@ PerformFlashWriteWithProgress ( - if ((FlashAddress % mBlockSize) != 0 || (Length % mBlockSize) != 0) { - DEBUG ((DEBUG_ERROR, - "%a:region [0x%lx, 0x%lx) is not a multiple of the blocksize 0x%lx\n", -- __FUNCTION__, FlashAddress, Length, mBlockSize)); -+ __func__, FlashAddress, Length, mBlockSize)); - return EFI_INVALID_PARAMETER; - } - - if ((FlashAddress + Length) > mFlashMaxSize) { - DEBUG ((DEBUG_ERROR, - "%a: updated region [0x%lx, 0x%lx) outside of FV region [0x0, 0x%lx)\n", -- __FUNCTION__, FlashAddress, FlashAddress + Length, mFlashMaxSize)); -+ __func__, FlashAddress, FlashAddress + Length, mFlashMaxSize)); - return EFI_INVALID_PARAMETER; - } - -@@ -105,20 +105,20 @@ PerformFlashWriteWithProgress ( - // Erase the block - // - DEBUG ((DEBUG_INFO, "%a: erasing 0x%llx bytes at address 0x%llx\n", -- __FUNCTION__, mBlockSize, FlashAddress)); -+ __func__, mBlockSize, FlashAddress)); - - Status = IscpDxeProtocol->AmdExecuteEraseFvBlockDxe (IscpDxeProtocol, - FlashAddress, mBlockSize); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: AmdExecuteEraseFvBlockDxe () failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - - // - // Write the new data - // - DEBUG ((DEBUG_INFO, "%a: writing 0x%llx bytes at at address 0x%llx\\n", -- __FUNCTION__, mBlockSize, FlashAddress)); -+ __func__, mBlockSize, FlashAddress)); - - Status = IscpDxeProtocol->AmdExecuteUpdateFvBlockDxe (IscpDxeProtocol, - FlashAddress, Buffer, mBlockSize); -@@ -126,7 +126,7 @@ PerformFlashWriteWithProgress ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: write of block address 0x%lx failed - %r\n", -- __FUNCTION__, FlashAddress, Status)); -+ __func__, FlashAddress, Status)); - } - - FlashAddress += mBlockSize; -diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/AcpiConfigDxe/AcpiConfigDxe.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/AcpiConfigDxe/AcpiConfigDxe.c -index 6ba39ad4..5a26d9fd 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Drivers/AcpiConfigDxe/AcpiConfigDxe.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/AcpiConfigDxe/AcpiConfigDxe.c -@@ -368,7 +368,7 @@ AcpiNVDataUpdate ( - &PrivateData->Configuration - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a %d gRT->SetVariable() failed \n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a %d gRT->SetVariable() failed \n", __func__, __LINE__)); - return Status; - } - -@@ -405,7 +405,7 @@ UpdateTurboModeConfig ( - } - } - } else { -- DEBUG ((DEBUG_INFO, "%a: Turbo mode is unsupported! \n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Turbo mode is unsupported! \n", __func__)); - } - - return EFI_SUCCESS; -diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.c -index c5ba48ed..4064421a 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/CpuConfigDxe/CpuConfigDxe.c -@@ -82,7 +82,7 @@ CpuNvParamGet ( - &Value - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a %d Fail to get NVParam, %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a %d Fail to get NVParam, %r\n", __func__, __LINE__, Status)); - Configuration->CpuSubNumaMode = SUBNUMA_MODE_MONOLITHIC; - } else { - Configuration->CpuSubNumaMode = Value; -@@ -117,7 +117,7 @@ CpuNvParamSet ( - Configuration->CpuSubNumaMode - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a %d Fail to set NVParam, %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a %d Fail to set NVParam, %r\n", __func__, __LINE__, Status)); - ASSERT_EFI_ERROR (Status); - return Status; - } -diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/FlashFvbDxe/FlashFvbDxe.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/FlashFvbDxe/FlashFvbDxe.c -index 00969470..a2bcd8f9 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Drivers/FlashFvbDxe/FlashFvbDxe.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/FlashFvbDxe/FlashFvbDxe.c -@@ -480,7 +480,7 @@ FlashFvbDxeInitialize ( - DEBUG (( - DEBUG_INFO, - "%a: Using NV store FV in-memory copy at 0x%lx with size 0x%x\n", -- __FUNCTION__, -+ __func__, - mNvStorageBase, - mNvStorageSize - )); -@@ -488,14 +488,14 @@ FlashFvbDxeInitialize ( - // Get NV Flash information - Status = FlashGetNvRamInfo (&mNvFlashBase, &mNvFlashSize); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to get Flash info\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get Flash info\n", __func__)); - return EFI_DEVICE_ERROR; - } - - if (mNvFlashSize >= (mNvStorageSize * 2)) { -- DEBUG ((DEBUG_INFO, "%a: NV store on Flash is valid\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: NV store on Flash is valid\n", __func__)); - } else { -- DEBUG ((DEBUG_ERROR, "%a: NV store on Flash is invalid\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: NV store on Flash is invalid\n", __func__)); - return EFI_DEVICE_ERROR; - } - -diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/FlashPei/FlashPei.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/FlashPei/FlashPei.c -index 3da7df39..87a1239b 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Drivers/FlashPei/FlashPei.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/FlashPei/FlashPei.c -@@ -50,14 +50,14 @@ FlashPeiEntryPoint ( - DEBUG (( - DEBUG_INFO, - "%a: Using NV store FV in-memory copy at 0x%lx with size 0x%x\n", -- __FUNCTION__, -+ __func__, - NvRamAddress, - NvRamSize - )); - - Status = FlashGetNvRamInfo (&FWNvRamStartOffset, &FWNvRamSize); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to get Flash NVRAM info %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get Flash NVRAM info %r\n", __func__, Status)); - return Status; - } - -diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/PlatformInfoDxe/PlatformInfoDxe.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/PlatformInfoDxe/PlatformInfoDxe.c -index 82d2cf13..9b868820 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Drivers/PlatformInfoDxe/PlatformInfoDxe.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/PlatformInfoDxe/PlatformInfoDxe.c -@@ -380,7 +380,7 @@ PlatformInfoEntryPoint ( - DEBUG (( - DEBUG_ERROR, - "%a %d Fail to update the platform info screen \n", -- __FUNCTION__, -+ __func__, - __LINE__ - )); - return Status; -diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c -index 2da012fa..e5e62512 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RasConfigDxe/RasConfigDxe.c -@@ -113,7 +113,7 @@ RasConfigNvParamGet ( - Value - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __func__, __LINE__)); - ASSERT_EFI_ERROR (Status); - Value = 0; - } -@@ -134,7 +134,7 @@ RasConfigNvParamGet ( - Value - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __func__, __LINE__)); - ASSERT_EFI_ERROR (Status); - Value = 0; - } -@@ -155,7 +155,7 @@ RasConfigNvParamGet ( - Value - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __func__, __LINE__)); - ASSERT_EFI_ERROR (Status); - Value = 0; - } -@@ -176,7 +176,7 @@ RasConfigNvParamGet ( - Value - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __func__, __LINE__)); - ASSERT_EFI_ERROR (Status); - Value = 0; - } -@@ -197,7 +197,7 @@ RasConfigNvParamGet ( - Value - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __func__, __LINE__)); - ASSERT_EFI_ERROR (Status); - Value = 0; - } -@@ -218,7 +218,7 @@ RasConfigNvParamGet ( - Value - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __func__, __LINE__)); - ASSERT_EFI_ERROR (Status); - Value = 0; - } -@@ -239,7 +239,7 @@ RasConfigNvParamGet ( - Value - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __func__, __LINE__)); - ASSERT_EFI_ERROR (Status); - Value = 0; - } -@@ -260,7 +260,7 @@ RasConfigNvParamGet ( - Value - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "%a:%d NVParamSet() failed!\n", __func__, __LINE__)); - ASSERT_EFI_ERROR (Status); - Value = 0; - } -@@ -809,7 +809,7 @@ RasConfigEntryPoint ( - DEBUG (( - DEBUG_ERROR, - "%a %d Fail to update Memory Configuration screen \n", -- __FUNCTION__, -+ __func__, - __LINE__ - )); - RasConfigUnload (); -diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/RngDxe/RngDxe.c b/Silicon/Ampere/AmpereAltraPkg/Drivers/RngDxe/RngDxe.c -index bb8140cf..9f2ec5b7 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Drivers/RngDxe/RngDxe.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/RngDxe/RngDxe.c -@@ -111,7 +111,7 @@ RngGetRNG ( - DEBUG (( - DEBUG_ERROR, - "%a:%d Failed to generate a random number. \n", -- __FUNCTION__, -+ __func__, - __LINE__ - )); - return Status; -diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c b/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c -index dea2e640..c911ff7e 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c -@@ -1031,7 +1031,7 @@ AutoLaneBifurcationRetry: - - Status = PciePhyInit (RootComplex->SerdesBase); - if (RETURN_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to initialize the PCIe PHY\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to initialize the PCIe PHY\n", __func__)); - return RETURN_DEVICE_ERROR; - } - } -diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLib.c -index ecb03b1e..f6d9c5e2 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLib.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLib.c -@@ -33,7 +33,7 @@ GetPlatformHob ( - (CONST VOID *)FixedPcdGet64 (PcdSystemMemoryBase) - ); - if (mPlatformInfoHob == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to get gPlatformInfoHobGuid!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get gPlatformInfoHobGuid!\n", __func__)); - return NULL; - } - } -diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/RuntimeAmpereCpuLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/RuntimeAmpereCpuLib.c -index 5e835442..b2eca9e5 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/RuntimeAmpereCpuLib.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/RuntimeAmpereCpuLib.c -@@ -85,7 +85,7 @@ RuntimeAmpereCpuLibConstructor ( - (CONST VOID *)FixedPcdGet64 (PcdSystemMemoryBase) - ); - if (Hob == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to get gPlatformInfoHobGuid!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get gPlatformInfoHobGuid!\n", __func__)); - return EFI_DEVICE_ERROR; - } - -diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/DwI2cLib/DwI2cLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/DwI2cLib/DwI2cLib.c -index 669ba2ea..5244ef44 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Library/DwI2cLib/DwI2cLib.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Library/DwI2cLib/DwI2cLib.c -@@ -178,7 +178,7 @@ I2cHWInit ( - mI2cBusList[Bus].Enabled = 0; - - DEBUG ((DEBUG_VERBOSE, "%a: Bus %d, Rx_Buffer %d, Tx_Buffer %d\n", -- __FUNCTION__, -+ __func__, - Bus, - mI2cBusList[Bus].RxFifo, - mI2cBusList[Bus].TxFifo -@@ -211,7 +211,7 @@ I2cEnable ( - } while (I2cStatusCnt-- != 0); - - if (I2cStatusCnt == 0) { -- DEBUG ((DEBUG_ERROR, "%a: Enable/disable timeout\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Enable/disable timeout\n", __func__)); - } - - if ((Enable == 0) || (I2cStatusCnt == 0)) { -@@ -260,7 +260,7 @@ I2cCheckErrors ( - - if ((ErrorStatus & DW_IC_INTR_RX_UNDER) != 0) { - DEBUG ((DEBUG_ERROR, "%a: RX_UNDER error on i2c bus %d error status %08x\n", -- __FUNCTION__, -+ __func__, - Bus, - ErrorStatus - )); -@@ -269,7 +269,7 @@ I2cCheckErrors ( - - if ((ErrorStatus & DW_IC_INTR_RX_OVER) != 0) { - DEBUG ((DEBUG_ERROR, "%a: RX_OVER error on i2c bus %d error status %08x\n", -- __FUNCTION__, -+ __func__, - Bus, - ErrorStatus - )); -@@ -278,7 +278,7 @@ I2cCheckErrors ( - - if ((ErrorStatus & DW_IC_INTR_TX_ABRT) != 0) { - DEBUG ((DEBUG_VERBOSE, "%a: TX_ABORT at source %08x\n", -- __FUNCTION__, -+ __func__, - MmioRead32 (Base + DW_IC_TX_ABRT_SOURCE) - )); - MmioRead32 (Base + DW_IC_CLR_TX_ABRT); -@@ -303,7 +303,7 @@ I2cWaitBusNotBusy ( - - while ((MmioRead32 (Base + DW_IC_STATUS) & DW_IC_STATUS_MST_ACTIVITY) != 0) { - if (PollCount == 0) { -- DEBUG ((DEBUG_VERBOSE, "%a: Timeout while waiting for bus ready\n", __FUNCTION__)); -+ DEBUG ((DEBUG_VERBOSE, "%a: Timeout while waiting for bus ready\n", __func__)); - return FALSE; - } - PollCount--; -@@ -334,7 +334,7 @@ I2cWaitTxData ( - - while (MmioRead32 (Base + DW_IC_TXFLR) == mI2cBusList[Bus].TxFifo) { - if (PollCount++ >= DW_MAX_TRANSFER_POLL_COUNT) { -- DEBUG ((DEBUG_ERROR, "%a: Timeout waiting for TX buffer available\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Timeout waiting for TX buffer available\n", __func__)); - return EFI_TIMEOUT; - } - MicroSecondDelay (mI2cBusList[Bus].PollingTime); -@@ -359,7 +359,7 @@ I2cWaitRxData ( - - while ((MmioRead32 (Base + DW_IC_STATUS) & DW_IC_STATUS_RFNE) == 0) { - if (PollCount++ >= DW_MAX_TRANSFER_POLL_COUNT) { -- DEBUG ((DEBUG_ERROR, "%a: Timeout waiting for RX buffer available\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Timeout waiting for RX buffer available\n", __func__)); - return EFI_TIMEOUT; - } - -@@ -393,7 +393,7 @@ I2cSclInit ( - I2cSpeedKhz = I2cSpeed / 1000; - - DEBUG ((DEBUG_VERBOSE, "%a: Bus %d I2cClkFreq %d I2cSpeed %d\n", -- __FUNCTION__, -+ __func__, - Bus, - I2cClkFreq, - I2cSpeed -@@ -469,7 +469,7 @@ I2cFinish ( - } while (PollCount++ < DW_MAX_TRANSFER_POLL_COUNT); - - if (PollCount >= DW_MAX_TRANSFER_POLL_COUNT) { -- DEBUG ((DEBUG_ERROR, "%a: Timeout waiting for TX FIFO empty\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Timeout waiting for TX FIFO empty\n", __func__)); - return EFI_TIMEOUT; - } - -@@ -483,7 +483,7 @@ I2cFinish ( - MicroSecondDelay (mI2cBusList[Bus].PollingTime); - } while (PollCount++ < DW_MAX_TRANSFER_POLL_COUNT); - -- DEBUG ((DEBUG_ERROR, "%a: Timeout waiting for transaction finished\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Timeout waiting for transaction finished\n", __func__)); - return EFI_TIMEOUT; - } - -@@ -502,7 +502,7 @@ InternalI2cWrite ( - Base = mI2cBusList[Bus].Base; - - DEBUG ((DEBUG_VERBOSE, "%a: Write Bus %d Buf %p Length %d\n", -- __FUNCTION__, -+ __func__, - Bus, - Buf, - *Length -@@ -566,7 +566,7 @@ InternalI2cRead ( - ReadCount = 0; - - DEBUG ((DEBUG_VERBOSE, "%a: Read Bus %d Buf %p Length:%d\n", -- __FUNCTION__, -+ __func__, - Bus, - Buf, - *Length -@@ -620,7 +620,7 @@ InternalI2cRead ( - if (I2cCheckErrors (Bus) != 0) { - DEBUG ((DEBUG_VERBOSE, - "%a: Sending reading command remaining length %d CRC error\n", -- __FUNCTION__, -+ __func__, - *Length - )); - Status = EFI_CRC_ERROR; -@@ -633,7 +633,7 @@ InternalI2cRead ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_VERBOSE, - "%a: Reading remaining length %d failed to wait data\n", -- __FUNCTION__, -+ __func__, - *Length - )); - -@@ -650,7 +650,7 @@ InternalI2cRead ( - - if (I2cCheckErrors (Bus) != 0) { - DEBUG ((DEBUG_VERBOSE, "%a: Reading remaining length %d CRC error\n", -- __FUNCTION__, -+ __func__, - *Length - )); - Status = EFI_CRC_ERROR; -diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/FlashLib/FlashLibCommon.c b/Silicon/Ampere/AmpereAltraPkg/Library/FlashLib/FlashLibCommon.c -index 83695c85..921dfa73 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Library/FlashLib/FlashLibCommon.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Library/FlashLib/FlashLibCommon.c -@@ -87,7 +87,7 @@ FlashGetFailSafeInfo ( - DEBUG (( - DEBUG_INFO, - "%a: FailSafe Base 0x%llx, Size 0x%lx\n", -- __FUNCTION__, -+ __func__, - *FailSafeBase, - *FailSafeSize - )); -@@ -139,7 +139,7 @@ FlashGetNvRamInfo ( - DEBUG (( - DEBUG_INFO, - "%a: NVRAM Base 0x%llx, Size 0x%lx\n", -- __FUNCTION__, -+ __func__, - *NvRamBase, - *NvRamSize - )); -@@ -191,7 +191,7 @@ FlashGetNvRam2Info ( - DEBUG (( - DEBUG_INFO, - "%a: NVRAM2 Base 0x%llx, Size 0x%lx\n", -- __FUNCTION__, -+ __func__, - *NvRam2Base, - *NvRam2Size - )); -@@ -240,7 +240,7 @@ FlashEraseCommand ( - } - - if (MmSpiNorRes.Status != MM_SPINOR_RES_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "%a: Device error %llx\n", __FUNCTION__, MmSpiNorRes.Status)); -+ DEBUG ((DEBUG_ERROR, "%a: Device error %llx\n", __func__, MmSpiNorRes.Status)); - return EFI_DEVICE_ERROR; - } - -@@ -296,7 +296,7 @@ FlashWriteCommand ( - } - - if (MmSpiNorRes.Status != MM_SPINOR_RES_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "%a: Device error 0x%llx\n", __FUNCTION__, MmSpiNorRes.Status)); -+ DEBUG ((DEBUG_ERROR, "%a: Device error 0x%llx\n", __func__, MmSpiNorRes.Status)); - return EFI_DEVICE_ERROR; - } - -@@ -356,7 +356,7 @@ FlashReadCommand ( - } - - if (MmSpiNorRes.Status != MM_SPINOR_RES_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "%a: Device error %llx\n", __FUNCTION__, MmSpiNorRes.Status)); -+ DEBUG ((DEBUG_ERROR, "%a: Device error %llx\n", __func__, MmSpiNorRes.Status)); - return EFI_DEVICE_ERROR; - } - -diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c -index cf0f0ee3..d1acc1dc 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c -@@ -128,7 +128,7 @@ PciHostBridgeGetRootBridges ( - - RootBridges = AllocatePool (AC01_PCIE_MAX_ROOT_COMPLEX * sizeof (PCI_ROOT_BRIDGE)); - if (RootBridges == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to allocate RootBridges\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to allocate RootBridges\n", __func__)); - return NULL; - } - -@@ -161,7 +161,7 @@ PciHostBridgeGetRootBridges ( - (VOID *)&mEfiPciRootBridgeDevicePath - ); - if (DevicePath == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to allocate device path\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to allocate device path\n", __func__)); - return NULL; - } - -diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/TrngLib/TrngLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/TrngLib/TrngLib.c -index 55250ddc..ee2a102b 100644 ---- a/Silicon/Ampere/AmpereAltraPkg/Library/TrngLib/TrngLib.c -+++ b/Silicon/Ampere/AmpereAltraPkg/Library/TrngLib/TrngLib.c -@@ -52,7 +52,7 @@ GenerateRandomNumbers ( - if (RandSize != 0) { - Status = MailboxMsgGetRandomNumber64 ((UINT8 *)&Value); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to get random number!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to get random number!\n", __func__)); - return EFI_DEVICE_ERROR; - } - CopyMem (Buffer + Count * sizeof (UINT64), &Value, RandSize); -diff --git a/Silicon/Ampere/AmpereSiliconPkg/Library/PlatformUiLib/PlatformManager.c b/Silicon/Ampere/AmpereSiliconPkg/Library/PlatformUiLib/PlatformManager.c -index 1872aa80..11f1e83d 100644 ---- a/Silicon/Ampere/AmpereSiliconPkg/Library/PlatformUiLib/PlatformManager.c -+++ b/Silicon/Ampere/AmpereSiliconPkg/Library/PlatformUiLib/PlatformManager.c -@@ -289,7 +289,7 @@ PlatformManagerUiLibConstructor ( - // - CreatePlatformManagerForm (PLATFORM_MANAGER_FORM_ID); - } else { -- DEBUG ((DEBUG_ERROR, "%a: Failed to add Hii package\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to add Hii package\n", __func__)); - return EFI_INVALID_PARAMETER; - } - -diff --git a/Silicon/Atmel/AtSha204a/AtSha204aDriver.c b/Silicon/Atmel/AtSha204a/AtSha204aDriver.c -index 4a9a2aa3..c7df1301 100644 ---- a/Silicon/Atmel/AtSha204a/AtSha204aDriver.c -+++ b/Silicon/Atmel/AtSha204a/AtSha204aDriver.c -@@ -151,7 +151,7 @@ AtSha240aGetRNG ( - Status = AtSha204a->I2cIo->QueueRequest (AtSha204a->I2cIo, 1, NULL, - (VOID *)&Request, NULL); - DEBUG ((DEBUG_INFO, "%a: wake AtSha204a: I2cIo->QueueRequest() - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - - gBS->Stall (2500); // wait 2.5 ms for wake to complete - -@@ -164,7 +164,7 @@ AtSha240aGetRNG ( - continue; - } - DEBUG ((DEBUG_ERROR, "%a: I2C request transfer failed, Status == %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return EFI_DEVICE_ERROR; - } - -@@ -177,7 +177,7 @@ AtSha240aGetRNG ( - continue; - } - DEBUG ((DEBUG_ERROR, "%a: I2C response transfer failed, Status == %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return EFI_DEVICE_ERROR; - } - -@@ -188,7 +188,7 @@ AtSha240aGetRNG ( - if (++Retries <= MAX_RETRIES) { - continue; - } -- DEBUG ((DEBUG_WARN, "%a: incomplete packet received\n", __FUNCTION__)); -+ DEBUG ((DEBUG_WARN, "%a: incomplete packet received\n", __func__)); - return EFI_DEVICE_ERROR; - } - -diff --git a/Silicon/Broadcom/Bcm283x/Drivers/InterruptDxe/InterruptDxe.c b/Silicon/Broadcom/Bcm283x/Drivers/InterruptDxe/InterruptDxe.c -index a1fe1303..427be411 100644 ---- a/Silicon/Broadcom/Bcm283x/Drivers/InterruptDxe/InterruptDxe.c -+++ b/Silicon/Broadcom/Bcm283x/Drivers/InterruptDxe/InterruptDxe.c -@@ -290,7 +290,7 @@ CpuArchEventProtocolNotify ( - Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - ASSERT (FALSE); - return; - } -@@ -301,7 +301,7 @@ CpuArchEventProtocolNotify ( - Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, IrqInterruptHandler); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - ASSERT (FALSE); - return; - } -diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c -index 435ef493..321d546d 100644 ---- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c -+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c -@@ -129,7 +129,7 @@ GenetDriverBindingStart ( - Genet = AllocateZeroPool (sizeof (GENET_PRIVATE_DATA)); - if (Genet == NULL) { - DEBUG ((DEBUG_ERROR, -- "%a: Couldn't allocate private data\n", __FUNCTION__)); -+ "%a: Couldn't allocate private data\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -141,14 +141,14 @@ GenetDriverBindingStart ( - EFI_OPEN_PROTOCOL_BY_DRIVER); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, -- "%a: Couldn't open protocol: %r\n", __FUNCTION__, Status)); -+ "%a: Couldn't open protocol: %r\n", __func__, Status)); - goto FreeDevice; - } - - Status = GenetDmaAlloc (Genet); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, -- "%a: Couldn't allocate DMA buffers: %r\n", __FUNCTION__, Status)); -+ "%a: Couldn't allocate DMA buffers: %r\n", __func__, Status)); - goto FreeDevice; - } - -@@ -210,7 +210,7 @@ GenetDriverBindingStart ( - - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, -- "%a: Couldn't install protocol interfaces: %r\n", __FUNCTION__, Status)); -+ "%a: Couldn't install protocol interfaces: %r\n", __func__, Status)); - gBS->CloseProtocol (ControllerHandle, - &gBcmGenetPlatformDeviceProtocolGuid, - This->DriverBindingHandle, -@@ -224,7 +224,7 @@ GenetDriverBindingStart ( - FreeEvent: - gBS->CloseEvent (Genet->ExitBootServicesEvent); - FreeDevice: -- DEBUG ((DEBUG_WARN, "%a: Returning %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_WARN, "%a: Returning %r\n", __func__, Status)); - FreePool (Genet); - return Status; - } -@@ -457,7 +457,7 @@ GenetUnload ( - - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to disconnect all controllers - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - -diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenericPhy.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenericPhy.c -index 54f899ff..3f556bd3 100644 ---- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenericPhy.c -+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenericPhy.c -@@ -115,7 +115,7 @@ GenericPhyDetect ( - Phy->PhyAddr = PhyAddr; - DEBUG ((DEBUG_INFO, - "%a: PHY detected at address 0x%02X (PHYIDR1=0x%04X, PHYIDR2=0x%04X)\n", -- __FUNCTION__, PhyAddr, Id1, Id2)); -+ __func__, PhyAddr, Id1, Id2)); - return EFI_SUCCESS; - } - } -@@ -354,7 +354,7 @@ GenericPhyGetConfig ( - } - - DEBUG ((DEBUG_INFO, "%a: Link speed %d Mbps, %a-duplex\n", -- __FUNCTION__, *Speed, *Duplex == PHY_DUPLEX_FULL ? "full" : "half")); -+ __func__, *Speed, *Duplex == PHY_DUPLEX_FULL ? "full" : "half")); - - return EFI_SUCCESS; - } -@@ -387,7 +387,7 @@ GenericPhyUpdateConfig ( - - if (Phy->LinkUp != LinkUp) { - if (LinkUp) { -- DEBUG ((DEBUG_VERBOSE, "%a: Link is up\n", __FUNCTION__)); -+ DEBUG ((DEBUG_VERBOSE, "%a: Link is up\n", __func__)); - - Status = GenericPhyGetConfig (Phy, &Speed, &Duplex); - if (EFI_ERROR (Status)) { -@@ -396,7 +396,7 @@ GenericPhyUpdateConfig ( - - GenericPhyConfigure (Phy, Speed, Duplex); - } else { -- DEBUG ((DEBUG_VERBOSE, "%a: Link is down\n", __FUNCTION__)); -+ DEBUG ((DEBUG_VERBOSE, "%a: Link is down\n", __func__)); - } - } - -diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c -index 20f20fd2..a2f8c112 100644 ---- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c -+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c -@@ -108,7 +108,7 @@ GenetPhyRead ( - - if (Retry == 0) { - DEBUG ((DEBUG_ERROR, -- "%a: Timeout reading PhyAddr %d, Reg %d\n", __FUNCTION__, PhyAddr, Reg)); -+ "%a: Timeout reading PhyAddr %d, Reg %d\n", __func__, PhyAddr, Reg)); - return EFI_DEVICE_ERROR; - } - -@@ -157,7 +157,7 @@ GenetPhyWrite ( - - if (Retry == 0) { - DEBUG ((DEBUG_ERROR, -- "%a: Timeout writing PhyAddr %d, Reg %d\n", __FUNCTION__, PhyAddr, Reg)); -+ "%a: Timeout writing PhyAddr %d, Reg %d\n", __func__, PhyAddr, Reg)); - return EFI_DEVICE_ERROR; - } - -@@ -618,7 +618,7 @@ GenetDmaAlloc ( - &Genet->RxBuffer); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, -- "%a: Failed to allocate RX buffer: %r\n", __FUNCTION__, Status)); -+ "%a: Failed to allocate RX buffer: %r\n", __func__, Status)); - } - return Status; - } -@@ -653,7 +653,7 @@ GenetDmaMapRxDescriptor ( - &Genet->RxBufferMap[DescIndex].Mapping); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Failed to map RX buffer: %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - -diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c -index 84adf5e5..c65c003c 100644 ---- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c -+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c -@@ -578,7 +578,7 @@ GenetSimpleNetworkTransmit ( - - if (This == NULL || Buffer == NULL) { - DEBUG ((DEBUG_ERROR, "%a: Invalid parameter (missing handle or buffer)\n", -- __FUNCTION__)); -+ __func__)); - return EFI_INVALID_PARAMETER; - } - -@@ -603,13 +603,13 @@ GenetSimpleNetworkTransmit ( - // grub send failure messages. - // - Retries = 1000; -- DEBUG ((DEBUG_INFO, "%a: Waiting 10s for link\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Waiting 10s for link\n", __func__)); - do { - gBS->Stall (10000); - Status = GenericPhyUpdateConfig (&Genet->Phy); - } while (EFI_ERROR (Status) && Retries-- > 0); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: no link\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: no link\n", __func__)); - return EFI_NOT_READY; - } else { - Genet->SnpMode.MediaPresent = TRUE; -@@ -620,32 +620,32 @@ GenetSimpleNetworkTransmit ( - if (HeaderSize != Genet->SnpMode.MediaHeaderSize) { - DEBUG ((DEBUG_ERROR, - "%a: Invalid parameter (header size mismatch; HeaderSize 0x%X, SnpMode.MediaHeaderSize 0x%X))\n", -- __FUNCTION__, HeaderSize, Genet->SnpMode.MediaHeaderSize)); -+ __func__, HeaderSize, Genet->SnpMode.MediaHeaderSize)); - return EFI_INVALID_PARAMETER; - } - if (DestAddr == NULL || Protocol == NULL) { - DEBUG ((DEBUG_ERROR, - "%a: Invalid parameter (dest addr or protocol missing)\n", -- __FUNCTION__)); -+ __func__)); - return EFI_INVALID_PARAMETER; - } - } - - if (BufferSize < Genet->SnpMode.MediaHeaderSize) { -- DEBUG ((DEBUG_ERROR, "%a: Buffer too small\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Buffer too small\n", __func__)); - return EFI_BUFFER_TOO_SMALL; - } - - Status = EfiAcquireLockOrFail (&Genet->Lock); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Couldn't get lock: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: Couldn't get lock: %r\n", __func__, Status)); - return EFI_ACCESS_DENIED; - } - - if (Genet->TxQueued == GENET_DMA_DESC_COUNT - 1) { - EfiReleaseLock (&Genet->Lock); - -- DEBUG ((DEBUG_ERROR, "%a: Queue full\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Queue full\n", __func__)); - return EFI_NOT_READY; - } - -@@ -667,7 +667,7 @@ GenetSimpleNetworkTransmit ( - &DmaDeviceAddress, - &Genet->TxBufferMap[Desc]); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: DmaMap failed: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: DmaMap failed: %r\n", __func__, Status)); - EfiReleaseLock (&Genet->Lock); - return Status; - } -@@ -736,7 +736,7 @@ GenetSimpleNetworkReceive ( - - if (This == NULL || Buffer == NULL) { - DEBUG ((DEBUG_ERROR, "%a: Invalid parameter (missing handle or buffer)\n", -- __FUNCTION__)); -+ __func__)); - return EFI_INVALID_PARAMETER; - } - -@@ -750,7 +750,7 @@ GenetSimpleNetworkReceive ( - - Status = EfiAcquireLockOrFail (&Genet->Lock); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Couldn't get lock: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: Couldn't get lock: %r\n", __func__, Status)); - return EFI_ACCESS_DENIED; - } - -@@ -774,7 +774,7 @@ GenetSimpleNetworkReceive ( - if (*BufferSize < FrameLength) { - DEBUG ((DEBUG_ERROR, - "%a: Buffer size (0x%X) is too small for frame (0x%X)\n", -- __FUNCTION__, *BufferSize, FrameLength)); -+ __func__, *BufferSize, FrameLength)); - Status = EFI_BUFFER_TOO_SMALL; - goto out; - } -@@ -798,14 +798,14 @@ GenetSimpleNetworkReceive ( - Status = EFI_SUCCESS; - } else { - DEBUG ((DEBUG_ERROR, "%a: Short packet (FrameLength 0x%X)", -- __FUNCTION__, FrameLength)); -+ __func__, FrameLength)); - Status = EFI_NOT_READY; - } - - out: - Status = GenetDmaMapRxDescriptor (Genet, DescIndex); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to remap RX descriptor!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to remap RX descriptor!\n", __func__)); - } - - GenetRxComplete (Genet); -diff --git a/Silicon/Hisilicon/Drivers/AcpiPlatformDxe/UpdateDsdt.c b/Silicon/Hisilicon/Drivers/AcpiPlatformDxe/UpdateDsdt.c -index 1f2680c0..3d152d77 100644 ---- a/Silicon/Hisilicon/Drivers/AcpiPlatformDxe/UpdateDsdt.c -+++ b/Silicon/Hisilicon/Drivers/AcpiPlatformDxe/UpdateDsdt.c -@@ -76,14 +76,14 @@ GetEnvMac( - Status = gBS->LocateProtocol(&gHisiBoardNicProtocolGuid, NULL, (VOID **)&OemNic); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] LocateProtocol failed %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] LocateProtocol failed %r\n", __func__, __LINE__, Status)); - return Status; - } - - Status = OemNic->GetMac(&Mac, MacNextID); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] GetMac failed %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] GetMac failed %r\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -341,7 +341,7 @@ GetDeviceInfo ( - // Get NameString - Status = AcpiTableProtocol->GetOption (ChildHandle, 1, &DataType, &Buffer, &DataSize); - if (EFI_ERROR (Status)) { -- DEBUG ((EFI_D_ERROR, "[%a:%d] Get NameString failed: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a:%d] Get NameString failed: %r\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -361,7 +361,7 @@ GetDeviceInfo ( - *FoundDev = DsdtDeviceSas; - } else { - DEBUG ((DEBUG_ERROR, "[%a:%d] The NameString %a is not ETHn or SASn\n", -- __FUNCTION__, __LINE__, Data)); -+ __func__, __LINE__, Data)); - return EFI_INVALID_PARAMETER; - } - -@@ -433,7 +433,7 @@ EFI_STATUS ProcessDSDTDevice ( - Status = AcpiTableProtocol->GetOption(ValueHandle, 1, &DataType, &Buffer, &DataSize); - - Data = Buffer; -- DBG("[%a:%d] - _HID = %a\n", __FUNCTION__, __LINE__, Data); -+ DBG("[%a:%d] - _HID = %a\n", __func__, __LINE__, Data); - - if (EFI_ERROR(Status) || - DataType != EFI_ACPI_DATA_TYPE_STRING) { -@@ -572,10 +572,10 @@ static EFI_STATUS ProcessDSDT( - EFI_ACPI_HANDLE ChildHandle; - // - // Parse table for device type -- DBG ("[%a:%d] - TableHandle=%p\n", __FUNCTION__, __LINE__, TableHandle); -+ DBG ("[%a:%d] - TableHandle=%p\n", __func__, __LINE__, TableHandle); - for (ChildHandle = NULL; ; ) { - Status = AcpiTableProtocol->GetChild(TableHandle, &ChildHandle); -- DBG ("[%a:%d] - Child=%p, %r\n", __FUNCTION__, __LINE__, ChildHandle, Status); -+ DBG ("[%a:%d] - Child=%p, %r\n", __func__, __LINE__, ChildHandle, Status); - if (EFI_ERROR(Status)) - break; - if (ChildHandle == NULL) -diff --git a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c -index 5164672a..ac73bf64 100644 ---- a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c -+++ b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c -@@ -513,7 +513,7 @@ FvbRead ( - if (!Instance->Initialized && Instance->Initialize) - { - if (EfiAtRuntime ()) { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL] Initialize at runtime is not supported!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL] Initialize at runtime is not supported!\n", __func__, __LINE__)); - return EFI_UNSUPPORTED; - } - -@@ -531,7 +531,7 @@ FvbRead ( - (*NumBytes > BlockSize) || - ((Offset + *NumBytes) > BlockSize)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL] ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", __FUNCTION__, __LINE__, Offset, *NumBytes, BlockSize )); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL] ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", __func__, __LINE__, Offset, *NumBytes, BlockSize )); - return EFI_BAD_BUFFER_SIZE; - } - -@@ -640,7 +640,7 @@ FvbWrite ( - if (!Instance->Initialized && Instance->Initialize) - { - if (EfiAtRuntime ()) { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL] Initialize at runtime is not supported!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL] Initialize at runtime is not supported!\n", __func__, __LINE__)); - return EFI_UNSUPPORTED; - } - -@@ -1080,7 +1080,7 @@ FlashWriteBlocks ( - NumBlocks = ((UINT32)BufferSizeInBytes) / Instance->Media.BlockSize ; - if ((Lba + NumBlocks) > (Instance->Media.LastBlock + 1)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL]ERROR - Write will exceed last block.\n", __FUNCTION__, __LINE__ )); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL]ERROR - Write will exceed last block.\n", __func__, __LINE__ )); - return EFI_INVALID_PARAMETER; - } - -@@ -1185,7 +1185,7 @@ FlashFvbInitialize ( - Status = FlashPlatformGetDevices (&FlashDevices, &FlashDeviceCount); - if (EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Fail to get Flash devices\n", __FUNCTION__, __LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Fail to get Flash devices\n", __func__, __LINE__)); - return Status; - } - -@@ -1194,7 +1194,7 @@ FlashFvbInitialize ( - Status = gBS->LocateProtocol (&gHisiSpiFlashProtocolGuid, NULL, (VOID*) &mFlash); - if (EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Status=%r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Status=%r\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -1217,7 +1217,7 @@ FlashFvbInitialize ( - ); - if (EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Fail to create instance for Flash[%d]\n", __FUNCTION__, __LINE__, Index)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Fail to create instance for Flash[%d]\n", __func__, __LINE__, Index)); - } - } - // -diff --git a/Silicon/Hisilicon/Drivers/NorFlashDxe/NorFlashDxe.c b/Silicon/Hisilicon/Drivers/NorFlashDxe/NorFlashDxe.c -index 54d76ebf..303980dd 100644 ---- a/Silicon/Hisilicon/Drivers/NorFlashDxe/NorFlashDxe.c -+++ b/Silicon/Hisilicon/Drivers/NorFlashDxe/NorFlashDxe.c -@@ -64,17 +64,17 @@ EFIAPI Read( - - if (Offset + ulLen > (gFlashInfo[gIndex.InfIndex].SingleChipSize * gFlashInfo[gIndex.InfIndex].ParallelNum)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Exceed the flash scope!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Exceed the flash scope!\n", __func__,__LINE__)); - return EFI_INVALID_PARAMETER; - } - if (0 == ulLen) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Length is Zero!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Length is Zero!\n", __func__,__LINE__)); - return EFI_INVALID_PARAMETER; - } - if (NULL == Buffer) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Buffer is NULL!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Buffer is NULL!\n", __func__,__LINE__)); - return EFI_BAD_BUFFER_SIZE; - } - -@@ -151,7 +151,7 @@ static EFI_STATUS WriteAfterErase_Fill( - } - if ((Offset % FlashUnitLength + Length) > FlashUnitLength) - { -- DEBUG ((EFI_D_INFO, "[%a]:[%dL]:Exceed the Flash Size!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_INFO, "[%a]:[%dL]:Exceed the Flash Size!\n", __func__,__LINE__)); - return EFI_UNSUPPORTED; - } - -@@ -159,7 +159,7 @@ static EFI_STATUS WriteAfterErase_Fill( - Status = gBS->AllocatePool(EfiBootServicesData, FlashUnitLength, (VOID *)&NewDataUnit); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Allocate Pool failed, %r!\n", __FUNCTION__,__LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Allocate Pool failed, %r!\n", __func__,__LINE__, Status)); - return Status; - } - -@@ -177,7 +177,7 @@ static EFI_STATUS WriteAfterErase_Fill( - Status = BufferWrite(NewOffset, (void *)NewDataUnit, FlashUnitLength); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:BufferWrite %r!\n", __FUNCTION__,__LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:BufferWrite %r!\n", __func__,__LINE__, Status)); - return Status; - } - -@@ -205,7 +205,7 @@ static EFI_STATUS WriteAfterErase_Final( - - if (0 != (Offset % FlashUnitLength)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: Offset must be a multiple of 0x%x!\n", __FUNCTION__,__LINE__,FlashUnitLength)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: Offset must be a multiple of 0x%x!\n", __func__,__LINE__,FlashUnitLength)); - return EFI_UNSUPPORTED; - } - -@@ -216,7 +216,7 @@ static EFI_STATUS WriteAfterErase_Final( - Status = BufferWrite(Offset, (void *)Buffer, FlashUnitLength); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:BufferWrite Failed: %r!\n", __FUNCTION__,__LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:BufferWrite Failed: %r!\n", __func__,__LINE__, Status)); - return EFI_DEVICE_ERROR; - } - Offset += FlashUnitLength; -@@ -230,7 +230,7 @@ static EFI_STATUS WriteAfterErase_Final( - Status = WriteAfterErase_Fill(Offset, Buffer, Length); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:WriteAfterErase_Fill failed,%r!\n", __FUNCTION__,__LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:WriteAfterErase_Fill failed,%r!\n", __func__,__LINE__, Status)); - return Status; - } - } -@@ -270,7 +270,7 @@ WriteAfterErase( - Status = WriteAfterErase_Fill(Offset, Buffer, TempLength); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: %r!\n", __FUNCTION__,__LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: %r!\n", __func__,__LINE__, Status)); - return Status; - } - -@@ -291,7 +291,7 @@ WriteAfterErase( - Status = WriteAfterErase_Final(Offset, Buffer, Length); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: %r!\n", __FUNCTION__,__LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: %r!\n", __func__,__LINE__, Status)); - return Status; - } - -@@ -365,7 +365,7 @@ FlashSectorErase( - Status = WriteAfterErase(TempBase, TempOffset, Buffer, TempLength); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: %r!\n", __FUNCTION__,__LINE__,Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: %r!\n", __func__,__LINE__,Status)); - goto DO; - } - -@@ -394,7 +394,7 @@ EFIAPI Erase( - - if (Offset + Length > (gFlashInfo[gIndex.InfIndex].SingleChipSize * gFlashInfo[gIndex.InfIndex].ParallelNum)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Exceed the Flash Size!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Exceed the Flash Size!\n", __func__,__LINE__)); - return EFI_ABORTED; - } - if (0 == Length) -@@ -427,7 +427,7 @@ EFIAPI Erase( - Status = FlashSectorErase(TempBase, Offset, TempLength); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: FlashErase One Sector Error, Status = %r!\n", __FUNCTION__,__LINE__,Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]: FlashErase One Sector Error, Status = %r!\n", __func__,__LINE__,Status)); - return Status; - } - -@@ -462,7 +462,7 @@ EFIAPI Write( - - if((Offset + ulLength) > (gFlashInfo[gIndex.InfIndex].SingleChipSize * gFlashInfo[gIndex.InfIndex].ParallelNum)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Exceed the Flash Size!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Exceed the Flash Size!\n", __func__,__LINE__)); - return EFI_INVALID_PARAMETER; - } - if (0 == ulLength) -@@ -498,7 +498,7 @@ EFIAPI Write( - Status = FlashSectorErase(TempBase, Offset, TempLength); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:FlashErase One Sector Error, Status = %r!\n", __FUNCTION__,__LINE__,Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:FlashErase One Sector Error, Status = %r!\n", __func__,__LINE__,Status)); - return Status; - } - -@@ -506,7 +506,7 @@ EFIAPI Write( - Status = WriteAfterErase(TempBase, Offset, Buffer, TempLength); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:WriteAfterErase Status = %r!\n", __FUNCTION__,__LINE__,Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:WriteAfterErase Status = %r!\n", __func__,__LINE__,Status)); - return Status; - } - } -@@ -581,7 +581,7 @@ EFIAPI InitializeFlash ( - &gUniNorFlash); - if(EFI_SUCCESS != Status) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Install Protocol Interface %r!\n", __FUNCTION__,__LINE__,Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Install Protocol Interface %r!\n", __func__,__LINE__,Status)); - } - - return Status; -diff --git a/Silicon/Hisilicon/Drivers/NorFlashDxe/NorFlashHw.c b/Silicon/Hisilicon/Drivers/NorFlashDxe/NorFlashHw.c -index 599c9a14..de1e16a0 100644 ---- a/Silicon/Hisilicon/Drivers/NorFlashDxe/NorFlashHw.c -+++ b/Silicon/Hisilicon/Drivers/NorFlashDxe/NorFlashHw.c -@@ -39,7 +39,7 @@ UINT32 PortReadData ( - return MmioRead16 (FlashAddr); - - default: -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:illegal PortWidth!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:illegal PortWidth!\n", __func__,__LINE__)); - return 0xffffffff; - } - } -@@ -61,7 +61,7 @@ PortWriteData ( - MmioWrite16 (FlashAddr, InputData); - break; - default: -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:illegal PortWidth!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:illegal PortWidth!\n", __func__,__LINE__)); - return EFI_DEVICE_ERROR; - } - return EFI_SUCCESS; -@@ -107,7 +107,7 @@ EFI_STATUS GetCommandIndex( - - if(Flag) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Can not Get Reset Command!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Can not Get Reset Command!\n", __func__,__LINE__)); - return EFI_DEVICE_ERROR; - } - -@@ -124,7 +124,7 @@ EFI_STATUS GetCommandIndex( - - if(Flag) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Can not Get ID Command!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Can not Get ID Command!\n", __func__,__LINE__)); - return EFI_DEVICE_ERROR; - } - -@@ -141,7 +141,7 @@ EFI_STATUS GetCommandIndex( - - if(Flag) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Can not Get Write Command!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Can not Get Write Command!\n", __func__,__LINE__)); - return EFI_DEVICE_ERROR; - } - -@@ -158,7 +158,7 @@ EFI_STATUS GetCommandIndex( - - if(Flag) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Can not Get Erase Command!\n", __FUNCTION__,__LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Can not Get Erase Command!\n", __func__,__LINE__)); - return EFI_DEVICE_ERROR; - } - -@@ -214,7 +214,7 @@ EFI_STATUS FlashInit(UINT32 Base) - Status = GetCommandIndex(i); - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Get Command Index %r!\n", __FUNCTION__,__LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL]:Get Command Index %r!\n", __func__,__LINE__, Status)); - return Status; - } - -@@ -310,7 +310,7 @@ EFI_STATUS BufferWriteCommand(UINTN Base, UINTN Offset, void *pData) - - if(gFlashBusy) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL]:Flash is busy!\n", __FUNCTION__,__LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL]:Flash is busy!\n", __func__,__LINE__)); - return EFI_NOT_READY; - } - gFlashBusy = TRUE; -@@ -392,7 +392,7 @@ EFI_STATUS SectorEraseCommand(UINTN Base, UINTN Offset) - - if(gFlashBusy) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL]:Flash is busy!\n", __FUNCTION__,__LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL]:Flash is busy!\n", __func__,__LINE__)); - return EFI_NOT_READY; - } - -@@ -434,7 +434,7 @@ EFI_STATUS CompleteCheck(UINT32 Base, UINT32 Offset, void *pData, UINT32 Length) - - if(gFlashBusy) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL]:Flash is busy!\n", __FUNCTION__,__LINE__)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL]:Flash is busy!\n", __func__,__LINE__)); - return EFI_NOT_READY; - } - gFlashBusy = TRUE; -diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c -index 85c35790..2220dc5e 100644 ---- a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c -+++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c -@@ -87,7 +87,7 @@ SasPlatformInitialize ( - FreePool (PrivateData); - DEBUG ((DEBUG_ERROR, - "[%a]:[%dL] InstallProtocolInterface fail. %r\n", -- __FUNCTION__, -+ __func__, - __LINE__, - Status)); - continue; -diff --git a/Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.c b/Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.c -index 5927f66d..24cdf84e 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.c -@@ -52,7 +52,7 @@ UpdateSmbiosType9Info ( - (VOID **)&PciIo - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __func__, __LINE__, Status)); - continue; - } - (VOID)PciIo->GetLocation (PciIo, &SegmentNumber, &BusNumber, &DeviceNumber, &FunctionNumber); -@@ -94,7 +94,7 @@ EmptySmbiosType9 ( - Status = Smbios->Remove (Smbios, SmbiosHandle); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Remove System Slot Failed. Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - break; - } - } -@@ -204,7 +204,7 @@ AddSmbiosType9Entry ( - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] LocateProtocol Failed. Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return Status; - } - -diff --git a/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.c b/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.c -index 9c66eed3..05543048 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.c -@@ -330,7 +330,7 @@ SmbiosAddType16Table ( - Status = mSmbios->Add (mSmbios, NULL, MemArraySmbiosHandle, (EFI_SMBIOS_TABLE_HEADER *)Type16Record); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type16 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type16 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(Type16Record); -@@ -381,7 +381,7 @@ SmbiosAddType19Table ( - Status = mSmbios->Add (mSmbios, NULL, &MemArrayMappedAddrSmbiosHandle, (EFI_SMBIOS_TABLE_HEADER *)Type19Record); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type19 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type19 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(Type19Record); -@@ -642,7 +642,7 @@ SmbiosAddType17Table ( - Status = mSmbios->Add (mSmbios, NULL, &MemDevSmbiosHandle, (EFI_SMBIOS_TABLE_HEADER*) Type17Record); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type17 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type17 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool (Type17Record); -diff --git a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c -index 275b4f0e..7c2ed226 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c -@@ -628,7 +628,7 @@ AddSmbiosProcessorTypeTable ( - Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle, (EFI_SMBIOS_TABLE_HEADER *)Type4Record); - if (EFI_ERROR (Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type04 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type04 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - FreePool (Type4Record); - -diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c -index 9bdc13c9..54ea2d98 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c -@@ -66,7 +66,7 @@ GetBiosReleaseDate ( - - Hob = GetFirstGuidHob (&gVersionInfoHobGuid); - if (Hob == NULL) { -- DEBUG ((EFI_D_ERROR, "[%a:%d] Version info HOB not found!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a:%d] Version info HOB not found!\n", __func__, __LINE__)); - return NULL; - } - -@@ -91,7 +91,7 @@ GetBiosVersion ( - - Hob = GetFirstGuidHob (&gVersionInfoHobGuid); - if (Hob == NULL) { -- DEBUG ((EFI_D_ERROR, "[%a:%d] Version info HOB not found!\n", __FUNCTION__, __LINE__)); -+ DEBUG ((EFI_D_ERROR, "[%a:%d] Version info HOB not found!\n", __func__, __LINE__)); - return NULL; - } - Version = GET_GUID_HOB_DATA (Hob); -@@ -225,7 +225,7 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscBiosVendor) - Status = LogSmbiosData( (UINT8*)SmbiosRecord, &SmbiosHandle); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type00 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type00 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(SmbiosRecord); -diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerFunction.c -index 32bdcf1b..ace5b19c 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerFunction.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type01/MiscSystemManufacturerFunction.c -@@ -154,7 +154,7 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscSystemManufacturer) - Status = LogSmbiosData( (UINT8*)SmbiosRecord, &SmbiosHandle); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type01 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type01 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(SmbiosRecord); -diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerFunction.c -index 278f97dd..dfcaaf31 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerFunction.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type02/MiscBaseBoardManufacturerFunction.c -@@ -158,7 +158,7 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscBaseBoardManufacturer) - Status = LogSmbiosData( (UINT8*)SmbiosRecord, &SmbiosHandle); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type02 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type02 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(SmbiosRecord); -diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c -index 27ad983a..fc214124 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c -@@ -163,7 +163,7 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscChassisManufacturer) - Status = LogSmbiosData( (UINT8*)SmbiosRecord, &SmbiosHandle); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type03 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type03 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(SmbiosRecord); -diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c -index 3ca0c18a..124df409 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c -@@ -73,7 +73,7 @@ UpdateSlotUsage( - Status = OemGetSerdesParam (&SerdesParamA, &SerdesParamB, 0); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] OemGetSerdesParam failed %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] OemGetSerdesParam failed %r\n", __func__, __LINE__, Status)); - return; - } - -@@ -181,7 +181,7 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscSystemSlotDesignation) - Status = LogSmbiosData( (UINT8*)SmbiosRecord, &SmbiosHandle); - if(EFI_ERROR(Status)) - { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type09 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type09 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(SmbiosRecord); -diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c -index 2acbdea7..0856e24f 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type13/MiscNumberOfInstallableLanguagesFunction.c -@@ -149,7 +149,7 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscNumberOfInstallableLanguages) - // - Status = LogSmbiosData((UINT8*)SmbiosRecord, &SmbiosHandle); - if(EFI_ERROR(Status)) { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type13 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type13 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(SmbiosRecord); -diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunction.c -index 22de8b57..4bc2a620 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunction.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type32/MiscBootInformationFunction.c -@@ -60,7 +60,7 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscBootInformation) - // - Status = LogSmbiosData( (UINT8*)SmbiosRecord, &SmbiosHandle); - if(EFI_ERROR(Status)) { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type32 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type32 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(SmbiosRecord); -diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type38/MiscIpmiDeviceInformationFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type38/MiscIpmiDeviceInformationFunction.c -index 6e8efc02..fa2f224f 100644 ---- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type38/MiscIpmiDeviceInformationFunction.c -+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type38/MiscIpmiDeviceInformationFunction.c -@@ -73,7 +73,7 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscIpmiDeviceInformation) - // - Status = LogSmbiosData((UINT8*)SmbiosRecord, &SmbiosHandle); - if(EFI_ERROR(Status)) { -- DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type38 Table Log Failed! %r \n", __FUNCTION__, __LINE__, Status)); -+ DEBUG((EFI_D_ERROR, "[%a]:[%dL] Smbios Type38 Table Log Failed! %r \n", __func__, __LINE__, Status)); - } - - FreePool(SmbiosRecord); -diff --git a/Silicon/Hisilicon/Drivers/UpdateFdtDxe/UpdateFdtDxe.c b/Silicon/Hisilicon/Drivers/UpdateFdtDxe/UpdateFdtDxe.c -index 4473a325..47d08b08 100644 ---- a/Silicon/Hisilicon/Drivers/UpdateFdtDxe/UpdateFdtDxe.c -+++ b/Silicon/Hisilicon/Drivers/UpdateFdtDxe/UpdateFdtDxe.c -@@ -117,7 +117,7 @@ EFIAPI UpdateFdt ( - Status = EFIFdtUpdate(NewFdtBlobBase); - if (EFI_ERROR (Status)) - { -- DEBUG((EFI_D_ERROR, "%a(%d):EFIFdtUpdate Fail!\n", __FUNCTION__,__LINE__)); -+ DEBUG((EFI_D_ERROR, "%a(%d):EFIFdtUpdate Fail!\n", __func__,__LINE__)); - goto EXIT; - } - -diff --git a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c -index f9940869..517764d6 100644 ---- a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c -+++ b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c -@@ -48,7 +48,7 @@ IoInitDxeEntry ( - - if (EFI_ERROR(Status)) - { -- DEBUG ((EFI_D_ERROR, "[%a:%d] - CreateEvent failed: %r\n", __FUNCTION__, -+ DEBUG ((EFI_D_ERROR, "[%a:%d] - CreateEvent failed: %r\n", __func__, - __LINE__, Status)); - } - -diff --git a/Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c b/Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c -index 350f9611..ca305b1c 100644 ---- a/Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c -+++ b/Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c -@@ -55,7 +55,7 @@ GetAppetureByRootBridgeIo ( - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a:%d] RootBridgeIo->Configuration failed %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - return NULL; - }; - -@@ -67,7 +67,7 @@ GetAppetureByRootBridgeIo ( - } - - if (Configuration->Desc != ACPI_ADDRESS_SPACE_DESCRIPTOR) { -- DEBUG ((DEBUG_ERROR, "[%a:%d] Can't find bus descriptor\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a:%d] Can't find bus descriptor\n", __func__, __LINE__)); - return NULL; - } - -@@ -81,7 +81,7 @@ GetAppetureByRootBridgeIo ( - } - } - -- DEBUG ((DEBUG_ERROR, "[%a:%d] Can't find PCI appeture\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a:%d] Can't find PCI appeture\n", __func__, __LINE__)); - return NULL; - } - -@@ -109,7 +109,7 @@ SetAtuConfig0RW ( - { - UINTN i; - for (i=0; i<0x20; i+=4) { -- DEBUG ((DEBUG_ERROR, "[%a:%d] - Base=%p value=%x\n", __FUNCTION__, __LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i))); -+ DEBUG ((DEBUG_ERROR, "[%a:%d] - Base=%p value=%x\n", __func__, __LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i))); - } - } - } -@@ -138,7 +138,7 @@ SetAtuConfig1RW ( - { - UINTN i; - for (i=0; i<0x20; i+=4) { -- DEBUG ((DEBUG_ERROR, "[%a:%d] - Base=%p value=%x\n", __FUNCTION__, __LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i))); -+ DEBUG ((DEBUG_ERROR, "[%a:%d] - Base=%p value=%x\n", __func__, __LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i))); - } - } - } -@@ -162,7 +162,7 @@ SetAtuIoRW (UINT64 RbPciBase,UINT64 IoBase,UINT64 CpuIoRegionLimit, UINT64 CpuIo - { - UINTN i; - for (i=0; i<0x20; i+=4) { -- DEBUG ((DEBUG_ERROR, "[%a:%d] - Base=%p value=%x\n", __FUNCTION__, __LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i))); -+ DEBUG ((DEBUG_ERROR, "[%a:%d] - Base=%p value=%x\n", __func__, __LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i))); - } - } - } -@@ -186,7 +186,7 @@ SetAtuMemRW(UINT64 RbPciBase,UINT64 MemBase,UINT64 CpuMemRegionLimit, UINT64 Cpu - { - UINTN i; - for (i=0; i<0x20; i+=4) { -- DEBUG ((DEBUG_ERROR, "[%a:%d] - Base=%p value=%x\n", __FUNCTION__, __LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i))); -+ DEBUG ((DEBUG_ERROR, "[%a:%d] - Base=%p value=%x\n", __func__, __LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i))); - } - } - } -@@ -296,7 +296,7 @@ EnlargeAtuConfig0 ( - (VOID **)&ResAlloc - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "[%a:%d] - HandleProtocol failed %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "[%a:%d] - HandleProtocol failed %r\n", __func__, - __LINE__, Status)); - return; - } -@@ -315,7 +315,7 @@ EnlargeAtuConfig0 ( - (VOID **)&RootBridgeIo - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "[%a:%d] - HandleProtocol failed %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_ERROR, "[%a:%d] - HandleProtocol failed %r\n", __func__, __LINE__, Status)); - // This should never happen so that it is a fatal error and we don't try - // to continue - break; -@@ -323,7 +323,7 @@ EnlargeAtuConfig0 ( - - Appeture = GetAppetureByRootBridgeIo (RootBridgeIo); - if (Appeture == NULL) { -- DEBUG ((DEBUG_ERROR, "[%a:%d] Get appeture failed\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "[%a:%d] Get appeture failed\n", __func__, - __LINE__)); - continue; - } -diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c -index 33444660..69ba0c43 100644 ---- a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c -+++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c -@@ -48,7 +48,7 @@ ApeiEntryPoint ( - if (EFI_ERROR (Status)) { - SetupData.EnRasSupport = 1; - DEBUG ((DEBUG_ERROR, "[%a]GetVariable %r.Get default variable value\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - if (!SetupData.EnRasSupport) { - return EFI_ABORTED; -@@ -89,7 +89,7 @@ ApeiEntryPoint ( - Status |= OemInitErstTable (); - Status |= OemInitEinjTable (); - // smc call -- DEBUG ((DEBUG_INFO, "[%a]:[%dL]: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_INFO, "[%a]:[%dL]: %r\n", __func__, __LINE__, Status)); - if (Status == EFI_SUCCESS) { - SmcRegs.Arg0 = PRIVATE_ARM_SMC_ID_APEI; - SmcRegs.Arg1 = (UINTN)mApeiTrustedfirmwareData; -diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c -index 5a2d6f03..1b079c2a 100644 ---- a/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c -+++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c -@@ -63,7 +63,7 @@ ErrorBlockAddErrorData ( - ) - { - if (ErrorBlock == NULL || GenericErrorData == NULL) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL]Invalid Param \n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL]Invalid Param \n", __func__, __LINE__)); - return FALSE; - } - EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE* Entry; -@@ -75,7 +75,7 @@ ErrorBlockAddErrorData ( - SizeOfGenericErrorData; - if (sizeof (EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE) + ExpectedNewDataLength > - MaxBlockLength) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL]Out of BlockSize \n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL]Out of BlockSize \n", __func__, __LINE__)); - return FALSE; - } - // guid -diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/Hest.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/Hest.c -index 923d8bf0..08213ace 100644 ---- a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/Hest.c -+++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/Hest.c -@@ -31,7 +31,7 @@ EFI_STATUS HestAddErrorSourceDescriptor ( - } - HestHeader = Context->HestHeader; - if (HestHeader->Header.Length + SizeOfDescriptor > Context->OccupiedMemorySize) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: Hest Size Too small\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: Hest Size Too small\n", __func__, __LINE__)); - return EFI_BUFFER_TOO_SMALL; - } - Descriptor = (UINT8*)HestHeader + HestHeader->Header.Length; -@@ -58,7 +58,7 @@ HestSetAcpiTable ( - UINTN TableKey; - UINT32 Index; - if (Context == NULL) { -- DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: ERROR\n", __FUNCTION__, __LINE__)); -+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: ERROR\n", __func__, __LINE__)); - return; - } - -@@ -83,7 +83,7 @@ HestSetAcpiTable ( - mApeiTrustedfirmwareData->HestTableAddress = (EFI_PHYSICAL_ADDRESS)Table; - DEBUG ((DEBUG_INFO, "Acpi HestSetAcpiTable Table = 0x%x.\n", (EFI_PHYSICAL_ADDRESS)Table)); - } -- DEBUG ((DEBUG_INFO, "[%a]:[%dL]:OUT %llx, IN %llx \n", __FUNCTION__, __LINE__, -+ DEBUG ((DEBUG_INFO, "[%a]:[%dL]:OUT %llx, IN %llx \n", __func__, __LINE__, - AcpiTableHandle, Context->HestHeader)); - return; - } -diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c -index 8bdacbae..1316794f 100644 ---- a/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c -+++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c -@@ -228,7 +228,7 @@ OemInitBertTable ( - } - ErrorBlockInitial (Context.Block, EFI_ACPI_6_2_ERROR_SEVERITY_NONE); - BertSetAcpiTable (&Context); -- DEBUG ((DEBUG_INFO, "[%a]:[%dL]: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_INFO, "[%a]:[%dL]: %r\n", __func__, __LINE__, Status)); - return EFI_SUCCESS; - } - /************************************************ -@@ -261,7 +261,7 @@ OemInitEinjTable ( - (VOID)EinjConfigErrorInjectCapability (&Context, 0xFFF);// TBD - (VOID)OemEinjConfigExecuteOperationEntry (&Context); - EinjSetAcpiTable (&Context); -- DEBUG ((DEBUG_INFO, "[%a]:[%dL]: %d\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((DEBUG_INFO, "[%a]:[%dL]: %d\n", __func__, __LINE__, Status)); - return EFI_SUCCESS; - } - /************************************************ -diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c -index e9bdcf2f..4efebc17 100644 ---- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c -+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c -@@ -205,7 +205,7 @@ OemConfigUiLibConstructor ( - NULL - ); - if (mOemConfigPrivate.HiiHandle == NULL) { -- DEBUG ((DEBUG_ERROR, "%a Fail to Add Oem Hii Package.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a Fail to Add Oem Hii Package.\n", __func__)); - return EFI_INVALID_PARAMETER; - } - // -diff --git a/Silicon/Hisilicon/Hi1620/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.c -index a3d40839..6cf844f7 100644 ---- a/Silicon/Hisilicon/Hi1620/Pptt/Pptt.c -+++ b/Silicon/Hisilicon/Hi1620/Pptt/Pptt.c -@@ -366,7 +366,7 @@ GetApic ( - // Avoid dead loop due to corrupted MADT - if (Ptr->Length == 0) { - DEBUG ((DEBUG_ERROR, "[%a:%d] - Invalid MADT sub structure at 0x%x\n", -- __FUNCTION__, __LINE__, (UINTN) Ptr - (UINTN) ApicTable)); -+ __func__, __LINE__, (UINTN) Ptr - (UINTN) ApicTable)); - break; - } - -diff --git a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibMem.c b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibMem.c -index 9c11784a..202d09c4 100644 ---- a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibMem.c -+++ b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibMem.c -@@ -81,7 +81,7 @@ ArmPlatformGetVirtualMemoryMap ( - VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0; - - ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); -- DEBUG((EFI_D_INFO, "[%a]:[%dL] discriptor count=%d\n", __FUNCTION__, __LINE__, Index+1)); -+ DEBUG((EFI_D_INFO, "[%a]:[%dL] discriptor count=%d\n", __func__, __LINE__, Index+1)); - - *VirtualMemoryMap = VirtualMemoryTable; - } -diff --git a/Silicon/Hisilicon/Library/CpldIoLib/CpldIoLibRuntime.c b/Silicon/Hisilicon/Library/CpldIoLib/CpldIoLibRuntime.c -index 5f20debd..0c6e4d10 100644 ---- a/Silicon/Hisilicon/Library/CpldIoLib/CpldIoLibRuntime.c -+++ b/Silicon/Hisilicon/Library/CpldIoLib/CpldIoLibRuntime.c -@@ -45,13 +45,13 @@ CpldRuntimeLibConstructor ( - mCpldRegAddr = PcdGet64(PcdCpldBaseAddress); - Status = gDS->GetMemorySpaceDescriptor(mCpldRegAddr,&desp); - if(EFI_ERROR(Status)){ -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL] GetMemorySpaceDescriptor failed: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL] GetMemorySpaceDescriptor failed: %r\n", __func__, __LINE__, Status)); - return Status; - } - desp.Attributes |= EFI_MEMORY_RUNTIME; - Status = gDS->SetMemorySpaceAttributes(mCpldRegAddr,0x10000, desp.Attributes); - if(EFI_ERROR(Status)){ -- DEBUG ((EFI_D_ERROR, "[%a]:[%dL] SetMemorySpaceAttributes failed: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a]:[%dL] SetMemorySpaceAttributes failed: %r\n", __func__, __LINE__, Status)); - return Status; - } - // -diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.c b/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.c -index 237fe5e0..eb10e013 100644 ---- a/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.c -+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.c -@@ -69,12 +69,12 @@ I2cLibRuntimeSetup (UINT32 Socket, UINT8 Port) - EFI_MEMORY_UC | EFI_MEMORY_RUNTIME - ); - if (EFI_ERROR (Status)) { -- DEBUG ((EFI_D_WARN, "[%a:%d] AddMemorySpace failed: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((EFI_D_WARN, "[%a:%d] AddMemorySpace failed: %r\n", __func__, __LINE__, Status)); - } - - Status = gDS->SetMemorySpaceAttributes (Base, SIZE_64KB, EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); - if (EFI_ERROR (Status)) { -- DEBUG ((EFI_D_ERROR, "[%a:%d] SetMemorySpaceAttributes failed: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a:%d] SetMemorySpaceAttributes failed: %r\n", __func__, __LINE__, Status)); - return Status; - } - -@@ -92,7 +92,7 @@ I2cLibRuntimeSetup (UINT32 Socket, UINT8 Port) - &mI2cLibVirtualAddrChangeEvent - ); - if (EFI_ERROR (Status)) { -- DEBUG ((EFI_D_ERROR, "[%a:%d] Create event failed: %r\n", __FUNCTION__, __LINE__, Status)); -+ DEBUG ((EFI_D_ERROR, "[%a:%d] Create event failed: %r\n", __func__, __LINE__, Status)); - return Status; - } - } -diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c -index 3a2cd451..1971c33e 100644 ---- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c -+++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c -@@ -108,25 +108,25 @@ InitializeM41T83 ( - Status = RtcRead (M41T83_REGADDR_SECONDS, 1, &Second.Uint8); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - } - Second.Bits.ST= 1; - Status = RtcWrite (M41T83_REGADDR_SECONDS, 1, &Second.Uint8); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - goto Exit; - } - Status = RtcRead (M41T83_REGADDR_SECONDS, 1, &Second.Uint8); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - } - Second.Bits.ST= 0; - Status = RtcWrite (M41T83_REGADDR_SECONDS, 1, &Second.Uint8); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - goto Exit; - } - -@@ -134,13 +134,13 @@ InitializeM41T83 ( - Status = RtcRead (M41T83_REGADDR_ALARM1HOUR, 1, &Alarm1Hour.Uint8); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - } - Alarm1Hour.Bits.HT = 0; - Status = RtcWrite (M41T83_REGADDR_ALARM1HOUR, 1, &Alarm1Hour.Uint8); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - goto Exit; - } - -@@ -181,7 +181,7 @@ LibSetTime ( - if (!IsTimeValid (Time)) { - if (!EfiAtRuntime ()) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - DEBUG ((DEBUG_ERROR, "Now RTC Time is : %04d-%02d-%02d %02d:%02d:%02d\n", - Time->Year, Time->Month, Time->Day, Time->Hour, Time->Minute, Time->Second - )); -@@ -252,7 +252,7 @@ Exit: - if (!EfiAtRuntime ()) { - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", -- __FUNCTION__, LineNum, Status)); -+ __func__, LineNum, Status)); - } - EfiReleaseLock (&mRtcLock); - } -@@ -342,10 +342,10 @@ Exit: - if (!EfiAtRuntime ()) { - if (EFI_ERROR (Status)) { - if (IsTimeInvalid == TRUE) { -- DEBUG((DEBUG_ERROR, "%a(%d) Time invalid.\r\n",__FUNCTION__, LineNum)); -+ DEBUG((DEBUG_ERROR, "%a(%d) Time invalid.\r\n",__func__, LineNum)); - } else { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", -- __FUNCTION__, LineNum, Status)); -+ __func__, LineNum, Status)); - } - } - EfiReleaseLock (&mRtcLock); -@@ -429,7 +429,7 @@ LibRtcInitialize ( - Status = InitializeM41T83 (); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\nRTC M41T83 Init Failed !!!\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - /* - * Returning ERROR on failure of RTC initilization will cause the system to hang up. - * So we add some debug message to indecate the RTC initilization failed, -@@ -450,7 +450,7 @@ LibRtcInitialize ( - Status = LibSetTime (&EfiTime); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] RTC settime Status : %r\n", -- __FUNCTION__, __LINE__, Status)); -+ __func__, __LINE__, Status)); - } - } - -diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c -index f2e8bbdf..acca2582 100644 ---- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c -+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c -@@ -193,7 +193,7 @@ FilterAndProcess ( - // - // This is not an error, just an informative condition. - // -- DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid, -+ DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __func__, ProtocolGuid, - Status)); - return; - } -@@ -254,7 +254,7 @@ IsPciDisplay ( - Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */, - sizeof Pci / sizeof (UINT32), &Pci); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status)); -+ DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __func__, ReportText, Status)); - return FALSE; - } - -@@ -283,7 +283,7 @@ Connect ( - FALSE // Recursive - ); - DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n", -- __FUNCTION__, ReportText, Status)); -+ __func__, ReportText, Status)); - } - - -@@ -305,25 +305,25 @@ AddOutput ( - DevicePath = DevicePathFromHandle (Handle); - if (DevicePath == NULL) { - DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n", -- __FUNCTION__, ReportText, Handle)); -+ __func__, ReportText, Handle)); - return; - } - - Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __func__, - ReportText, Status)); - return; - } - - Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __func__, - ReportText, Status)); - return; - } - -- DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__, -+ DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __func__, - ReportText)); - } - -@@ -657,7 +657,7 @@ PlatformBootManagerAfterConsole ( - if (SetupData.BmcWdtEnable) { - Status = IpmiCmdStopWatchdogTimer (EfiBiosPost); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a:%r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a:%r\n", __func__, Status)); - } - } - } -diff --git a/Silicon/Hisilicon/Library/RtcHelperLib/RtcHelperLib.c b/Silicon/Hisilicon/Library/RtcHelperLib/RtcHelperLib.c -index 811885f5..bfcbfb2b 100644 ---- a/Silicon/Hisilicon/Library/RtcHelperLib/RtcHelperLib.c -+++ b/Silicon/Hisilicon/Library/RtcHelperLib/RtcHelperLib.c -@@ -34,7 +34,7 @@ SwitchRtcI2cChannelAndLock ( - if (Count == 99) { - if (!EfiAtRuntime ()) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail!\n", -- __FUNCTION__, __LINE__)); -+ __func__, __LINE__)); - } - return EFI_DEVICE_ERROR; - } -@@ -55,7 +55,7 @@ SwitchRtcI2cChannelAndLock ( - if (Count == 99) { - if (!EfiAtRuntime ()) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", -- __FUNCTION__, __LINE__)); -+ __func__, __LINE__)); - } - return EFI_DEVICE_ERROR; - } -diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c -index 5d759148..cdc4d13c 100644 ---- a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c -+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c -@@ -121,7 +121,7 @@ FvbInitialize ( - Status = GetVariableFlashNvStorageInfo (&BaseAddress, &NvStorageFvSize); - if (EFI_ERROR (Status)) { - ASSERT_EFI_ERROR (Status); -- DEBUG ((DEBUG_ERROR, "[%a] - An error ocurred getting variable info - %r.\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "[%a] - An error ocurred getting variable info - %r.\n", __func__, Status)); - return; - } - -@@ -129,7 +129,7 @@ FvbInitialize ( - Status = SafeUint64ToUint32 (BaseAddress, &mPlatformFvBaseAddress[0].FvBase); - if (EFI_ERROR (Status)) { - ASSERT_EFI_ERROR (Status); -- DEBUG ((DEBUG_ERROR, "[%a] - 64-bit variable storage base address not supported.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "[%a] - 64-bit variable storage base address not supported.\n", __func__)); - return; - } - NvStorageBaseAddress = mPlatformFvBaseAddress[0].FvBase; -@@ -137,7 +137,7 @@ FvbInitialize ( - Status = SafeUint64ToUint32 (NvStorageFvSize, &mPlatformFvBaseAddress[0].FvSize); - if (EFI_ERROR (Status)) { - ASSERT_EFI_ERROR (Status); -- DEBUG ((DEBUG_ERROR, "[%a] - 64-bit variable storage size not supported.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "[%a] - 64-bit variable storage size not supported.\n", __func__)); - return; - } - NvStorageFvSize = mPlatformFvBaseAddress[0].FvSize; -diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.c b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.c -index 7f4a3f8f..6001fe0f 100644 ---- a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.c -+++ b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodePei.c -@@ -160,7 +160,7 @@ ShadowMicrocodePatchWorker ( - DEBUG (( - DEBUG_INFO, - "%a: Required microcode patches have been loaded at 0x%lx, with size 0x%lx.\n", -- __FUNCTION__, *Buffer, *BufferSize -+ __func__, *Buffer, *BufferSize - )); - - return; -@@ -354,7 +354,7 @@ ShadowMicrocode ( - DEBUG (( - DEBUG_INFO, - "%a: 0x%x microcode patches will be loaded into memory, with size 0x%x.\n", -- __FUNCTION__, PatchCount, TotalLoadSize -+ __func__, PatchCount, TotalLoadSize - )); - - ShadowMicrocodePatchWorker (PatchInfoBuffer, PatchCount, TotalLoadSize, BufferSize, Buffer); -diff --git a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c -index 9a334d8e..f710a610 100644 ---- a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c -+++ b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLib.c -@@ -62,7 +62,7 @@ LoadCpuConfigLibPreMemConfigDefault ( - DEBUG (( - DEBUG_ERROR, - "Error: [%a]:[%dL] MCHBAR configured to >4GB\n", -- __FUNCTION__, -+ __func__, - __LINE__ - )); - } -diff --git a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/memory_options.h b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/memory_options.h -index b96d0690..6bcc9d29 100644 ---- a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/memory_options.h -+++ b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/memory_options.h -@@ -68,9 +68,9 @@ uint8_t mgetch(void); - #define D_TRN 0x0020 - #define D_TIME 0x0040 - --#define ENTERFN() DPF(D_FCALL, "<%s>\n", __FUNCTION__) --#define LEAVEFN() DPF(D_FCALL, "\n", __FUNCTION__) --#define REPORTFN() DPF(D_FCALL, "<%s/>\n", __FUNCTION__) -+#define ENTERFN() DPF(D_FCALL, "<%s>\n", __func__) -+#define LEAVEFN() DPF(D_FCALL, "\n", __func__) -+#define REPORTFN() DPF(D_FCALL, "<%s/>\n", __func__) - - extern uint32_t DpfPrintMask; - -diff --git a/Silicon/Intel/SimicsIch10Pkg/SmmControl/RuntimeDxe/SmmControl2Dxe.c b/Silicon/Intel/SimicsIch10Pkg/SmmControl/RuntimeDxe/SmmControl2Dxe.c -index cc2d00b7..0db663d0 100644 ---- a/Silicon/Intel/SimicsIch10Pkg/SmmControl/RuntimeDxe/SmmControl2Dxe.c -+++ b/Silicon/Intel/SimicsIch10Pkg/SmmControl/RuntimeDxe/SmmControl2Dxe.c -@@ -245,7 +245,7 @@ SmmControl2DxeEntryPoint ( - SmiEnableVal = IoRead32 (mSmiEnable); - if ((SmiEnableVal & ICH10_SMI_EN_APMC_EN) != 0) { - DEBUG ((EFI_D_ERROR, "%a: this X58 implementation lacks SMI\n", -- __FUNCTION__)); -+ __func__)); - } - - // -@@ -268,7 +268,7 @@ SmmControl2DxeEntryPoint ( - IoWrite32 (mSmiEnable, SmiEnableVal & ~(UINT32)ICH10_SMI_EN_GBL_SMI_EN); - if (IoRead32 (mSmiEnable) != SmiEnableVal) { - DEBUG ((EFI_D_ERROR, "%a: failed to lock down GBL_SMI_EN\n", -- __FUNCTION__)); -+ __func__)); - goto FatalError; - } - -@@ -283,14 +283,14 @@ SmmControl2DxeEntryPoint ( - OnS3SaveStateInstalled, NULL /* Context */, - &mS3SaveStateInstalled); - if (EFI_ERROR (Status)) { -- DEBUG ((EFI_D_ERROR, "%a: CreateEvent: %r\n", __FUNCTION__, Status)); -+ DEBUG ((EFI_D_ERROR, "%a: CreateEvent: %r\n", __func__, Status)); - goto FatalError; - } - - Status = gBS->RegisterProtocolNotify (&gEfiS3SaveStateProtocolGuid, - mS3SaveStateInstalled, &Registration); - if (EFI_ERROR (Status)) { -- DEBUG ((EFI_D_ERROR, "%a: RegisterProtocolNotify: %r\n", __FUNCTION__, -+ DEBUG ((EFI_D_ERROR, "%a: RegisterProtocolNotify: %r\n", __func__, - Status)); - goto ReleaseEvent; - } -@@ -300,7 +300,7 @@ SmmControl2DxeEntryPoint ( - // - Status = gBS->SignalEvent (mS3SaveStateInstalled); - if (EFI_ERROR (Status)) { -- DEBUG ((EFI_D_ERROR, "%a: SignalEvent: %r\n", __FUNCTION__, Status)); -+ DEBUG ((EFI_D_ERROR, "%a: SignalEvent: %r\n", __func__, Status)); - goto ReleaseEvent; - } - -@@ -313,7 +313,7 @@ SmmControl2DxeEntryPoint ( - NULL); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "%a: InstallMultipleProtocolInterfaces: %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - goto ReleaseEvent; - } - -@@ -378,7 +378,7 @@ OnS3SaveStateInstalled ( - ); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "%a: EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE: %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - ASSERT (FALSE); - CpuDeadLoop (); - } -@@ -395,13 +395,13 @@ OnS3SaveStateInstalled ( - ); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, -- "%a: EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE: %r\n", __FUNCTION__, -+ "%a: EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE: %r\n", __func__, - Status)); - ASSERT (FALSE); - CpuDeadLoop (); - } - -- DEBUG ((EFI_D_VERBOSE, "%a: boot script fragment saved\n", __FUNCTION__)); -+ DEBUG ((EFI_D_VERBOSE, "%a: boot script fragment saved\n", __func__)); - gBS->CloseEvent (Event); - mS3SaveStateInstalled = NULL; - } -diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmiLib.c b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmiLib.c -index 972e5145..04b29871 100644 ---- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmiLib.c -+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmiLib.c -@@ -100,7 +100,7 @@ PchDmiSetLpcMemRange ( - ) - { - if (IsPchDmiLocked ()) { -- DEBUG ((DEBUG_ERROR, "%a Error. DMI is locked.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a Error. DMI is locked.\n", __func__)); - ASSERT (FALSE); - return EFI_UNSUPPORTED; - } -@@ -130,7 +130,7 @@ PchDmiSetEspiCs1MemRange ( - ) - { - if (IsPchDmiLocked ()) { -- DEBUG ((DEBUG_ERROR, "%a Error. DMI is locked.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a Error. DMI is locked.\n", __func__)); - ASSERT (FALSE); - return EFI_UNSUPPORTED; - } -diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c -index 490af6be..d0554cb2 100644 ---- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c -+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c -@@ -890,7 +890,7 @@ SpiProtocolFlashReadSfdp ( - UINT32 FlashAddress; - - if (SpiIsSafModeActive ()) { -- DEBUG ((DEBUG_ERROR, "Unallowed call to %a while SAF Mode is active.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "Unallowed call to %a while SAF Mode is active.\n", __func__)); - return EFI_UNSUPPORTED; - } - -@@ -949,7 +949,7 @@ SpiProtocolFlashReadJedecId ( - UINT32 Address; - - if (SpiIsSafModeActive ()) { -- DEBUG ((DEBUG_ERROR, "Unallowed call to %a while SAF Mode is active.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "Unallowed call to %a while SAF Mode is active.\n", __func__)); - return EFI_UNSUPPORTED; - } - -@@ -1003,7 +1003,7 @@ SpiProtocolFlashWriteStatus ( - EFI_STATUS Status; - - if (SpiIsSafModeActive ()) { -- DEBUG ((DEBUG_ERROR, "Unallowed call to %a while SAF Mode is active.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "Unallowed call to %a while SAF Mode is active.\n", __func__)); - return EFI_UNSUPPORTED; - } - -@@ -1044,7 +1044,7 @@ SpiProtocolFlashReadStatus ( - EFI_STATUS Status; - - if (SpiIsSafModeActive ()) { -- DEBUG ((DEBUG_ERROR, "Unallowed call to %a while SAF Mode is active.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "Unallowed call to %a while SAF Mode is active.\n", __func__)); - return EFI_UNSUPPORTED; - } - -diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PchCycleDecodingLib.c b/Silicon/Intel/TigerlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PchCycleDecodingLib.c -index 0927cd1c..d802df55 100644 ---- a/Silicon/Intel/TigerlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PchCycleDecodingLib.c -+++ b/Silicon/Intel/TigerlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PchCycleDecodingLib.c -@@ -147,7 +147,7 @@ LpcEspiMemRangeSetHelper ( - UINT32 MemRangeAddr; - - if (((Address & (~B_LPC_CFG_LGMR_MA)) != 0) || (SlaveId >= SlaveId_Max)) { -- DEBUG ((DEBUG_ERROR, "%a Error. Invalid Address: %x or invalid SlaveId\n", __FUNCTION__, Address)); -+ DEBUG ((DEBUG_ERROR, "%a Error. Invalid Address: %x or invalid SlaveId\n", __func__, Address)); - ASSERT (FALSE); - return EFI_INVALID_PARAMETER; - } -@@ -266,7 +266,7 @@ LpcEspiMemRangeGetHelper ( - UINT32 GenMemReg; - - if ((Address == NULL) || (SlaveId >= SlaveId_Max)) { -- DEBUG ((DEBUG_ERROR, "%a Error. Invalid pointer or SlaveId.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a Error. Invalid pointer or SlaveId.\n", __func__)); - ASSERT (FALSE); - return EFI_INVALID_PARAMETER; - } -diff --git a/Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccessLib/PlatformFlashAccessLib.c b/Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccessLib/PlatformFlashAccessLib.c -index 0529d7d9..e1fb8836 100644 ---- a/Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccessLib/PlatformFlashAccessLib.c -+++ b/Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccessLib/PlatformFlashAccessLib.c -@@ -63,7 +63,7 @@ SpiFlashProbe ( - - Status = SpiFlashProtocol->Init (SpiFlashProtocol, SpiFlash); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot initialize flash device\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot initialize flash device\n", __func__)); - return Status; - } - -@@ -87,7 +87,7 @@ CheckImageHeader ( - if (Header->Magic != MAIN_HDR_MAGIC) { - DEBUG ((DEBUG_ERROR, - "%a: Bad Image magic 0x%08x != 0x%08x\n", -- __FUNCTION__, -+ __func__, - Header->Magic, - MAIN_HDR_MAGIC)); - return EFI_VOLUME_CORRUPTED; -@@ -100,7 +100,7 @@ CheckImageHeader ( - if (Checksum != ChecksumBackup) { - DEBUG ((DEBUG_ERROR, - "%a: Bad Image checksum. 0x%x != 0x%x\n", -- __FUNCTION__, -+ __func__, - Checksum, - ChecksumBackup)); - return EFI_VOLUME_CORRUPTED; -@@ -164,7 +164,7 @@ PerformFlashWriteWithProgress ( - if (FlashAddressType != FlashAddressTypeAbsoluteAddress) { - DEBUG ((DEBUG_ERROR, - "%a: only FlashAddressTypeAbsoluteAddress supported\n", -- __FUNCTION__)); -+ __func__)); - - return EFI_INVALID_PARAMETER; - } -@@ -172,7 +172,7 @@ PerformFlashWriteWithProgress ( - if (FirmwareType != PlatformFirmwareTypeSystemFirmware) { - DEBUG ((DEBUG_ERROR, - "%a: only PlatformFirmwareTypeSystemFirmware supported\n", -- __FUNCTION__)); -+ __func__)); - - return EFI_INVALID_PARAMETER; - } -@@ -184,7 +184,7 @@ PerformFlashWriteWithProgress ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot locate SpiFlash protocol\n", -- __FUNCTION__)); -+ __func__)); - return Status; - } - -@@ -194,7 +194,7 @@ PerformFlashWriteWithProgress ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot locate SpiMaster protocol\n", -- __FUNCTION__)); -+ __func__)); - return Status; - } - -@@ -226,7 +226,7 @@ PerformFlashWriteWithProgress ( - PcdGet32 (PcdSpiFlashCs), - PcdGet32 (PcdSpiFlashMode)); - if (SpiFlash == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate SPI device!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate SPI device!\n", __func__)); - Status = EFI_DEVICE_ERROR; - goto HeaderError; - } -@@ -235,7 +235,7 @@ PerformFlashWriteWithProgress ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Error while performing SPI flash probe\n", -- __FUNCTION__)); -+ __func__)); - goto FlashProbeError; - } - -@@ -257,13 +257,13 @@ PerformFlashWriteWithProgress ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Error while performing flash update\n", -- __FUNCTION__)); -+ __func__)); - goto FlashProbeError; - } - - DEBUG ((DEBUG_ERROR, - "%a: Update %d bytes at offset 0x%x succeeded!\n", -- __FUNCTION__, -+ __func__, - Length, - FlashAddress)); - -diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.c -index ad52062d..201a020a 100644 ---- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.c -+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.c -@@ -91,7 +91,7 @@ PciHostBridgeGetRootBridges ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot locate BoardDesc protocol\n", -- __FUNCTION__)); -+ __func__)); - return NULL; - } - -@@ -104,7 +104,7 @@ PciHostBridgeGetRootBridges ( - } else if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot get Pcie board desc from BoardDesc protocol\n", -- __FUNCTION__)); -+ __func__)); - return NULL; - } - -@@ -112,7 +112,7 @@ PciHostBridgeGetRootBridges ( - PciRootBridges = AllocateZeroPool (BoardPcieDescription->PcieControllerCount * - sizeof (PCI_ROOT_BRIDGE)); - if (PciRootBridges == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Fail to allocate resources\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Fail to allocate resources\n", __func__)); - return NULL; - } - -diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.c -index 87e57aea..74295a96 100644 ---- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.c -+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLibConstructor.c -@@ -91,12 +91,12 @@ WaitForLink ( - UINT32 Timeout; - - if (!(MmioRead32 (PcieDbiAddress + PCIE_PM_STATUS) & PCIE_PM_LTSSM_STAT_MASK)) { -- DEBUG ((DEBUG_INIT, "%a: no PCIE device detected\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INIT, "%a: no PCIE device detected\n", __func__)); - return; - } - - /* Wait for the link to establish itself. */ -- DEBUG ((DEBUG_INIT, "%a: waiting for PCIE link\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INIT, "%a: waiting for PCIE link\n", __func__)); - - Mask = PCIE_GLOBAL_STATUS_RDLH_LINK_UP | PCIE_GLOBAL_STATUS_PHY_LINK_UP; - Timeout = PCIE_LINK_UP_TIMEOUT_US / 10; -@@ -134,7 +134,7 @@ ResetPcieSlot ( - /* Get GPIO protocol. */ - Status = MvGpioGetProtocol (PcieResetGpio->ControllerType, &GpioProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __func__)); - return Status; - } - -@@ -197,7 +197,7 @@ Armada7k8kPciHostBridgeLibConstructor ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot locate BoardDesc protocol\n", -- __FUNCTION__)); -+ __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -210,7 +210,7 @@ Armada7k8kPciHostBridgeLibConstructor ( - } else if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot get Pcie board desc from BoardDesc protocol\n", -- __FUNCTION__)); -+ __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -226,7 +226,7 @@ Armada7k8kPciHostBridgeLibConstructor ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot reset Pcie Slot\n", -- __FUNCTION__)); -+ __func__)); - return EFI_DEVICE_ERROR; - } - } -diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c -index 91070c8b..1ab176a0 100644 ---- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c -+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c -@@ -47,7 +47,7 @@ ArmadaSoCAp8xxBaseGet ( - ) - { - if (ApIndex != ARMADA7K8K_AP806_INDEX) { -- DEBUG ((DEBUG_ERROR, "%a: Only one AP806 in A7K/A8K SoC\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Only one AP806 in A7K/A8K SoC\n", __func__)); - return EFI_INVALID_PARAMETER; - } - -@@ -70,7 +70,7 @@ ArmadaSoCDescComPhyGet ( - - Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_COMPHY_DESC)); - if (Desc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -115,7 +115,7 @@ ArmadaSoCGpioGet ( - *Count = CpCount * MV_SOC_GPIO_PER_CP_COUNT + MV_SOC_AP806_COUNT; - GpioInstance = AllocateZeroPool (*Count * sizeof (GPIO_CONTROLLER)); - if (GpioInstance == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -154,7 +154,7 @@ ArmadaSoCDescI2cGet ( - *DescCount = CpCount * MV_SOC_I2C_PER_CP_COUNT + MV_SOC_I2C_PER_AP_COUNT; - Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_I2C_DESC)); - if (Desc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -205,7 +205,7 @@ ArmadaSoCDescIcuGet ( - *IcuDesc = AllocateCopyPool (sizeof (mA7k8kIcuDescTemplate), - &mA7k8kIcuDescTemplate); - if (*IcuDesc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -226,7 +226,7 @@ ArmadaSoCDescMdioGet ( - - Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_MDIO_DESC)); - if (Desc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -255,7 +255,7 @@ ArmadaSoCDescAhciGet ( - - Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_AHCI_DESC)); - if (Desc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -300,7 +300,7 @@ ArmadaSoCPcieGet ( - *Count = CpCount * MV_SOC_PCIE_PER_CP_COUNT; - BaseAddress = AllocateZeroPool (*Count * sizeof (EFI_PHYSICAL_ADDRESS)); - if (BaseAddress == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -330,7 +330,7 @@ ArmadaSoCDescPp2Get ( - - Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_PP2_DESC)); - if (Desc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -360,7 +360,7 @@ ArmadaSoCDescSdMmcGet ( - *Count = CpCount * MV_SOC_SDMMC_PER_CP_COUNT + MV_SOC_AP806_COUNT; - SdMmc = AllocateZeroPool (*Count * sizeof (MV_SOC_SDMMC_DESC)); - if (SdMmc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -398,7 +398,7 @@ ArmadaSoCDescUtmiGet ( - *DescCount = CpCount * MV_SOC_UTMI_PER_CP_COUNT; - Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_UTMI_DESC)); - if (Desc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -435,7 +435,7 @@ ArmadaSoCDescXhciGet ( - *DescCount = CpCount * MV_SOC_XHCI_PER_CP_COUNT; - Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_XHCI_DESC)); - if (Desc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c -index cad4d3a4..05951cfe 100644 ---- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c -+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c -@@ -45,21 +45,21 @@ MvBoardDescComPhyGet ( - - /* Check if PCD with ComPhy is correctly defined */ - if (ComPhyDeviceTableSize > ComPhyCount) { -- DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __func__)); - return EFI_INVALID_PARAMETER; - } - - /* Allocate and fill board description */ - BoardDesc = AllocateZeroPool (ComPhyDeviceTableSize * sizeof (MV_BOARD_COMPHY_DESC)); - if (BoardDesc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - - ComPhyIndex = 0; - for (Index = 0; Index < ComPhyDeviceTableSize; Index++) { - if (!ComPhyDeviceEnabled[Index]) { -- DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__, Index)); -+ DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __func__, Index)); - continue; - } - -@@ -107,7 +107,7 @@ MvBoardGpioDescriptionGet ( - /* Allocate and fill board description. */ - mGpioDescription = AllocateZeroPool (sizeof (MV_BOARD_GPIO_DESCRIPTION)); - if (mGpioDescription == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -157,21 +157,21 @@ MvBoardDescI2cGet ( - if (I2cDeviceEnabledSize > I2cCount) { - DEBUG ((DEBUG_ERROR, - "%a: Wrong PcdI2cControllersEnabled format\n", -- __FUNCTION__)); -+ __func__)); - return EFI_INVALID_PARAMETER; - } - - /* Allocate and fill board description */ - BoardDesc = AllocateZeroPool (I2cDeviceEnabledSize * sizeof (MV_BOARD_I2C_DESC)); - if (BoardDesc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - - I2cIndex = 0; - for (Index = 0; Index < I2cDeviceEnabledSize; Index++) { - if (!I2cDeviceEnabled[Index]) { -- DEBUG ((DEBUG_INFO, "%a: Skip I2c controller %d\n", __FUNCTION__, Index)); -+ DEBUG ((DEBUG_INFO, "%a: Skip I2c controller %d\n", __func__, Index)); - continue; - } - -@@ -207,7 +207,7 @@ MvBoardDescMdioGet ( - /* Allocate and fill board description */ - BoardDesc = AllocateZeroPool (MdioCount * sizeof (MV_BOARD_MDIO_DESC)); - if (BoardDesc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -255,21 +255,21 @@ MvBoardDescAhciGet ( - - /* Check if PCD with AHCI controllers is correctly defined */ - if (AhciDeviceTableSize > AhciCount) { -- DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEAhci format\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEAhci format\n", __func__)); - return EFI_INVALID_PARAMETER; - } - - /* Allocate and fill board description */ - BoardDesc = AllocateZeroPool (AhciDeviceTableSize * sizeof (MV_BOARD_AHCI_DESC)); - if (BoardDesc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - - AhciIndex = 0; - for (Index = 0; Index < AhciDeviceTableSize; Index++) { - if (!AhciDeviceEnabled[Index]) { -- DEBUG ((DEBUG_INFO, "%a: Skip Ahci controller %d\n", __FUNCTION__, Index)); -+ DEBUG ((DEBUG_INFO, "%a: Skip Ahci controller %d\n", __func__, Index)); - continue; - } - -@@ -307,7 +307,7 @@ MvBoardDescSdMmcGet ( - /* Get per-board configuration of the controllers */ - Status = ArmadaBoardDescSdMmcGet (&SdMmcDevCount, &BoardDesc); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: ArmadaBoardDescSdMmcGet filed\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: ArmadaBoardDescSdMmcGet filed\n", __func__)); - return Status; - } - -@@ -327,21 +327,21 @@ MvBoardDescSdMmcGet ( - /* Check if PCD with SDMMC controllers is correctly defined */ - if ((SdMmcDeviceTableSize > SdMmcCount) || - (SdMmcDeviceTableSize < SdMmcDevCount)) { -- DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __func__)); - return EFI_INVALID_PARAMETER; - } - - SdMmcIndex = 0; - for (Index = 0; Index < SdMmcDeviceTableSize; Index++) { - if (!SdMmcDeviceEnabled[Index]) { -- DEBUG ((DEBUG_INFO, "%a: Skip SdMmc controller %d\n", __FUNCTION__, Index)); -+ DEBUG ((DEBUG_INFO, "%a: Skip SdMmc controller %d\n", __func__, Index)); - continue; - } - - if (SdMmcIndex >= SdMmcDevCount) { - DEBUG ((DEBUG_ERROR, - "%a: More enabled devices than returned by ArmadaBoardDescSdMmcGet\n", -- __FUNCTION__)); -+ __func__)); - return EFI_INVALID_PARAMETER; - } - BoardDesc[SdMmcIndex].SoC = &SoCDesc[Index]; -@@ -389,21 +389,21 @@ MvBoardDescXhciGet ( - - /* Check if PCD with XHCI controllers is correctly defined */ - if (XhciDeviceTableSize > XhciCount) { -- DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEXhci format\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEXhci format\n", __func__)); - return EFI_INVALID_PARAMETER; - } - - /* Allocate and fill board description */ - BoardDesc = AllocateZeroPool (XhciDeviceTableSize * sizeof (MV_BOARD_XHCI_DESC)); - if (BoardDesc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - - XhciIndex = 0; - for (Index = 0; Index < XhciDeviceTableSize; Index++) { - if (!XhciDeviceEnabled[Index]) { -- DEBUG ((DEBUG_INFO, "%a: Skip Xhci controller %d\n", __FUNCTION__, Index)); -+ DEBUG ((DEBUG_INFO, "%a: Skip Xhci controller %d\n", __func__, Index)); - continue; - } - -@@ -465,7 +465,7 @@ MvBoardPcieDescriptionGet ( - - /* Sanity check of the board description. */ - if (BoardPcieControllerCount > SoCPcieControllerCount) { -- DEBUG ((DEBUG_ERROR, "%a: Too many controllers described\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Too many controllers described\n", __func__)); - return EFI_INVALID_PARAMETER; - } - -@@ -480,7 +480,7 @@ MvBoardPcieDescriptionGet ( - if (SoCIndex == SoCPcieControllerCount) { - DEBUG ((DEBUG_ERROR, - "%a: Controller #%d base address invalid: 0x%x\n", -- __FUNCTION__, -+ __func__, - BoardIndex, - PcieControllers[BoardIndex].PcieDbiAddress)); - return EFI_INVALID_PARAMETER; -@@ -490,7 +490,7 @@ MvBoardPcieDescriptionGet ( - /* Allocate and fill board description. */ - mPcieDescription = AllocateZeroPool (sizeof (MV_BOARD_PCIE_DESCRIPTION)); - if (mPcieDescription == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -536,14 +536,14 @@ MvBoardDescPp2Get ( - - /* Check if PCD with PP2 NICs is correctly defined */ - if (Pp2DeviceTableSize > Pp2Count) { -- DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPp2Controllers format\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPp2Controllers format\n", __func__)); - return EFI_INVALID_PARAMETER; - } - - /* Allocate and fill board description */ - BoardDesc = AllocateZeroPool (Pp2DeviceTableSize * sizeof (MV_BOARD_PP2_DESC)); - if (BoardDesc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -597,7 +597,7 @@ MvBoardDescUtmiGet ( - /* Make sure XHCI controllers table is present */ - XhciDeviceEnabled = PcdGetPtr (PcdPciEXhci); - if (XhciDeviceEnabled == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Missing PcdPciEXhci\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Missing PcdPciEXhci\n", __func__)); - return EFI_INVALID_PARAMETER; - } - -@@ -608,7 +608,7 @@ MvBoardDescUtmiGet ( - (UtmiDeviceTableSize > PcdGetSize (PcdPciEXhci))) { - DEBUG ((DEBUG_ERROR, - "%a: Wrong PcdUtmiControllersEnabled format\n", -- __FUNCTION__)); -+ __func__)); - return EFI_INVALID_PARAMETER; - } - -@@ -616,14 +616,14 @@ MvBoardDescUtmiGet ( - UtmiPortType = PcdGetPtr (PcdUtmiPortType); - if ((UtmiPortType == NULL) || - (PcdGetSize (PcdUtmiPortType) != UtmiDeviceTableSize)) { -- DEBUG ((DEBUG_ERROR, "%a: Wrong PcdUtmiPortType format\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdUtmiPortType format\n", __func__)); - return EFI_INVALID_PARAMETER; - } - - /* Allocate and fill board description */ - BoardDesc = AllocateZeroPool (UtmiDeviceTableSize * sizeof (MV_BOARD_UTMI_DESC)); - if (BoardDesc == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -638,7 +638,7 @@ MvBoardDescUtmiGet ( - DEBUG ((DEBUG_ERROR, - "%a: Disabled Xhci controller %d\n", - Index, -- __FUNCTION__)); -+ __func__)); - return EFI_INVALID_PARAMETER; - } - -diff --git a/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c -index 4cf44075..9e394a63 100644 ---- a/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c -+++ b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c -@@ -63,7 +63,7 @@ MvGpioValidate ( - if (ControllerIndex >= mGpioInstance->GpioDeviceCount) { - DEBUG ((DEBUG_ERROR, - "%a: Invalid GPIO ControllerIndex: %d\n", -- __FUNCTION__, -+ __func__, - ControllerIndex)); - return EFI_INVALID_PARAMETER; - } -@@ -71,7 +71,7 @@ MvGpioValidate ( - if (GpioPin >= mGpioInstance->SoCGpio[ControllerIndex].InternalGpioCount) { - DEBUG ((DEBUG_ERROR, - "%a: GPIO pin #%d not available in Controller#%d\n", -- __FUNCTION__, -+ __func__, - GpioPin, - ControllerIndex)); - return EFI_INVALID_PARAMETER; -@@ -306,7 +306,7 @@ MvGpioEntryPoint ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot locate BoardDesc protocol\n", -- __FUNCTION__)); -+ __func__)); - goto ErrLocateBoardDesc; - } - -@@ -315,7 +315,7 @@ MvGpioEntryPoint ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot get GPIO board desc from BoardDesc protocol\n", -- __FUNCTION__)); -+ __func__)); - goto ErrLocateBoardDesc; - } - -diff --git a/Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.c b/Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.c -index 1bf3bcdc..3d6b8978 100644 ---- a/Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.c -+++ b/Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.c -@@ -83,7 +83,7 @@ MvPca95xxValidate ( - if (ControllerIndex >= mPca95xxInstance->GpioExpanderCount) { - DEBUG ((DEBUG_ERROR, - "%a: Invalid GPIO ControllerIndex: %d\n", -- __FUNCTION__, -+ __func__, - ControllerIndex)); - return EFI_INVALID_PARAMETER; - } -@@ -93,7 +93,7 @@ MvPca95xxValidate ( - if (GpioPin >= mPca95xxPinCount[ControllerId]) { - DEBUG ((DEBUG_ERROR, - "%a: GPIO pin #%d not available in Controller#%d\n", -- __FUNCTION__, -+ __func__, - GpioPin, - ControllerIndex)); - return EFI_INVALID_PARAMETER; -@@ -125,7 +125,7 @@ MvPca95xxGetI2c ( - &HandleCount, - &HandleBuffer); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to locate handles\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to locate handles\n", __func__)); - return Status; - } - -@@ -138,7 +138,7 @@ MvPca95xxGetI2c ( - NULL, - EFI_OPEN_PROTOCOL_GET_PROTOCOL); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to open protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to open protocol\n", __func__)); - gBS->FreePool (HandleBuffer); - return Status; - } -@@ -187,7 +187,7 @@ MvPca95xxI2cTransfer ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: transmission error: 0x%d\n", -- __FUNCTION__, -+ __func__, - Status)); - } - -@@ -233,7 +233,7 @@ MvPca95xxSetOutputValue ( - - Status = MvPca95xxGetI2c (ControllerIndex, &I2cIo); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to get I2C protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to get I2C protocol\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -241,7 +241,7 @@ MvPca95xxSetOutputValue ( - - Status = MvPca95xxReadRegs (I2cIo, PCA95XX_OUTPUT_REG + Bank, &RegVal); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -253,7 +253,7 @@ MvPca95xxSetOutputValue ( - - Status = MvPca95xxWriteRegs (I2cIo, PCA95XX_OUTPUT_REG + Bank, RegVal); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to write device register\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to write device register\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -275,7 +275,7 @@ MvPca95xxSetDirection ( - - Status = MvPca95xxGetI2c (ControllerIndex, &I2cIo); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to get I2C protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to get I2C protocol\n", __func__)); - return Status; - } - -@@ -283,7 +283,7 @@ MvPca95xxSetDirection ( - - Status = MvPca95xxReadRegs (I2cIo, PCA95XX_DIRECTION_REG + Bank, &RegVal); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __func__)); - return Status; - } - -@@ -295,7 +295,7 @@ MvPca95xxSetDirection ( - - Status = MvPca95xxWriteRegs (I2cIo, PCA95XX_DIRECTION_REG + Bank, RegVal); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to write device register\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to write device register\n", __func__)); - return Status; - } - -@@ -319,7 +319,7 @@ MvPca95xxReadMode ( - - Status = MvPca95xxGetI2c (ControllerIndex, &I2cIo); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to get I2C protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to get I2C protocol\n", __func__)); - return Status; - } - -@@ -327,7 +327,7 @@ MvPca95xxReadMode ( - - Status = MvPca95xxReadRegs (I2cIo, PCA95XX_DIRECTION_REG + Bank, &RegVal); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __func__)); - return Status; - } - -@@ -336,7 +336,7 @@ MvPca95xxReadMode ( - } else { - Status = MvPca95xxReadRegs (I2cIo, PCA95XX_INPUT_REG + Bank, &RegVal); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __func__)); - return Status; - } - -@@ -389,7 +389,7 @@ MvPca95xxGetMode ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: fail to get pin %d of controller#%d mode\n", -- __FUNCTION__, -+ __func__, - GpioPin, - ControllerIndex)); - } -@@ -436,7 +436,7 @@ MvPca95xxGet ( - - Status = MvPca95xxGetI2c (ControllerIndex, &I2cIo); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to get I2C protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to get I2C protocol\n", __func__)); - return Status; - } - -@@ -444,7 +444,7 @@ MvPca95xxGet ( - - Status = MvPca95xxReadRegs (I2cIo, PCA95XX_INPUT_REG + Bank, &RegVal); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to read device register\n", __func__)); - return Status; - } - -@@ -497,7 +497,7 @@ MvPca95xxSet ( - case GPIO_MODE_OUTPUT_1: - Status = MvPca95xxSetOutputValue (ControllerIndex, GpioPin, Mode); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to set ouput value\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to set ouput value\n", __func__)); - return Status; - } - -@@ -505,7 +505,7 @@ MvPca95xxSet ( - case GPIO_MODE_INPUT: - Status = MvPca95xxSetDirection (ControllerIndex, GpioPin, Mode); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: fail to set direction\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: fail to set direction\n", __func__)); - return Status; - } - break; -@@ -576,7 +576,7 @@ MvPca95xxEntryPoint ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot locate BoardDesc protocol\n", -- __FUNCTION__)); -+ __func__)); - return Status; - } - -@@ -585,7 +585,7 @@ MvPca95xxEntryPoint ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Cannot get GPIO board desc from BoardDesc protocol\n", -- __FUNCTION__)); -+ __func__)); - return Status; - } else if (GpioDescription->GpioExpanders == NULL) { - /* Silently exit, if the board does not support the controllers */ -@@ -597,7 +597,7 @@ MvPca95xxEntryPoint ( - if (Pca95xxDevicePath == NULL) { - DEBUG ((DEBUG_ERROR, - "%a: Fail to allocate Pca95xxDevicePath\n", -- __FUNCTION__)); -+ __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -605,7 +605,7 @@ MvPca95xxEntryPoint ( - if (mPca95xxInstance == NULL) { - DEBUG ((DEBUG_ERROR, - "%a: Fail to allocate mPca95xxInstance\n", -- __FUNCTION__)); -+ __func__)); - Status = EFI_OUT_OF_RESOURCES; - goto ErrPca95xxInstanceAlloc; - } -diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c -index a8ff722a..ad472c61 100755 ---- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c -+++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c -@@ -174,7 +174,7 @@ OnEndOfDxe ( - Status = gBS->ConnectController (DeviceHandle, NULL, NULL, TRUE); - DEBUG ((DEBUG_INFO, - "%a: ConnectController () returned %r\n", -- __FUNCTION__, -+ __func__, - Status)); - - DevicePath->Instance++; -diff --git a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c -index 6e4a7158..7800b54f 100644 ---- a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c -+++ b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c -@@ -245,12 +245,12 @@ MvPhyConfigureAutonegotiation ( - - DEBUG ((DEBUG_INFO, - "%a: Waiting for PHY auto negotiation...", -- __FUNCTION__)); -+ __func__)); - - /* Wait for autonegotiation to complete and read media status */ - for (Index = 0; !(Data & BMSR_ANEGCOMPLETE); Index++) { - if (Index > PHY_AUTONEGOTIATE_TIMEOUT) { -- DEBUG ((DEBUG_ERROR, "%a: Timeout\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Timeout\n", __func__)); - PhyDevice->LinkUp = FALSE; - return EFI_TIMEOUT; - } -@@ -259,16 +259,16 @@ MvPhyConfigureAutonegotiation ( - } - - PhyDevice->LinkUp = TRUE; -- DEBUG ((DEBUG_INFO, "%a: link up\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: link up\n", __func__)); - } else { - Mdio->Read (Mdio, PhyDevice->Addr, PhyDevice->MdioIndex, MII_BMSR, &Data); - - if (Data & BMSR_LSTATUS) { - PhyDevice->LinkUp = TRUE; -- DEBUG ((DEBUG_INFO, "%a: link up\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: link up\n", __func__)); - } else { - PhyDevice->LinkUp = FALSE; -- DEBUG ((DEBUG_INFO, "%a: link down\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: link down\n", __func__)); - } - } - -@@ -420,7 +420,7 @@ MvPhyInit ( - if (PhyId >= MV_PHY_DEVICE_ID_MAX) { - DEBUG ((DEBUG_ERROR, - "%a, Incorrect PHY ID (0x%x) for PHY#%d\n", -- __FUNCTION__, -+ __func__, - PhyId, - PhyIndex)); - return EFI_INVALID_PARAMETER; -diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c -index 5e463ac9..53e12942 100644 ---- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c -+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c -@@ -1438,7 +1438,7 @@ Pp2AipGetInformation ( - AdapterInfo->MediaState = EFI_NOT_READY; - return EFI_SUCCESS; - } else if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a Failed to get media status\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a Failed to get media status\n", __func__)); - return EFI_DEVICE_ERROR; - } - -diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c -index afd650b3..42465058 100644 ---- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c -+++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c -@@ -378,7 +378,7 @@ InitializeXenonDxe ( - - mSdMmcOverride = AllocateZeroPool (sizeof (EDKII_SD_MMC_OVERRIDE)); - if (mSdMmcOverride == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -393,7 +393,7 @@ InitializeXenonDxe ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Filed to install SdMmcOverride protocol\n", -- __FUNCTION__)); -+ __func__)); - return Status; - } - -diff --git a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c -index a5d4ec33..6f1224a3 100644 ---- a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c -+++ b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c -@@ -236,7 +236,7 @@ MvFvbValidateFvHeader ( - (FwVolHeader->FvLength != FlashInstance->FvbSize)) { - DEBUG ((DEBUG_ERROR, - "%a: No Firmware Volume header present\n", -- __FUNCTION__)); -+ __func__)); - return EFI_NOT_FOUND; - } - -@@ -244,7 +244,7 @@ MvFvbValidateFvHeader ( - if (!CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid)) { - DEBUG ((DEBUG_ERROR, - "%a: Firmware Volume Guid non-compatible\n", -- __FUNCTION__)); -+ __func__)); - return EFI_NOT_FOUND; - } - -@@ -253,7 +253,7 @@ MvFvbValidateFvHeader ( - if (Checksum != 0) { - DEBUG ((DEBUG_ERROR, - "%a: FV checksum is invalid (Checksum:0x%x)\n", -- __FUNCTION__, -+ __func__, - Checksum)); - return EFI_NOT_FOUND; - } -@@ -266,7 +266,7 @@ MvFvbValidateFvHeader ( - &gEfiAuthenticatedVariableGuid)) { - DEBUG ((DEBUG_ERROR, - "%a: Variable Store Guid non-compatible\n", -- __FUNCTION__)); -+ __func__)); - return EFI_NOT_FOUND; - } - -@@ -275,7 +275,7 @@ MvFvbValidateFvHeader ( - if (VariableStoreHeader->Size != VariableStoreLength) { - DEBUG ((DEBUG_ERROR, - "%a: Variable Store Length does not match\n", -- __FUNCTION__)); -+ __func__)); - return EFI_NOT_FOUND; - } - -@@ -519,7 +519,7 @@ MvFvbGetBlockSize ( - if (Lba > FlashInstance->Media.LastBlock) { - DEBUG ((DEBUG_ERROR, - "%a: Error: Requested LBA %ld is beyond the last available LBA (%ld).\n", -- __FUNCTION__, -+ __func__, - Lba, - FlashInstance->Media.LastBlock)); - return EFI_INVALID_PARAMETER; -@@ -606,7 +606,7 @@ MvFvbRead ( - (Offset + *NumBytes) > BlockSize) { - DEBUG ((DEBUG_ERROR, - "%a: Wrong buffer size: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", -- __FUNCTION__, -+ __func__, - Offset, - *NumBytes, - BlockSize)); -@@ -713,7 +713,7 @@ MvFvbWrite ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Failed to write to Spi device\n", -- __FUNCTION__)); -+ __func__)); - return Status; - } - -@@ -799,7 +799,7 @@ MvFvbEraseBlocks ( - if ((FlashFvbAttributes & EFI_FVB2_WRITE_STATUS) == 0) { - DEBUG ((DEBUG_ERROR, - "%a: Device is in WriteDisabled state.\n", -- __FUNCTION__)); -+ __func__)); - return EFI_ACCESS_DENIED; - } - -@@ -828,7 +828,7 @@ MvFvbEraseBlocks ( - - DEBUG ((DEBUG_ERROR, - "%a: Error: Requested LBA are beyond the last available LBA (%ld).\n", -- __FUNCTION__, -+ __func__, - FlashInstance->Media.LastBlock)); - - VA_END (Args); -@@ -933,7 +933,7 @@ MvFvbFlashProbe ( - - Status = SpiFlashProtocol->Init (SpiFlashProtocol, &FlashInstance->SpiDevice); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot initialize flash device\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot initialize flash device\n", __func__)); - return EFI_DEVICE_ERROR; - } - -@@ -967,10 +967,10 @@ MvFvbPrepareFvHeader ( - // Install the default FVB header if required - if (EFI_ERROR (Status)) { - // There is no valid header, so time to install one. -- DEBUG ((DEBUG_ERROR, "%a: The FVB Header is not valid.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: The FVB Header is not valid.\n", __func__)); - DEBUG ((DEBUG_ERROR, - "%a: Installing a correct one for this volume.\n", -- __FUNCTION__)); -+ __func__)); - - // Erase entire region that is reserved for variable storage - Status = FlashInstance->SpiFlashProtocol->Erase (&FlashInstance->SpiDevice, -@@ -1006,7 +1006,7 @@ MvFvbConfigureFlashInstance ( - NULL, - (VOID **)&FlashInstance->SpiFlashProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot locate SpiFlash protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot locate SpiFlash protocol\n", __func__)); - return Status; - } - -@@ -1014,7 +1014,7 @@ MvFvbConfigureFlashInstance ( - NULL, - (VOID **)&FlashInstance->SpiMasterProtocol); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot locate SpiMaster protocol\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot locate SpiMaster protocol\n", __func__)); - return Status; - } - -@@ -1028,7 +1028,7 @@ MvFvbConfigureFlashInstance ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Error while performing SPI flash probe\n", -- __FUNCTION__)); -+ __func__)); - return Status; - } - -@@ -1132,7 +1132,7 @@ MvFvbEntryPoint ( - mFvbDevice = AllocateRuntimeCopyPool (sizeof (mMvFvbFlashInstanceTemplate), - &mMvFvbFlashInstanceTemplate); - if (mFvbDevice == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -1141,7 +1141,7 @@ MvFvbEntryPoint ( - // - Status = MvFvbConfigureFlashInstance (mFvbDevice); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Fail to configure Fvb SPI device\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Fail to configure Fvb SPI device\n", __func__)); - goto ErrorConfigureFlash; - } - -@@ -1156,7 +1156,7 @@ MvFvbEntryPoint ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Failed to install gEdkiiNvVarStoreFormattedGuid\n", -- __FUNCTION__)); -+ __func__)); - goto ErrorInstallNvVarStoreFormatted; - } - -@@ -1172,7 +1172,7 @@ MvFvbEntryPoint ( - RuntimeMmioRegionSize, - EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to add memory space\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to add memory space\n", __func__)); - goto ErrorAddSpace; - } - -@@ -1181,7 +1181,7 @@ MvFvbEntryPoint ( - RuntimeMmioRegionSize, - EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes\n", __func__)); - goto ErrorSetMemAttr; - } - } -@@ -1196,7 +1196,7 @@ MvFvbEntryPoint ( - &gEfiEventVirtualAddressChangeGuid, - &mFvbVirtualAddrChangeEvent); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to register VA change event\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to register VA change event\n", __func__)); - goto ErrorSetMemAttr; - } - -diff --git a/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c b/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c -index f99f3d57..38d6d256 100755 ---- a/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c -+++ b/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c -@@ -396,7 +396,7 @@ MvSpiFlashUpdateWithProgress ( - - TmpBuf = (UINT8 *)AllocateZeroPool (SectorSize); - if (TmpBuf == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - return EFI_OUT_OF_RESOURCES; - } - -@@ -418,7 +418,7 @@ MvSpiFlashUpdateWithProgress ( - TmpBuf, - SectorSize); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Error while updating\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Error while updating\n", __func__)); - return Status; - } - } -@@ -459,7 +459,7 @@ MvSpiFlashReadId ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Unrecognized JEDEC Id bytes: 0x%02x%02x%02x\n", -- __FUNCTION__, -+ __func__, - Id[0], - Id[1], - Id[2])); -@@ -617,7 +617,7 @@ MvSpiFlashEntryPoint ( - &gEfiEventVirtualAddressChangeGuid, - &mMvSpiFlashVirtualAddrChangeEvent); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to register VA change event\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to register VA change event\n", __func__)); - goto ErrorCreateEvent; - } - -diff --git a/Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.c b/Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.c -index 49d212e4..448d9902 100755 ---- a/Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.c -+++ b/Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.c -@@ -220,7 +220,7 @@ MvSpiTransfer ( - } - - if (Iterator >= SPI_TIMEOUT) { -- DEBUG ((DEBUG_ERROR, "%a: Timeout\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Timeout\n", __func__)); - return EFI_TIMEOUT; - } - } -@@ -337,7 +337,7 @@ MvSpiConfigRuntime ( - SIZE_4KB, - EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to add memory space\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to add memory space\n", __func__)); - return Status; - } - -@@ -345,7 +345,7 @@ MvSpiConfigRuntime ( - SIZE_4KB, - EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes\n", __func__)); - gDS->RemoveMemorySpace (AlignedAddress, SIZE_4KB); - return Status; - } -diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c -index d7fdb43d..cec0e654 100644 ---- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c -+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c -@@ -187,7 +187,7 @@ MvComPhyInit ( - ChipConfig = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount * - sizeof (CHIP_COMPHY_CONFIG)); - if (ChipConfig == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - BoardDescProtocol->BoardDescFree (ComPhyBoardDesc); - return EFI_OUT_OF_RESOURCES; - } -@@ -195,7 +195,7 @@ MvComPhyInit ( - LaneData = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount * - sizeof (PCD_LANE_MAP)); - if (ChipConfig == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __func__)); - BoardDescProtocol->BoardDescFree (ComPhyBoardDesc); - FreePool (ChipConfig); - return EFI_OUT_OF_RESOURCES; -diff --git a/Silicon/Marvell/Library/MvGpioLib/MvGpioLib.c b/Silicon/Marvell/Library/MvGpioLib/MvGpioLib.c -index 95eabf80..8e4c2f4b 100644 ---- a/Silicon/Marvell/Library/MvGpioLib/MvGpioLib.c -+++ b/Silicon/Marvell/Library/MvGpioLib/MvGpioLib.c -@@ -79,7 +79,7 @@ MvGpioGetProtocol ( - &HandleCount, - &HandleBuffer); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to locate handles\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to locate handles\n", __func__)); - return Status; - } - -@@ -93,7 +93,7 @@ MvGpioGetProtocol ( - NULL, - EFI_OPEN_PROTOCOL_GET_PROTOCOL); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Unable to find DevicePath\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Unable to find DevicePath\n", __func__)); - continue; - } - -@@ -111,7 +111,7 @@ MvGpioGetProtocol ( - } else if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Unable to open GPIO protocol\n", -- __FUNCTION__)); -+ __func__)); - } - - gBS->FreePool (HandleBuffer); -diff --git a/Silicon/Maxim/Library/Ds1307RtcLib/Ds1307RtcLib.c b/Silicon/Maxim/Library/Ds1307RtcLib/Ds1307RtcLib.c -index 444e0112..29f1b66a 100644 ---- a/Silicon/Maxim/Library/Ds1307RtcLib/Ds1307RtcLib.c -+++ b/Silicon/Maxim/Library/Ds1307RtcLib/Ds1307RtcLib.c -@@ -289,7 +289,7 @@ I2cDriverRegistrationEvent ( - if (EFI_ERROR (Status)) { - if (Status != EFI_NOT_FOUND) { - DEBUG ((DEBUG_WARN, "%a: gBS->LocateHandle () returned %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - break; - } -@@ -298,7 +298,7 @@ I2cDriverRegistrationEvent ( - continue; - } - -- DEBUG ((DEBUG_INFO, "%a: found I2C master!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: found I2C master!\n", __func__)); - - gBS->CloseEvent (Event); - -@@ -310,7 +310,7 @@ I2cDriverRegistrationEvent ( - Status = I2cMaster->Reset (I2cMaster); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: I2CMaster->Reset () failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - break; - } - -@@ -318,7 +318,7 @@ I2cDriverRegistrationEvent ( - Status = I2cMaster->SetBusFrequency (I2cMaster, &BusFrequency); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: I2CMaster->SetBusFrequency () failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - break; - } - -diff --git a/Silicon/NXP/LS1043A/Library/SocLib/SerDes.c b/Silicon/NXP/LS1043A/Library/SocLib/SerDes.c -index 640e1ee4..8768b1ef 100644 ---- a/Silicon/NXP/LS1043A/Library/SocLib/SerDes.c -+++ b/Silicon/NXP/LS1043A/Library/SocLib/SerDes.c -@@ -113,7 +113,7 @@ GetSerDesProtocolMap ( - ); - - if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "%a: failed for SerDes1 \n",__FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed for SerDes1 \n",__func__)); - *SerDesProtocolMap = 0; - } - } -diff --git a/Silicon/NXP/LS1046A/Library/SocLib/SerDes.c b/Silicon/NXP/LS1046A/Library/SocLib/SerDes.c -index a50e0b61..b2138601 100644 ---- a/Silicon/NXP/LS1046A/Library/SocLib/SerDes.c -+++ b/Silicon/NXP/LS1046A/Library/SocLib/SerDes.c -@@ -113,7 +113,7 @@ GetSerDesProtocolMap ( - ); - - if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "%a: failed for SerDes1 \n",__FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed for SerDes1 \n",__func__)); - *SerDesProtocolMap = 0; - } - } -diff --git a/Silicon/NXP/LX2160A/Library/SocLib/SerDes.c b/Silicon/NXP/LX2160A/Library/SocLib/SerDes.c -index d02393b5..f5135835 100644 ---- a/Silicon/NXP/LX2160A/Library/SocLib/SerDes.c -+++ b/Silicon/NXP/LX2160A/Library/SocLib/SerDes.c -@@ -175,7 +175,7 @@ GetSerDesProtocolMap ( - ); - - if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "%a: failed for SerDes1 \n",__FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed for SerDes1 \n",__func__)); - *SerDesProtocolMap = 0; - } - -@@ -190,7 +190,7 @@ GetSerDesProtocolMap ( - ); - - if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "%a: failed for SerDes2 \n",__FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed for SerDes2 \n",__func__)); - *SerDesProtocolMap = 0; - } - -@@ -205,7 +205,7 @@ GetSerDesProtocolMap ( - ); - - if (Status != EFI_SUCCESS) { -- DEBUG ((DEBUG_ERROR, "%a: failed for SerDes3 \n",__FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: failed for SerDes3 \n",__func__)); - *SerDesProtocolMap = 0; - } - } -diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c -index ac68c039..e329cfec 100644 ---- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c -+++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c -@@ -293,7 +293,7 @@ I2cMasterRegistrationEvent ( - if (EFI_ERROR (Status)) { - if (Status != EFI_NOT_FOUND) { - DEBUG ((DEBUG_WARN, "%a: gBS->LocateHandle () returned %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - break; - } -@@ -302,7 +302,7 @@ I2cMasterRegistrationEvent ( - continue; - } - -- DEBUG ((DEBUG_INFO, "%a: found I2C master!\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: found I2C master!\n", __func__)); - - gBS->CloseEvent (Event); - -@@ -314,7 +314,7 @@ I2cMasterRegistrationEvent ( - Status = I2cMaster->Reset (I2cMaster); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: I2CMaster->Reset () failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - break; - } - -@@ -322,7 +322,7 @@ I2cMasterRegistrationEvent ( - Status = I2cMaster->SetBusFrequency (I2cMaster, &BusFrequency); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: I2CMaster->SetBusFrequency () failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - break; - } - -diff --git a/Silicon/NXP/Library/SerDesHelperLib/SerDesHelperLib.c b/Silicon/NXP/Library/SerDesHelperLib/SerDesHelperLib.c -index 1e815854..c351e54d 100644 ---- a/Silicon/NXP/Library/SerDesHelperLib/SerDesHelperLib.c -+++ b/Silicon/NXP/Library/SerDesHelperLib/SerDesHelperLib.c -@@ -147,7 +147,7 @@ GetSerDesMap ( - Status = IsSerDesProtocolValid (SerDes, SerDesProtocol, SerDesNumLanes, Config); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: SERDES%d[PRTCL] = 0x%x is not valid, Status = %r \n", -- __FUNCTION__, SerDes + 1, SerDesProtocol, Status)); -+ __func__, SerDes + 1, SerDesProtocol, Status)); - return Status; - } - -diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c -index 4ebbe7c9..b8caaecc 100644 ---- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c -+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c -@@ -34,7 +34,7 @@ InitializeSbsaQemuPlatformDxe ( - UINTN SmcResult; - RETURN_STATUS Result; - -- DEBUG ((DEBUG_INFO, "%a: InitializeSbsaQemuPlatformDxe called\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: InitializeSbsaQemuPlatformDxe called\n", __func__)); - - Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformAhciBase); - ASSERT (Base != NULL); -@@ -42,7 +42,7 @@ InitializeSbsaQemuPlatformDxe ( - ASSERT (Size != 0); - - DEBUG ((DEBUG_INFO, "%a: Got platform AHCI %llx %u\n", -- __FUNCTION__, Base, Size)); -+ __func__, Base, Size)); - - Status = RegisterNonDiscoverableMmioDevice ( - NonDiscoverableDeviceTypeAhci, -@@ -54,7 +54,7 @@ InitializeSbsaQemuPlatformDxe ( - - if (EFI_ERROR(Status)) { - DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install AHCI device @%p (Staus == %r)\n", -- __FUNCTION__, Base, Status)); -+ __func__, Base, Status)); - return Status; - } - -@@ -104,7 +104,7 @@ InitializeSbsaQemuPlatformDxe ( - ASSERT (Size != 0); - - DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n", -- __FUNCTION__, Base, Size)); -+ __func__, Base, Size)); - - Status = RegisterNonDiscoverableMmioDevice ( - NonDiscoverableDeviceTypeXhci, -@@ -118,7 +118,7 @@ InitializeSbsaQemuPlatformDxe ( - - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p (Status == %r)\n", -- __FUNCTION__, Base, Status)); -+ __func__, Base, Status)); - return Status; - } - } -diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuSmbiosDxe/SbsaQemuSmbiosDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuSmbiosDxe/SbsaQemuSmbiosDxe.c -index 9ef5168b..3403b351 100644 ---- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuSmbiosDxe/SbsaQemuSmbiosDxe.c -+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuSmbiosDxe/SbsaQemuSmbiosDxe.c -@@ -292,7 +292,7 @@ MemDevInfoUpdateSmbiosType17 ( - // PhyMemArrayInfoUpdateSmbiosType16 must be called before MemDevInfoUpdateSmbiosType17 - // - if (mPhyMemArrayInfoType16Handle == SMBIOS_HANDLE_PI_RESERVED) { -- DEBUG ((DEBUG_ERROR, "%a: mPhyMemArrayInfoType16Handle is not initialized\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: mPhyMemArrayInfoType16Handle is not initialized\n", __func__)); - return; - } - -@@ -346,7 +346,7 @@ MemArrMapInfoUpdateSmbiosType19 ( - // PhyMemArrayInfoUpdateSmbiosType16 must be called before MemDevInfoUpdateSmbiosType17 - // - if (mPhyMemArrayInfoType16Handle == SMBIOS_HANDLE_PI_RESERVED) { -- DEBUG ((DEBUG_ERROR, "%a: mPhyMemArrayInfoType16Handle is not initialized\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: mPhyMemArrayInfoType16Handle is not initialized\n", __func__)); - return; - } - -diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c -index 8c2eb0b6..be58de27 100644 ---- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c -+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c -@@ -60,7 +60,7 @@ SbsaQemuLibConstructor ( - CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1)); - - DEBUG ((DEBUG_INFO, "%a: System RAM @ 0x%lx - 0x%lx\n", -- __FUNCTION__, CurBase, CurBase + CurSize - 1)); -+ __func__, CurBase, CurBase + CurSize - 1)); - - if (NewBase > CurBase || NewBase == 0) { - NewBase = CurBase; -@@ -68,7 +68,7 @@ SbsaQemuLibConstructor ( - } - } else { - DEBUG ((DEBUG_ERROR, "%a: Failed to parse FDT memory node\n", -- __FUNCTION__)); -+ __func__)); - } - } - } -@@ -107,7 +107,7 @@ ArmPlatformGetVirtualMemoryMap ( - MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); - - if (VirtualMemoryTable == NULL) { -- DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __func__)); - return; - } - -@@ -121,7 +121,7 @@ ArmPlatformGetVirtualMemoryMap ( - "\tPhysicalBase: 0x%lX\n" - "\tVirtualBase: 0x%lX\n" - "\tLength: 0x%lX\n", -- __FUNCTION__, -+ __func__, - VirtualMemoryTable[0].PhysicalBase, - VirtualMemoryTable[0].VirtualBase, - VirtualMemoryTable[0].Length)); -diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c -index c3ced4a4..bca462e7 100644 ---- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c -+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c -@@ -74,7 +74,7 @@ RegisterCpuInterruptHandler ( - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler - ) - { -- DEBUG ((DEBUG_INFO, "%a: Type:%x Handler: %x\n", __FUNCTION__, InterruptType, InterruptHandler)); -+ DEBUG ((DEBUG_INFO, "%a: Type:%x Handler: %x\n", __func__, InterruptType, InterruptHandler)); - mInterruptHandlers[InterruptType] = InterruptHandler; - return EFI_SUCCESS; - } -diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c -index 1e762492..0ab70519 100644 ---- a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c -+++ b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c -@@ -49,7 +49,7 @@ FixDtb ( - DEBUG (( - DEBUG_ERROR, - "Device Tree can't be expanded to accommodate new node\n", -- __FUNCTION__ -+ __func__ - )); - return EFI_OUT_OF_RESOURCES; - } -@@ -83,7 +83,7 @@ InstallFdtFromHob ( - DEBUG (( - DEBUG_ERROR, - "Failed to find RISC-V DTB Hob\n", -- __FUNCTION__ -+ __func__ - )); - return EFI_NOT_FOUND; - } -@@ -101,7 +101,7 @@ InstallFdtFromHob ( - DEBUG (( - DEBUG_ERROR, - "%a: failed to install FDT configuration table\n", -- __FUNCTION__ -+ __func__ - )); - } - -diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.c b/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.c -index 1375bb0a..60c92b4f 100644 ---- a/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.c -+++ b/Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.c -@@ -46,7 +46,7 @@ BuildSmbiosType7 ( - Type7DataHob->EndingZero = 0; - Status = mSmbios->Add (mSmbios, NULL, &Handle, &Type7DataHob->SmbiosType7Cache.Hdr); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: Fail to add SMBIOS Type 7\n", __FUNCTION__)); -+ DEBUG ((DEBUG_ERROR, "%a: Fail to add SMBIOS Type 7\n", __func__)); - return Status; - } - -@@ -306,7 +306,7 @@ RiscVSmbiosBuilderEntry ( - RISC_V_PROCESSOR_TYPE4_HOB_DATA *Type4HobData; - SMBIOS_HANDLE Processor; - -- DEBUG ((DEBUG_INFO, "%a: entry\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: entry\n", __func__)); - - Status = gBS->LocateProtocol ( - &gEfiSmbiosProtocolGuid, -@@ -345,6 +345,6 @@ RiscVSmbiosBuilderEntry ( - GuidHob = GetNextGuidHob ((EFI_GUID *)PcdGetPtr (PcdProcessorSmbiosType4GuidHobGuid), GET_NEXT_HOB (GuidHob)); - } while (GuidHob != NULL); - -- DEBUG ((DEBUG_INFO, "%a: exit\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: exit\n", __func__)); - return Status; - } -diff --git a/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/CoreInfoHob.c b/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/CoreInfoHob.c -index aed00b2b..33555c26 100644 ---- a/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/CoreInfoHob.c -+++ b/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/CoreInfoHob.c -@@ -57,7 +57,7 @@ CreateU54E51CoreProcessorSpecificDataHob ( - EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext; - EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *FirmwareContextHartSpecific; - -- DEBUG ((DEBUG_INFO, "%a: Entry.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Entry.\n", __func__)); - - if (GuidHobData == NULL) { - return EFI_INVALID_PARAMETER; -diff --git a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashDxe.c b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashDxe.c -index aa380cd9..9579a673 100644 ---- a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashDxe.c -+++ b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashDxe.c -@@ -85,9 +85,9 @@ NorFlashFvbInitialize ( - // Install the Default FVB header if required - if (EFI_ERROR(Status)) { - // There is no valid header, so time to install one. -- DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __func__)); - DEBUG ((DEBUG_INFO, "%a: Installing a correct one for this volume.\n", -- __FUNCTION__)); -+ __func__)); - - // Erase all the NorFlash that is reserved for variable storage - FvbNumLba = (PcdGet32(PcdFlashNvStorageVariableSize) + -@@ -119,7 +119,7 @@ NorFlashFvbInitialize ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: Failed to install gEdkiiNvVarStoreFormattedGuid\n", -- __FUNCTION__)); -+ __func__)); - return Status; - } - -diff --git a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashFvb.c b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashFvb.c -index 48774e95..4420ba27 100644 ---- a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashFvb.c -+++ b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashFvb.c -@@ -145,14 +145,14 @@ ValidateFvHeader ( - ) - { - DEBUG ((DEBUG_INFO, "%a: No Firmware Volume header present\n", -- __FUNCTION__)); -+ __func__)); - return EFI_NOT_FOUND; - } - - // Check the Firmware Volume Guid - if (!CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid)) { - DEBUG ((DEBUG_INFO, "%a: Firmware Volume Guid non-compatible\n", -- __FUNCTION__)); -+ __func__)); - return EFI_NOT_FOUND; - } - -@@ -160,7 +160,7 @@ ValidateFvHeader ( - Checksum = CalculateSum16((UINT16*)FwVolHeader, FwVolHeader->HeaderLength); - if (Checksum != 0) { - DEBUG ((DEBUG_INFO, "%a: FV checksum is invalid (Checksum:0x%X)\n", -- __FUNCTION__, Checksum)); -+ __func__, Checksum)); - return EFI_NOT_FOUND; - } - -@@ -172,7 +172,7 @@ ValidateFvHeader ( - !CompareGuid (&VariableStoreHeader->Signature, - &gEfiAuthenticatedVariableGuid)) { - DEBUG ((DEBUG_INFO, "%a: Variable Store Guid non-compatible\n", -- __FUNCTION__)); -+ __func__)); - return EFI_NOT_FOUND; - } - -@@ -180,7 +180,7 @@ ValidateFvHeader ( - FwVolHeader->HeaderLength; - if (VariableStoreHeader->Size != VariableStoreLength) { - DEBUG ((DEBUG_INFO, "%a: Variable Store Length does not match\n", -- __FUNCTION__)); -+ __func__)); - return EFI_NOT_FOUND; - } - -diff --git a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c -index 718b19b3..88940cc7 100644 ---- a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c -+++ b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c -@@ -69,9 +69,9 @@ NorFlashFvbInitialize ( - Status = ValidateFvHeader (Instance); - if (EFI_ERROR (Status)) { - // There is no valid header, so time to install one. -- DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __func__)); - DEBUG ((DEBUG_INFO, "%a: Installing a correct one for this volume.\n", -- __FUNCTION__)); -+ __func__)); - - // Erase all the NorFlash that is reserved for variable storage - FvbNumLba = (PcdGet32(PcdFlashNvStorageVariableSize) + -diff --git a/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.c b/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.c -index 25cc1ac2..996b04bc 100644 ---- a/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.c -+++ b/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.c -@@ -1069,7 +1069,7 @@ NetsecInit ( - Status = Probe (DriverBindingHandle, LanDriver); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, -- "NETSEC:%a(): Probe failed with status %d\n", __FUNCTION__, Status)); -+ "NETSEC:%a(): Probe failed with status %d\n", __func__, Status)); - goto CloseDeviceProtocol; - } - -@@ -1149,7 +1149,7 @@ NetsecInit ( - // Say what the status of loading the protocol structure is - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: InstallMultipleProtocolInterfaces failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - ogma_terminate (LanDriver->Handle); - goto CloseDeviceProtocol; - } -diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c -index 53b8d290..6b4fe83b 100644 ---- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c -+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c -@@ -90,7 +90,7 @@ RetrainAsm1184eDownstreamPort ( - - DEBUG ((DEBUG_INFO, - "%a: retraining ASM118x downstream PCIe port at %04x:%02x:%02x to Gen2\n", -- __FUNCTION__, SegmentNumber, BusNumber, DeviceNumber)); -+ __func__, SegmentNumber, BusNumber, DeviceNumber)); - - Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, - ASM118x_PCIE_LINK_CONTROL_OFFSET, 1, &LinkControl); -@@ -113,7 +113,7 @@ EnableAsm1061SpreadSpectrum ( - UINT8 SscVal; - - DEBUG ((DEBUG_INFO, "%a: enabling spread spectrum mode 0 for ASM1061\n", -- __FUNCTION__)); -+ __func__)); - - // SSC mode 0~-4000 ppm, 1:1 modulation - -@@ -161,7 +161,7 @@ OnPciIoProtocolNotify ( - ARRAY_SIZE (PciVidPid), &PciVidPid); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to read PCI vendor/product ID - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - continue; - } - -diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c -index 2030ef79..1dc1ed54 100644 ---- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c -+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c -@@ -288,12 +288,12 @@ EnableSettingsForm ( - EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS, - sizeof (Settings), &Settings); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_WARN, "%a: EfiSetVariable failed - %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_WARN, "%a: EfiSetVariable failed - %r\n", __func__, - Status)); - return Status; - } - } else if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_WARN, "%a: EfiGetVariable failed - %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_WARN, "%a: EfiGetVariable failed - %r\n", __func__, - Status)); - return Status; - } -@@ -324,7 +324,7 @@ InstallAcpiTables ( - &TableKey); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to install SSDT table for eMMC - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - } - -@@ -333,7 +333,7 @@ InstallAcpiTables ( - &TableKey); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to install SSDT table for OP-TEE - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - } - } -@@ -405,7 +405,7 @@ PlatformDxeEntryPoint ( - } - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, -- "%a: failed to install FDT configuration table - %r\n", __FUNCTION__, -+ "%a: failed to install FDT configuration table - %r\n", __func__, - Status)); - } - } else { -@@ -418,7 +418,7 @@ PlatformDxeEntryPoint ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: failed to install gEdkiiPlatformHasAcpiGuid as a protocol\n", -- __FUNCTION__)); -+ __func__)); - } - } - -diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c -index 8aa97990..5d182632 100644 ---- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c -+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c -@@ -161,27 +161,27 @@ SynQuacerI2cMasterStart ( - MmioWrite8 (I2c->MmioBase + F_I2C_REG_DAR, SlaveAddress << 1); - } - -- DEBUG ((DEBUG_INFO, "%a: slave:0x%02x\n", __FUNCTION__, -+ DEBUG ((DEBUG_INFO, "%a: slave:0x%02x\n", __func__, - SlaveAddress)); - - Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR); - Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR); - - if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) { -- DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __func__)); - return EFI_ALREADY_STARTED; - } - - if (Bsr & F_I2C_BSR_BB) { // Bus is busy -- DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __func__)); - MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC); - } else { - if (Bcr & F_I2C_BCR_MSS) { - DEBUG ((DEBUG_WARN, -- "%a: is not in master mode\n", __FUNCTION__)); -+ "%a: is not in master mode\n", __func__)); - return EFI_DEVICE_ERROR; - } -- DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __func__)); - MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, - Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE); - } -@@ -323,12 +323,12 @@ SynQuacerI2cStartRequest ( - Status = WaitForInterrupt (I2c); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: Timeout waiting for interrupt - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - break; - } - - if (MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR) & F_I2C_BSR_LRB) { -- DEBUG ((DEBUG_WARN, "%a: No ack received\n", __FUNCTION__)); -+ DEBUG ((DEBUG_WARN, "%a: No ack received\n", __func__)); - Status = EFI_DEVICE_ERROR; - break; - } -@@ -339,13 +339,13 @@ SynQuacerI2cStartRequest ( - Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR); - - if (Bcr & F_I2C_BCR_BER) { -- DEBUG ((DEBUG_WARN, "%a: Bus error detected\n", __FUNCTION__)); -+ DEBUG ((DEBUG_WARN, "%a: Bus error detected\n", __func__)); - Status = EFI_DEVICE_ERROR; - break; - } - - if ((Bsr & F_I2C_BSR_AL) || !(Bcr & F_I2C_BCR_MSS)) { -- DEBUG ((DEBUG_WARN, "%a: Arbitration lost\n", __FUNCTION__)); -+ DEBUG ((DEBUG_WARN, "%a: Arbitration lost\n", __func__)); - Status = EFI_DEVICE_ERROR; - break; - } -@@ -362,7 +362,7 @@ SynQuacerI2cStartRequest ( - Status = WaitForInterrupt (I2c); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, -- "%a: Timeout waiting for interrupt - %r\n", __FUNCTION__, Status)); -+ "%a: Timeout waiting for interrupt - %r\n", __func__, Status)); - break; - } - -@@ -377,12 +377,12 @@ SynQuacerI2cStartRequest ( - Status = WaitForInterrupt (I2c); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, -- "%a: Timeout waiting for interrupt - %r\n", __FUNCTION__, Status)); -+ "%a: Timeout waiting for interrupt - %r\n", __func__, Status)); - break; - } - - if (MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR) & F_I2C_BSR_LRB) { -- DEBUG ((DEBUG_WARN, "%a: No ack received\n", __FUNCTION__)); -+ DEBUG ((DEBUG_WARN, "%a: No ack received\n", __func__)); - Status = EFI_DEVICE_ERROR; - break; - } -@@ -480,7 +480,7 @@ SynQuacerI2cInit ( - EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to add memory space - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - - Status = gDS->SetMemorySpaceAttributes ( -diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c -index 94fbb7a4..193922bd 100644 ---- a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c -+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c -@@ -29,13 +29,13 @@ EnableDtNode ( - Node = fdt_path_offset (Dtb, NodePath); - if (Node < 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate DT path '%a': %a\n", -- __FUNCTION__, NodePath, fdt_strerror (Node))); -+ __func__, NodePath, fdt_strerror (Node))); - return; - } - Rc = fdt_setprop_string (Dtb, Node, "status", "okay"); - if (Rc < 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to set status to 'disabled' on '%a': %a\n", -- __FUNCTION__, NodePath, fdt_strerror (Rc))); -+ __func__, NodePath, fdt_strerror (Rc))); - } - } - -@@ -81,7 +81,7 @@ DtPlatformLoadDtb ( - - Rc = fdt_open_into (OrigDtb, CopyDtb, CopyDtbSize); - if (Rc < 0) { -- DEBUG ((DEBUG_ERROR, "%a: fdt_open_into () failed: %a\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a: fdt_open_into () failed: %a\n", __func__, - fdt_strerror (Rc))); - return EFI_NOT_FOUND; - } -diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c -index 2db88ec5..c7db7fd1 100644 ---- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c -+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c -@@ -210,11 +210,11 @@ CheckCapsule ( - CapsuleBufferLength); - if (!EFI_ERROR (Status)) { - DEBUG ((DEBUG_INFO, "%a: Coalesced capsule @ %p (0x%lx)\n", -- __FUNCTION__, *CapsuleBuffer, *CapsuleBufferLength)); -+ __func__, *CapsuleBuffer, *CapsuleBufferLength)); - return TRUE; - } else { - DEBUG ((DEBUG_WARN, "%a: failed to coalesce() capsule (Status == %r)\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - } - return FALSE; -@@ -273,7 +273,7 @@ MemoryPeim ( - - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: Capsule->CreateState failed (Status == %r)\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - } - -diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c -index bded74dc..18cebb1d 100644 ---- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c -+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c -@@ -97,7 +97,7 @@ GetFvbByAddress ( - if (EFI_ERROR (Status) || !(Attributes & EFI_FVB2_WRITE_STATUS)) { - DEBUG ((DEBUG_INFO, - "%a: ignoring read-only FVB protocol implementation\n", -- __FUNCTION__)); -+ __func__)); - Status = EFI_NOT_FOUND; - continue; - } -@@ -105,14 +105,14 @@ GetFvbByAddress ( - Status = Fvb->GetBlockSize (Fvb, 0, BlockSize, &NumberOfBlocks); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_INFO, "%a: failed to get FVB blocksize - %r, ignoring\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - continue; - } - - if ((Length % *BlockSize) != 0) { - DEBUG ((DEBUG_INFO, - "%a: Length 0x%lx is not a multiple of the blocksize 0x%lx, ignoring\n", -- __FUNCTION__, Length, *BlockSize)); -+ __func__, Length, *BlockSize)); - Status = EFI_INVALID_PARAMETER; - continue; - } -@@ -224,7 +224,7 @@ PerformFlashWriteWithProgress ( - - if (FlashAddressType != FlashAddressTypeAbsoluteAddress) { - DEBUG ((DEBUG_ERROR, "%a: only FlashAddressTypeAbsoluteAddress supported\n", -- __FUNCTION__)); -+ __func__)); - - return EFI_INVALID_PARAMETER; - } -@@ -232,7 +232,7 @@ PerformFlashWriteWithProgress ( - if (FirmwareType != PlatformFirmwareTypeSystemFirmware) { - DEBUG ((DEBUG_ERROR, - "%a: only PlatformFirmwareTypeSystemFirmware supported\n", -- __FUNCTION__)); -+ __func__)); - - return EFI_INVALID_PARAMETER; - } -@@ -246,7 +246,7 @@ PerformFlashWriteWithProgress ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: failed to locate FVB handle for address 0x%llx - %r\n", -- __FUNCTION__, FlashAddress, Status)); -+ __func__, FlashAddress, Status)); - return Status; - } - -@@ -257,13 +257,13 @@ PerformFlashWriteWithProgress ( - FlashAddress, Length, EFI_MEMORY_UC); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: gDS->AddMemorySpace () failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - } - - Status = gDS->SetMemorySpaceAttributes (FlashAddress, Length, EFI_MEMORY_UC); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: gDS->SetMemorySpaceAttributes () failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - -@@ -281,13 +281,13 @@ PerformFlashWriteWithProgress ( - // Erase the region - // - DEBUG ((DEBUG_INFO, "%a: erasing 0x%llx bytes at address %llx (LBA 0x%lx)\n", -- __FUNCTION__, Length, FlashAddress, Lba)); -+ __func__, Length, FlashAddress, Lba)); - - Status = Fvb->EraseBlocks (Fvb, Lba, Length / BlockSize, - EFI_LBA_LIST_TERMINATOR); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Fvb->EraseBlocks () failed - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - return Status; - } - -@@ -296,7 +296,7 @@ PerformFlashWriteWithProgress ( - // Write the new data - // - DEBUG ((DEBUG_INFO, "%a: writing 0x%llx bytes at LBA 0x%lx\n", -- __FUNCTION__, BlockSize, Lba)); -+ __func__, BlockSize, Lba)); - - NumBytes = BlockSize; - if (BufferHasData (Buffer, NumBytes)) { -@@ -304,7 +304,7 @@ PerformFlashWriteWithProgress ( - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: write of LBA 0x%lx failed - %r (NumBytes == 0x%lx)\n", -- __FUNCTION__, Lba, Status, NumBytes)); -+ __func__, Lba, Status, NumBytes)); - } - } - -diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c -index e8412dd8..d460c2d9 100644 ---- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c -+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c -@@ -114,14 +114,14 @@ ReadGpioInput ( - Status = Gpio->Set (Gpio, Pin, GPIO_MODE_INPUT); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to set GPIO %d as input - %r\n", -- __FUNCTION__, Pin, Status)); -+ __func__, Pin, Status)); - return Status; - } - - Status = Gpio->Get (Gpio, Pin, Value); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "%a: failed to get GPIO %d state - %r\n", -- __FUNCTION__, Pin, Status)); -+ __func__, Pin, Status)); - } - return Status; - } -@@ -144,7 +144,7 @@ PlatformPeim ( - - Status = ReadGpioInput (Gpio, FixedPcdGet8 (PcdClearSettingsGpioPin), &Value); - if (!EFI_ERROR (Status) && Value == CLEAR_SETTINGS_GPIO_ASSERTED) { -- DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __func__)); - PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS); - } - -@@ -152,7 +152,7 @@ PlatformPeim ( - &Value); - if (!EFI_ERROR (Status) && Value == PCIE_GPIO_CARD_PRESENT) { - DEBUG ((DEBUG_INFO, -- "%a: card detected in PCIe RC #0, enabling\n", __FUNCTION__)); -+ "%a: card detected in PCIe RC #0, enabling\n", __func__)); - Status = PcdSet8S (PcdPcieEnableMask, PcdGet8 (PcdPcieEnableMask) | BIT0); - ASSERT_EFI_ERROR (Status); - } -diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DriverBinding.c b/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DriverBinding.c -index f1a9771f..2c39e6b5 100755 ---- a/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DriverBinding.c -+++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DriverBinding.c -@@ -145,14 +145,14 @@ DriverStart ( - Status = DmaAllocateBuffer (EfiBootServicesData, - EFI_SIZE_TO_PAGES (sizeof (DESIGNWARE_HW_DESCRIPTOR)), (VOID *)&Snp->MacDriver.TxdescRing[Index]); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a () for TxdescRing: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a () for TxdescRing: %r\n", __func__, Status)); - return Status; - } - - Status = DmaMap (MapOperationBusMasterCommonBuffer, Snp->MacDriver.TxdescRing[Index], - &DescriptorSize, &Snp->MacDriver.TxdescRingMap[Index].AddrMap, &Snp->MacDriver.TxdescRingMap[Index].Mapping); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a () for TxdescRing: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a () for TxdescRing: %r\n", __func__, Status)); - return Status; - } - -@@ -160,14 +160,14 @@ DriverStart ( - Status = DmaAllocateBuffer (EfiBootServicesData, - EFI_SIZE_TO_PAGES (sizeof (DESIGNWARE_HW_DESCRIPTOR)), (VOID *)&Snp->MacDriver.RxdescRing[Index]); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a () for RxdescRing: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a () for RxdescRing: %r\n", __func__, Status)); - return Status; - } - - Status = DmaMap (MapOperationBusMasterCommonBuffer, Snp->MacDriver.RxdescRing[Index], - &DescriptorSize, &Snp->MacDriver.RxdescRingMap[Index].AddrMap, &Snp->MacDriver.RxdescRingMap[Index].Mapping); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a () for RxdescRing: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a () for RxdescRing: %r\n", __func__, Status)); - return Status; - } - -@@ -176,7 +176,7 @@ DriverStart ( - Status = DmaMap (MapOperationBusMasterWrite, (VOID *) RxBufferAddr, - &BufferSize, &RxBufferAddrMap, &Snp->MacDriver.RxBufNum[Index].Mapping); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a () for Rxbuffer: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a () for Rxbuffer: %r\n", __func__, Status)); - return Status; - } - Snp->MacDriver.RxBufNum[Index].AddrMap= RxBufferAddrMap; -@@ -319,7 +319,7 @@ DriverStop ( - (VOID **)&SnpProtocol - ); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a (): HandleProtocol: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a (): HandleProtocol: %r\n", __func__, Status)); - return Status; - } - -@@ -331,7 +331,7 @@ DriverStop ( - &Snp->Snp, - NULL); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a (): UninstallMultipleProtocolInterfaces: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a (): UninstallMultipleProtocolInterfaces: %r\n", __func__, Status)); - return Status; - } - -diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DwEmacSnpDxe.c b/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DwEmacSnpDxe.c -index 4cb3371d..7249813e 100755 ---- a/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DwEmacSnpDxe.c -+++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DwEmacSnpDxe.c -@@ -45,7 +45,7 @@ SnpStart ( - { - SIMPLE_NETWORK_DRIVER *Snp; - -- DEBUG ((DEBUG_INFO,"SNP:DXE: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO,"SNP:DXE: %a ()\r\n", __func__)); - - // Check Snp instance - if (This == NULL) { -@@ -94,7 +94,7 @@ SnpStop ( - { - SIMPLE_NETWORK_DRIVER *Snp; - -- DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __func__)); - - // Check Snp Instance - if (This == NULL) { -@@ -168,7 +168,7 @@ SnpInitialize ( - EFI_STATUS Status; - SIMPLE_NETWORK_DRIVER *Snp; - -- DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __func__)); - - // Check Snp Instance - if (This == NULL) { -@@ -252,7 +252,7 @@ SnpReset ( - - Snp = INSTANCE_FROM_SNP_THIS (This); - -- DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __func__)); - - // Check Snp Instance - if (This == NULL) { -@@ -304,7 +304,7 @@ SnpShutdown ( - { - SIMPLE_NETWORK_DRIVER *Snp; - -- DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __func__)); - - // Check Snp Instance - if (This == NULL) { -@@ -571,7 +571,7 @@ SnpStatistics ( - - Snp = INSTANCE_FROM_SNP_THIS (This); - -- DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __func__)); - - // Check Snp instance - if (This == NULL) { -@@ -648,7 +648,7 @@ SnpMcastIptoMac ( - ) - { - -- DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:DXE: %a ()\r\n", __func__)); - - // Check Snp instance - if (This == NULL) { -@@ -997,7 +997,7 @@ SnpTransmit ( - Status = DmaMap (MapOperationBusMasterRead, (VOID *)(UINTN)TxDescriptor->Addr, - &BufferSizeBuf, &TxBufferAddrMap, &Snp->MappingTxbuf); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a () for Txbuffer: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a () for Txbuffer: %r\n", __func__, Status)); - return Status; - } - TxDescriptorMap->Addr = TxBufferAddrMap; -@@ -1242,7 +1242,7 @@ SnpReceive ( - Status = DmaMap (MapOperationBusMasterWrite, (VOID *)RxBufferAddr, - &BufferSizeBuf, &RxBufferAddrMap, &Snp->MacDriver.RxBufNum[DescNum].Mapping); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a () for Rxbuffer: %r\n", __FUNCTION__, Status)); -+ DEBUG ((DEBUG_ERROR, "%a () for Rxbuffer: %r\n", __func__, Status)); - return Status; - } - Snp->MacDriver.RxBufNum[DescNum].AddrMap = RxBufferAddrMap; -diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/EmacDxeUtil.c b/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/EmacDxeUtil.c -index 26d3ff61..dd02589b 100755 ---- a/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/EmacDxeUtil.c -+++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/EmacDxeUtil.c -@@ -28,7 +28,7 @@ EmacSetMacAddress ( - IN UINTN MacBaseAddress - ) - { -- DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __func__)); - - // Note: This MAC_ADDR0 registers programming sequence cannot be swap: - // Must program HIGH Offset first before LOW Offset -@@ -62,7 +62,7 @@ EmacReadMacAddress ( - UINT32 MacAddrHighValue; - UINT32 MacAddrLowValue; - -- DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __func__)); - - // Read the Mac Addr high register - MacAddrHighValue = (MmioRead32 (MacBaseAddress + DW_EMAC_GMACGRP_MAC_ADDRESS0_HIGH_OFST) & 0xFFFF); -@@ -90,7 +90,7 @@ EmacDxeInitialization ( - IN UINTN MacBaseAddress - ) - { -- DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __func__)); - - // Init EMAC DMA - EmacDmaInit (EmacDriver, MacBaseAddress); -@@ -110,7 +110,7 @@ EmacDmaInit ( - UINT32 DmaOpmode; - UINT32 InterruptEnable; - -- DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __func__)); - - // This section provides the instructions for initializing the DMA registers in the proper sequence. This - // initialization sequence can be done after the EMAC interface initialization has been completed. Perform -@@ -298,7 +298,7 @@ EmacStartTransmission ( - IN UINTN MacBaseAddress - ) - { -- DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __func__)); - MmioOr32 (MacBaseAddress + - DW_EMAC_GMACGRP_MAC_CONFIGURATION_OFST, - DW_EMAC_GMACGRP_MAC_CONFIGURATION_RE_SET_MSK | -@@ -449,7 +449,7 @@ EmacStopTxRx ( - IN UINTN MacBaseAddress - ) - { -- DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __func__)); - - // Stop DMA TX - MmioAnd32 (MacBaseAddress + -@@ -620,7 +620,7 @@ EmacGetStatistic ( - { - EFI_NETWORK_STATISTICS *Stats; - -- DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:MAC: %a ()\r\n", __func__)); - - // Allocate Resources - Stats = AllocateZeroPool (sizeof (EFI_NETWORK_STATISTICS)); -diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/PhyDxeUtil.c b/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/PhyDxeUtil.c -index 84cf0a4b..9f661d17 100755 ---- a/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/PhyDxeUtil.c -+++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/PhyDxeUtil.c -@@ -31,7 +31,7 @@ PhyDxeInitialization ( - { - EFI_STATUS Status; - -- DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __func__)); - - // initialize the phyaddr - PhyDriver->PhyAddr = 0; -@@ -60,7 +60,7 @@ PhyDetectDevice ( - UINT32 PhyAddr; - EFI_STATUS Status; - -- DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __func__)); - - for (PhyAddr = 0; PhyAddr < 32; PhyAddr++) { - Status = PhyReadId (PhyAddr, MacBaseAddress); -@@ -87,7 +87,7 @@ PhyConfig ( - { - EFI_STATUS Status; - -- DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __func__)); - - Status = PhySoftReset (PhyDriver, MacBaseAddress); - if (EFI_ERROR (Status)) { -@@ -123,7 +123,7 @@ PhySoftReset ( - UINT32 Data32; - EFI_STATUS Status; - -- DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __func__)); - - // PHY Basic Control Register reset - PhyWrite (PhyDriver->PhyAddr, PHY_BASIC_CTRL, PHYCTRL_RESET, MacBaseAddress); -@@ -289,7 +289,7 @@ PhyAutoNego ( - UINT32 PhyStatus; - UINT32 Features; - -- DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__)); -+ DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __func__)); - - // Read PHY Status - Status = PhyRead (PhyDriver->PhyAddr, PHY_BASIC_STATUS, &PhyStatus, MacBaseAddress); -diff --git a/Silicon/TexasInstruments/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c b/Silicon/TexasInstruments/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c -index d15e68ed..82075f0c 100644 ---- a/Silicon/TexasInstruments/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c -+++ b/Silicon/TexasInstruments/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c -@@ -308,7 +308,7 @@ CpuArchEventProtocolNotify ( - // - Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); - if (EFI_ERROR (Status)) { -- DEBUG ((DEBUG_ERROR, "%a: gBS->LocateProtocol() - %r\n", __FUNCTION__, -+ DEBUG ((DEBUG_ERROR, "%a: gBS->LocateProtocol() - %r\n", __func__, - Status)); - ASSERT (FALSE); - return; -@@ -320,7 +320,7 @@ CpuArchEventProtocolNotify ( - Status = Cpu->RegisterInterruptHandler (Cpu, EXCEPT_ARM_IRQ, NULL); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - ASSERT (FALSE); - return; - } -@@ -332,7 +332,7 @@ CpuArchEventProtocolNotify ( - IrqInterruptHandler); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n", -- __FUNCTION__, Status)); -+ __func__, Status)); - ASSERT (FALSE); - return; - } --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0024-Through-Feb-21.patch b/packages/edk2/patches/platforms/0024-Through-Feb-21.patch deleted file mode 100644 index 2e4e9ff..0000000 --- a/packages/edk2/patches/platforms/0024-Through-Feb-21.patch +++ /dev/null @@ -1,114 +0,0 @@ -From 6440aeda3459edd32adf5015a7fcfc7989c7bfbd Mon Sep 17 00:00:00 2001 -From: mattp -Date: Tue, 8 Jul 2025 16:50:27 -0400 -Subject: [PATCH 24/29] Through Feb 21 - ---- - .../RPi5/Library/PlatformLib/PlatformLib.inf | 4 +--- - .../RPi5/Library/PlatformLib/RaspberryPiMem.c | 13 +++---------- - Platform/RaspberryPi/RPi5/RPi5.dsc | 8 +------- - Platform/RaspberryPi/RPi5/RPi5.fdf | 2 +- - 4 files changed, 6 insertions(+), 21 deletions(-) - -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf b/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf -index 765a5807..24ef8368 100644 ---- a/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf -@@ -56,9 +56,7 @@ - gArmTokenSpaceGuid.PcdSystemMemoryBase - gArmTokenSpaceGuid.PcdSystemMemorySize - gRaspberryPiTokenSpaceGuid.PcdNvStorageEventLogSize -- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize -- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize -- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize -+ gRaspberryPiTokenSpaceGuid.PcdNvStorageVariableBase - gRaspberryPiTokenSpaceGuid.PcdFwMailboxBaseAddress - - [Ppis] -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c b/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c -index 98575625..c0632fb2 100644 ---- a/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/RaspberryPiMem.c -@@ -27,14 +27,7 @@ extern UINT64 mSystemMemoryEnd; - STATIC BOOLEAN VirtualMemoryInfoInitialized = FALSE; - STATIC RPI_MEMORY_REGION_INFO VirtualMemoryInfo[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; - --#define VariablesSize (FixedPcdGet32(PcdFlashNvStorageVariableSize) + \ -- FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + \ -- FixedPcdGet32(PcdFlashNvStorageFtwSpareSize) + \ -- FixedPcdGet32(PcdNvStorageEventLogSize)) -- --#define VariablesBase (FixedPcdGet64(PcdFdBaseAddress) + \ -- FixedPcdGet32(PcdFdSize) - \ -- VariablesSize) -+#define VariablesBase (FixedPcdGet32(PcdNvStorageVariableBase)) - - /** - Return the Virtual Memory Map of your platform -@@ -93,7 +86,7 @@ ArmPlatformGetVirtualMemoryMap ( - // Firmware Volume - VirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdFdBaseAddress); - VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -- VirtualMemoryTable[Index].Length = FixedPcdGet32 (PcdFdSize) - VariablesSize; -+ VirtualMemoryTable[Index].Length = VariablesBase - VirtualMemoryTable[Index].PhysicalBase; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; - VirtualMemoryInfo[Index].Type = RPI_MEM_RESERVED_REGION; - VirtualMemoryInfo[Index++].Name = L"FD"; -@@ -101,7 +94,7 @@ ArmPlatformGetVirtualMemoryMap ( - // Variable Volume - VirtualMemoryTable[Index].PhysicalBase = VariablesBase; - VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; -- VirtualMemoryTable[Index].Length = VariablesSize; -+ VirtualMemoryTable[Index].Length = FixedPcdGet32 (PcdFdtBaseAddress) - VariablesBase; - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; - VirtualMemoryInfo[Index].Type = RPI_MEM_RUNTIME_REGION; - VirtualMemoryInfo[Index++].Name = L"FD Variables"; -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 8ab4f15a..fae154bc 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -124,9 +124,6 @@ - CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf - DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf - CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf -- ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf -- ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf -- ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf - TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf - ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf -@@ -271,9 +268,6 @@ - ################################################################################ - - [PcdsFeatureFlag.common] -- # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress -- gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE -- - gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE - gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE - -@@ -573,7 +567,7 @@ - - MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - -- ArmPkg/Drivers/ArmGic/ArmGicDxe.inf -+ ArmPkg/Drivers/ArmGicDxe/ArmGicV2Dxe.inf - Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf - Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf - Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index 125d5fee..23c37e26 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -212,7 +212,7 @@ READ_LOCK_STATUS = TRUE - INF Platform/RaspberryPi/Drivers/DisplayDxe/DisplayDxe.inf - INF EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf - -- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf -+ INF ArmPkg/Drivers/ArmGicDxe/ArmGicV2Dxe.inf - INF Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf - INF Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf - INF Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0025-Late-May.patch b/packages/edk2/patches/platforms/0025-Late-May.patch deleted file mode 100644 index 0b7298a..0000000 --- a/packages/edk2/patches/platforms/0025-Late-May.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 2bc42373ed7b3a36397274db719dd682338215aa Mon Sep 17 00:00:00 2001 -From: mattp -Date: Tue, 8 Jul 2025 19:02:01 -0400 -Subject: [PATCH 25/29] Late May - ---- - .../RPi5/Library/PlatformLib/PlatformLib.inf | 1 - - Platform/RaspberryPi/RPi5/RPi5.dsc | 11 +++++++---- - Platform/RaspberryPi/RPi5/RPi5.fdf | 1 + - 3 files changed, 8 insertions(+), 5 deletions(-) - -diff --git a/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf b/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf -index 24ef8368..42fa84bf 100644 ---- a/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf -+++ b/Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf -@@ -28,7 +28,6 @@ - - [LibraryClasses] - ArmLib -- FdtLib - IoLib - MemoryAllocationLib - PcdLib -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index fae154bc..e7eed390 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -126,7 +126,7 @@ - CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf - TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf -- ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf -+ ArmSmcLib|MdePkg/Library/ArmSmcLib/ArmSmcLib.inf - ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf - - # Dual serial port library -@@ -155,7 +155,7 @@ - DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf - - # Flattened Device Tree (FDT) access library -- FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf -+ FdtLib|MdePkg/Library/BaseFdtLib/BaseFdtLib.inf - - # USB Libraries - UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf -@@ -385,7 +385,6 @@ - - [PcdsFixedAtBuild.common] - gArmPlatformTokenSpaceGuid.PcdCoreCount|4 -- gArmTokenSpaceGuid.PcdVFPEnabled|1 - - gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 - gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 -@@ -548,6 +547,7 @@ - !else - MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - !endif -+ SecurityPkg/Hash2DxeCrypto/Hash2DxeCrypto.inf - MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf - MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf -@@ -570,7 +570,10 @@ - ArmPkg/Drivers/ArmGicDxe/ArmGicV2Dxe.inf - Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf - Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -- Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -+ Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf { -+ -+ FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf # Map to deprecated library for this module only -+ } - ArmPkg/Drivers/TimerDxe/TimerDxe.inf - MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - MdeModulePkg/Universal/EbcDxe/EbcDxe.inf -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index 23c37e26..917f5aab 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -194,6 +194,7 @@ READ_LOCK_STATUS = TRUE - INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf - INF SecurityPkg/VariableAuthenticated/SecureBootDefaultKeysDxe/SecureBootDefaultKeysDxe.inf - !endif -+ INF SecurityPkg/Hash2DxeCrypto/Hash2DxeCrypto.inf - INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf - INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf - INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0026-Allocate-more-space-for-UEFI-image.patch b/packages/edk2/patches/platforms/0026-Allocate-more-space-for-UEFI-image.patch deleted file mode 100644 index e37b2c5..0000000 --- a/packages/edk2/patches/platforms/0026-Allocate-more-space-for-UEFI-image.patch +++ /dev/null @@ -1,115 +0,0 @@ -From 902d8c57dd28b13d10044e4a6f67b406ebb5e45b Mon Sep 17 00:00:00 2001 -From: mattp -Date: Thu, 17 Jul 2025 19:18:53 -0400 -Subject: [PATCH 26/29] Allocate more space for UEFI image - ---- - Platform/RaspberryPi/RPi5/RPi5.dsc | 12 ++++++++---- - Platform/RaspberryPi/RPi5/RPi5.fdf | 20 ++++++++++++-------- - 2 files changed, 20 insertions(+), 12 deletions(-) - -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index e7eed390..8edf0458 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -286,6 +286,10 @@ - gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1 - gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 - gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 -+ # -+ # Follows right after the FD image. (bump the size again) -+ # -+ gRaspberryPiTokenSpaceGuid.PcdFdtBaseAddress|0x003e0000 - - gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|$(DEBUG_PROPERTY_MASK) - -@@ -394,11 +398,11 @@ - gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000 - # - # 0x00000000 - 0x001F0000 FD (PcdFdBaseAddress, PcdFdSize) -- # 0x001F0000 - 0x00210000 DTB (PcdFdtBaseAddress, PcdFdtSize) -- # 0x00210000 - ... RAM (PcdSystemMemoryBase, PcdSystemMemorySize) -+ # 0x003E0000 - 0x00400000 DTB (PcdFdtBaseAddress, PcdFdtSize) -+ # 0x00400000 - ... RAM (PcdSystemMemoryBase, PcdSystemMemorySize) - # -- gArmTokenSpaceGuid.PcdSystemMemoryBase|0x00210000 -- gArmTokenSpaceGuid.PcdSystemMemorySize|0x3fdf0000 -+ gArmTokenSpaceGuid.PcdSystemMemoryBase|0x00400000 -+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x3fc00000 - - gRaspberryPiTokenSpaceGuid.PcdFdtSize|0x20000 - -diff --git a/Platform/RaspberryPi/RPi5/RPi5.fdf b/Platform/RaspberryPi/RPi5/RPi5.fdf -index 917f5aab..19b169aa 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.fdf -+++ b/Platform/RaspberryPi/RPi5/RPi5.fdf -@@ -26,11 +26,11 @@ - - [FD.RPI_EFI] - BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress --Size = 0x001f0000|gArmTokenSpaceGuid.PcdFdSize -+Size = 0x003e0000|gArmTokenSpaceGuid.PcdFdSize - ErasePolarity = 1 - - BlockSize = 0x00001000|gRaspberryPiTokenSpaceGuid.PcdFirmwareBlockSize --NumBlocks = 0x1f0 -+NumBlocks = 0x3e0 - - ################################################################################ - # -@@ -57,7 +57,7 @@ FILE = $(TFA_BUILD_BL31) - # - # UEFI image - # --0x00020000|0x001b0000 -+0x00020000|0x00390000 - gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize - FV = FVMAIN_COMPACT - -@@ -71,7 +71,7 @@ FV = FVMAIN_COMPACT - # - - # NV_VARIABLE_STORE --0x001d0000|0x0000e000 -+0x003b0000|0x0000e000 - gRaspberryPiTokenSpaceGuid.PcdNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize - - DATA = { -@@ -114,11 +114,11 @@ DATA = { - } - - # NV_EVENT_LOG --0x001de000|0x00001000 -+0x003be000|0x00001000 - gRaspberryPiTokenSpaceGuid.PcdNvStorageEventLogBase|gRaspberryPiTokenSpaceGuid.PcdNvStorageEventLogSize - - # NV_FTW_WORKING header --0x001df000|0x00001000 -+0x003bf000|0x00001000 - gRaspberryPiTokenSpaceGuid.PcdNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize - - DATA = { -@@ -133,14 +133,18 @@ DATA = { - } - - # NV_FTW_WORKING data --0x001e0000|0x00010000 -+0x003c0000|0x00010000 - gRaspberryPiTokenSpaceGuid.PcdNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize - -+# reserve some future RAM for the ACPI PCC channel structures, immediately before the DTB -+# 0x003d0000|0x00010000 -+# gRaspberryPiTokenSpaceGuid.PcdPccBaseAddress|gRaspberryPiTokenSpaceGuid.PcdPccSize -+ - # - # This is just for documentation purposes! The DTB reserved space is not part of the FD, - # but this is exactly where it is expected to be. - # --# 0x001f0000|0x10000 -+# 0x003e0000|0x20000 - # gRaspberryPiTokenSpaceGuid.PcdFdtBaseAddress|gRaspberryPiTokenSpaceGuid.PcdFdtSize - # - --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0027-Update-ArmMmuLib-library-path.patch b/packages/edk2/patches/platforms/0027-Update-ArmMmuLib-library-path.patch deleted file mode 100644 index a3bc62c..0000000 --- a/packages/edk2/patches/platforms/0027-Update-ArmMmuLib-library-path.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 364f14e0172df42ccee8fd2416c2e997a6bb9527 Mon Sep 17 00:00:00 2001 -From: mattp -Date: Fri, 18 Jul 2025 08:39:17 -0400 -Subject: [PATCH 27/29] Update ArmMmuLib library path - ---- - Platform/RaspberryPi/RPi5/RPi5.dsc | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 8edf0458..1cd72681 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -362,7 +362,7 @@ - - [LibraryClasses.common] - ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf -- ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf -+ ArmMmuLib|UefiCpuPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf - ArmPlatformLib|Platform/RaspberryPi/RPi5/Library/PlatformLib/PlatformLib.inf - TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0028-Fix-Fdt-and-remove-Uga.patch b/packages/edk2/patches/platforms/0028-Fix-Fdt-and-remove-Uga.patch deleted file mode 100644 index 7003795..0000000 --- a/packages/edk2/patches/platforms/0028-Fix-Fdt-and-remove-Uga.patch +++ /dev/null @@ -1,510 +0,0 @@ -From 2db245b3ae93b0dae3d8f4898f7f444201eac4b4 Mon Sep 17 00:00:00 2001 -From: mattp -Date: Sat, 19 Jul 2025 08:40:50 -0400 -Subject: [PATCH 28/29] Fix Fdt and remove Uga - ---- - Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c | 105 +++++++++--------- - .../RaspberryPi/Drivers/FdtDxe/FdtDxe.inf | 1 + - .../Library/BoardInfoLib/BoardInfoLib.c | 14 +-- - .../Library/FdtPlatformLib/FdtPlatformLib.c | 6 +- - .../MemoryInitPeiLib/MemoryInitPeiLib.inf | 1 + - .../PlatformBootManagerLib.inf | 1 - - Platform/RaspberryPi/RPi5/RPi5.dsc | 8 +- - 7 files changed, 66 insertions(+), 70 deletions(-) - -diff --git a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c -index d0a448df..7b7b5676 100644 ---- a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c -+++ b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.c -@@ -9,6 +9,7 @@ - #include - - #include -+#include - #include - #include - #include -@@ -17,7 +18,7 @@ - #include - #include - #include --#include -+#include - #include - #include - #include -@@ -45,13 +46,13 @@ FixEthernetAliases ( - // - // Look up the 'ethernet[0]' aliases - // -- Aliases = fdt_path_offset (mFdtImage, "/aliases"); -+ Aliases = FdtPathOffset (mFdtImage, "/aliases"); - if (Aliases < 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate '/aliases'\n", __func__)); - return EFI_NOT_FOUND; - } -- Ethernet = fdt_getprop (mFdtImage, Aliases, "ethernet", NULL); -- Ethernet0 = fdt_getprop (mFdtImage, Aliases, "ethernet0", NULL); -+ Ethernet = FdtGetProp (mFdtImage, Aliases, "ethernet", NULL); -+ Ethernet0 = FdtGetProp (mFdtImage, Aliases, "ethernet0", NULL); - Alias = Ethernet ? Ethernet : Ethernet0; - if (!Alias) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate 'ethernet[0]' alias\n", __func__)); -@@ -59,7 +60,7 @@ FixEthernetAliases ( - } - - // -- // Create copy for fdt_setprop -+ // Create copy for FdtSetProp - // - CopySize = AsciiStrSize (Alias); - Copy = AllocateCopyPool (CopySize, Alias); -@@ -73,7 +74,7 @@ FixEthernetAliases ( - // - Status = EFI_SUCCESS; - if (!Ethernet) { -- Retval = fdt_setprop (mFdtImage, Aliases, "ethernet", Copy, CopySize); -+ Retval = FdtSetProp (mFdtImage, Aliases, "ethernet", Copy, CopySize); - if (Retval != 0) { - Status = EFI_NOT_FOUND; - DEBUG ((DEBUG_ERROR, "%a: failed to create 'ethernet' alias (%d)\n", -@@ -82,7 +83,7 @@ FixEthernetAliases ( - DEBUG ((DEBUG_INFO, "%a: created 'ethernet' alias '%a'\n", __func__, Copy)); - } - if (!Ethernet0) { -- Retval = fdt_setprop (mFdtImage, Aliases, "ethernet0", Copy, CopySize); -+ Retval = FdtSetProp (mFdtImage, Aliases, "ethernet0", Copy, CopySize); - if (Retval != 0) { - Status = EFI_NOT_FOUND; - DEBUG ((DEBUG_ERROR, "%a: failed to create 'ethernet0' alias (%d)\n", -@@ -109,7 +110,7 @@ UpdateMacAddress ( - // - // Locate the node that the 'ethernet' alias refers to - // -- Node = fdt_path_offset (mFdtImage, "ethernet"); -+ Node = FdtPathOffset (mFdtImage, "ethernet"); - if (Node < 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate 'ethernet' alias\n", __func__)); - return EFI_NOT_FOUND; -@@ -124,7 +125,7 @@ UpdateMacAddress ( - return Status; - } - -- Retval = fdt_setprop (mFdtImage, Node, "mac-address", MacAddress, -+ Retval = FdtSetProp (mFdtImage, Node, "mac-address", MacAddress, - sizeof MacAddress); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to create 'mac-address' property (%d)\n", -@@ -157,28 +158,28 @@ AddUsbCompatibleProperty ( - INTN Retval; - - // Locate the node that the 'usb' alias refers to -- Node = fdt_path_offset (mFdtImage, "usb"); -+ Node = FdtPathOffset (mFdtImage, "usb"); - if (Node < 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate 'usb' alias\n", __func__)); - return EFI_NOT_FOUND; - } - - // Get the property list. This is a list of NUL terminated strings. -- List = fdt_getprop (mFdtImage, Node, "compatible", &ListSize); -+ List = FdtGetProp (mFdtImage, Node, "compatible", &ListSize); - if (List == NULL) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate properties\n", __func__)); - return EFI_NOT_FOUND; - } - - // Check if the compatible value we plan to add is already present -- if (fdt_stringlist_contains (List, ListSize, NewProp)) { -+ if (FdtStringListContains (List, ListSize, NewProp)) { - DEBUG ((DEBUG_INFO, "%a: property '%a' is already set.\n", - __func__, NewProp)); - return EFI_SUCCESS; - } - - // Make sure the compatible device is what we expect -- if (!fdt_stringlist_contains (List, ListSize, Prop)) { -+ if (!FdtStringListContains (List, ListSize, Prop)) { - DEBUG ((DEBUG_ERROR, "%a: property '%a' is missing!\n", - __func__, Prop)); - return EFI_NOT_FOUND; -@@ -196,7 +197,7 @@ AddUsbCompatibleProperty ( - CopyMem (NewList, List, ListSize); - CopyMem (&NewList[ListSize], NewProp, sizeof (NewProp)); - -- Retval = fdt_setprop (mFdtImage, Node, "compatible", NewList, -+ Retval = FdtSetProp (mFdtImage, Node, "compatible", NewList, - ListSize + sizeof (NewProp)); - FreePool (NewList); - if (Retval != 0) { -@@ -217,7 +218,7 @@ CleanMemoryNodes ( - INTN Node; - INT32 Retval; - -- Node = fdt_path_offset (mFdtImage, "/memory"); -+ Node = FdtPathOffset (mFdtImage, "/memory"); - if (Node < 0) { - return EFI_SUCCESS; - } -@@ -227,7 +228,7 @@ CleanMemoryNodes ( - * OS go crazy and ignore the UEFI map. - */ - DEBUG ((DEBUG_INFO, "Removing bogus /memory\n")); -- Retval = fdt_del_node (mFdtImage, Node); -+ Retval = FdtDelNode (mFdtImage, Node); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "Failed to remove /memory\n")); - return EFI_NOT_FOUND; -@@ -246,15 +247,15 @@ SanitizePSCI ( - INTN Root; - INT32 Retval; - -- Root = fdt_path_offset (mFdtImage, "/"); -+ Root = FdtPathOffset (mFdtImage, "/"); - ASSERT (Root >= 0); - if (Root < 0) { - return EFI_NOT_FOUND; - } - -- Node = fdt_path_offset (mFdtImage, "/psci"); -+ Node = FdtPathOffset (mFdtImage, "/psci"); - if (Node < 0) { -- Node = fdt_add_subnode (mFdtImage, Root, "psci"); -+ Node = FdtAddSubnode (mFdtImage, Root, "psci"); - } - - ASSERT (Node >= 0); -@@ -263,33 +264,33 @@ SanitizePSCI ( - return EFI_NOT_FOUND; - } - -- Retval = fdt_setprop_string (mFdtImage, Node, "compatible", "arm,psci-1.0"); -+ Retval = FdtSetPropString (mFdtImage, Node, "compatible", "arm,psci-1.0"); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "Couldn't set /psci compatible property\n")); - return EFI_NOT_FOUND; - } - -- Retval = fdt_setprop_string (mFdtImage, Node, "method", "smc"); -+ Retval = FdtSetPropString (mFdtImage, Node, "method", "smc"); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "Couldn't set /psci method property\n")); - return EFI_NOT_FOUND; - } - -- Root = fdt_path_offset (mFdtImage, "/cpus"); -+ Root = FdtPathOffset (mFdtImage, "/cpus"); - if (Root < 0) { - DEBUG ((DEBUG_ERROR, "No CPUs to update with PSCI enable-method?\n")); - return EFI_NOT_FOUND; - } - -- Node = fdt_first_subnode (mFdtImage, Root); -+ Node = FdtFirstSubnode (mFdtImage, Root); - while (Node >= 0) { -- if (fdt_setprop_string (mFdtImage, Node, "enable-method", "psci") != 0) { -+ if (FdtSetPropString (mFdtImage, Node, "enable-method", "psci") != 0) { - DEBUG ((DEBUG_ERROR, "Failed to update enable-method for a CPU\n")); - return EFI_NOT_FOUND; - } - -- fdt_delprop (mFdtImage, Node, "cpu-release-addr"); -- Node = fdt_next_subnode (mFdtImage, Node); -+ FdtDelProp (mFdtImage, Node, "cpu-release-addr"); -+ Node = FdtNextSubnode (mFdtImage, Node); - } - return EFI_SUCCESS; - } -@@ -307,7 +308,7 @@ CleanSimpleFramebuffer ( - * Should look for nodes by kind and remove aliases - * by matching against device. - */ -- Node = fdt_path_offset (mFdtImage, "display0"); -+ Node = FdtPathOffset (mFdtImage, "display0"); - if (Node < 0) { - return EFI_SUCCESS; - } -@@ -317,19 +318,19 @@ CleanSimpleFramebuffer ( - * doesn't reflect the framebuffer built by UEFI. - */ - DEBUG ((DEBUG_INFO, "Removing bogus display0\n")); -- Retval = fdt_del_node (mFdtImage, Node); -+ Retval = FdtDelNode (mFdtImage, Node); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "Failed to remove display0\n")); - return EFI_NOT_FOUND; - } - -- Node = fdt_path_offset (mFdtImage, "/aliases"); -+ Node = FdtPathOffset (mFdtImage, "/aliases"); - if (Node < 0) { - DEBUG ((DEBUG_ERROR, "Couldn't find /aliases to remove display0\n")); - return EFI_NOT_FOUND; - } - -- Retval = fdt_delprop (mFdtImage, Node, "display0"); -+ Retval = FdtDelProp (mFdtImage, Node, "display0"); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "Failed to remove display0 alias\n")); - return EFI_NOT_FOUND; -@@ -349,20 +350,20 @@ SyncPcie ( - INTN Retval; - UINT32 DmaRanges[7]; - -- Node = fdt_path_offset (mFdtImage, "pcie0"); -+ Node = FdtPathOffset (mFdtImage, "pcie0"); - if (Node < 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate 'pcie0' alias\n", __func__)); - return EFI_NOT_FOUND; - } - - // non translated 32-bit DMA window with a limit of 0xc0000000 -- DmaRanges[0] = cpu_to_fdt32 (0x02000000); -- DmaRanges[1] = cpu_to_fdt32 (0x00000000); -- DmaRanges[2] = cpu_to_fdt32 (0x00000000); -- DmaRanges[3] = cpu_to_fdt32 (0x00000000); -- DmaRanges[4] = cpu_to_fdt32 (0x00000000); -- DmaRanges[5] = cpu_to_fdt32 (0x00000000); -- DmaRanges[6] = cpu_to_fdt32 (0xc0000000); -+ DmaRanges[0] = CpuToFdt32 (0x02000000); -+ DmaRanges[1] = CpuToFdt32 (0x00000000); -+ DmaRanges[2] = CpuToFdt32 (0x00000000); -+ DmaRanges[3] = CpuToFdt32 (0x00000000); -+ DmaRanges[4] = CpuToFdt32 (0x00000000); -+ DmaRanges[5] = CpuToFdt32 (0x00000000); -+ DmaRanges[6] = CpuToFdt32 (0xc0000000); - - DEBUG ((DEBUG_INFO, "%a: Updating PCIe dma-ranges\n", __func__)); - -@@ -371,7 +372,7 @@ SyncPcie ( - * around a failure in Linux and OpenBSD to reset the PCIe/XHCI correctly - * when in DT mode. - */ -- Retval = fdt_setprop (mFdtImage, Node, "dma-ranges", -+ Retval = FdtSetProp (mFdtImage, Node, "dma-ranges", - DmaRanges, sizeof DmaRanges); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate PCIe 'dma-ranges' property (%d)\n", -@@ -380,20 +381,20 @@ SyncPcie ( - } - - // move the MMIO window too -- DmaRanges[0] = cpu_to_fdt32 (0x02000000); // non prefetchable 32-bit -- DmaRanges[1] = cpu_to_fdt32 (FixedPcdGet64 (PcdBcm27xxPciBusMmioAdr) >> 32); // bus addr @ 0x0f8000000 -- DmaRanges[2] = cpu_to_fdt32 (FixedPcdGet64 (PcdBcm27xxPciBusMmioAdr) & MAX_UINT32); -- DmaRanges[3] = cpu_to_fdt32 (FixedPcdGet64 (PcdBcm27xxPciCpuMmioAdr) >> 32); // cpu addr @ 0x600000000 -- DmaRanges[4] = cpu_to_fdt32 (FixedPcdGet64 (PcdBcm27xxPciCpuMmioAdr) & MAX_UINT32); -- DmaRanges[5] = cpu_to_fdt32 (0x00000000); -- DmaRanges[6] = cpu_to_fdt32 (FixedPcdGet32 (PcdBcm27xxPciBusMmioLen) + 1); // len = 0x4000 0000 -+ DmaRanges[0] = CpuToFdt32 (0x02000000); // non prefetchable 32-bit -+ DmaRanges[1] = CpuToFdt32 (FixedPcdGet64 (PcdBcm27xxPciBusMmioAdr) >> 32); // bus addr @ 0x0f8000000 -+ DmaRanges[2] = CpuToFdt32 (FixedPcdGet64 (PcdBcm27xxPciBusMmioAdr) & MAX_UINT32); -+ DmaRanges[3] = CpuToFdt32 (FixedPcdGet64 (PcdBcm27xxPciCpuMmioAdr) >> 32); // cpu addr @ 0x600000000 -+ DmaRanges[4] = CpuToFdt32 (FixedPcdGet64 (PcdBcm27xxPciCpuMmioAdr) & MAX_UINT32); -+ DmaRanges[5] = CpuToFdt32 (0x00000000); -+ DmaRanges[6] = CpuToFdt32 (FixedPcdGet32 (PcdBcm27xxPciBusMmioLen) + 1); // len = 0x4000 0000 - - DEBUG ((DEBUG_INFO, "%a: Updating PCIe ranges\n", __func__)); - - /* - * Match ranges (BAR/MMIO) with the EDK2+ACPI setup we are using. - */ -- Retval = fdt_setprop (mFdtImage, Node, "ranges", -+ Retval = FdtSetProp (mFdtImage, Node, "ranges", - DmaRanges, sizeof DmaRanges); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "%a: failed to locate PCIe MMIO 'ranges' property (%d)\n", -@@ -418,12 +419,12 @@ SyncPcie ( - * triggering the mailbox by removing the node. - */ - -- Node = fdt_path_offset (mFdtImage, "/scb/pcie@7d500000/pci"); -+ Node = FdtPathOffset (mFdtImage, "/scb/pcie@7d500000/pci"); - if (Node < 0) { - // This can happen on CM4/etc which doesn't have an onboard XHCI - DEBUG ((DEBUG_INFO, "%a: failed to locate /scb/pcie@7d500000/pci\n", __func__)); - } else { -- Retval = fdt_del_node (mFdtImage, Node); -+ Retval = FdtDelNode (mFdtImage, Node); - if (Retval != 0) { - DEBUG ((DEBUG_ERROR, "Failed to remove /scb/pcie@7d500000/pci\n")); - return EFI_NOT_FOUND; -@@ -483,7 +484,7 @@ FdtDxeInitialize ( - return EFI_NOT_FOUND; - } - -- FdtSize = fdt_totalsize (FdtImage); -+ FdtSize = FdtTotalSize (FdtImage); - DEBUG ((DEBUG_INFO, "Devicetree passed via config.txt (0x%lx bytes)\n", FdtSize)); - - /* -@@ -497,9 +498,9 @@ FdtDxeInitialize ( - goto out; - } - -- Retval = fdt_open_into (FdtImage, mFdtImage, FdtSize); -+ Retval = FdtOpenInto (FdtImage, mFdtImage, FdtSize); - if (Retval != 0) { -- DEBUG ((DEBUG_ERROR, "fdt_open_into failed: %d\n", Retval)); -+ DEBUG ((DEBUG_ERROR, "FdtOpenInto failed: %d\n", Retval)); - goto out; - } - -diff --git a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -index 1ea2fe40..bcc29318 100644 ---- a/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -+++ b/Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf -@@ -27,6 +27,7 @@ - - [LibraryClasses] - BaseLib -+ BaseMemoryLib - BoardInfoLib - BoardRevisionHelperLib - DebugLib -diff --git a/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.c b/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.c -index 514ad7fe..197cb97c 100644 ---- a/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.c -+++ b/Platform/RaspberryPi/Library/BoardInfoLib/BoardInfoLib.c -@@ -9,7 +9,7 @@ - #include - #include - #include --#include -+#include - - EFI_STATUS - EFIAPI -@@ -27,19 +27,19 @@ BoardInfoGetRevisionCode ( - return EFI_NOT_FOUND; - } - -- Node = fdt_path_offset (Fdt, "/system"); -+ Node = FdtPathOffset (Fdt, "/system"); - if (Node < 0) { - return EFI_NOT_FOUND; - } - -- Property = fdt_getprop (Fdt, Node, "linux,revision", &Length); -+ Property = FdtGetProp (Fdt, Node, "linux,revision", &Length); - if (Property == NULL) { - return EFI_NOT_FOUND; - } else if (Length != sizeof (UINT32)) { - return EFI_BAD_BUFFER_SIZE; - } - -- *RevisionCode = fdt32_to_cpu (*(UINT32 *) Property); -+ *RevisionCode = Fdt32ToCpu (*(UINT32 *) Property); - - return EFI_SUCCESS; - } -@@ -60,19 +60,19 @@ BoardInfoGetSerialNumber ( - return EFI_NOT_FOUND; - } - -- Node = fdt_path_offset (Fdt, "/system"); -+ Node = FdtPathOffset (Fdt, "/system"); - if (Node < 0) { - return EFI_NOT_FOUND; - } - -- Property = fdt_getprop (Fdt, Node, "linux,serial", &Length); -+ Property = FdtGetProp (Fdt, Node, "linux,serial", &Length); - if (Property == NULL) { - return EFI_NOT_FOUND; - } else if (Length != sizeof (UINT64)) { - return EFI_BAD_BUFFER_SIZE; - } - -- *SerialNumber = fdt64_to_cpu (*(UINT64 *) Property); -+ *SerialNumber = Fdt64ToCpu (*(UINT64 *) Property); - - return EFI_SUCCESS; - } -diff --git a/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.c b/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.c -index 7d148c01..af14df8c 100644 ---- a/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.c -+++ b/Platform/RaspberryPi/Library/FdtPlatformLib/FdtPlatformLib.c -@@ -8,7 +8,7 @@ - - #include - #include --#include -+#include - - VOID * - EFIAPI -@@ -21,10 +21,10 @@ FdtPlatformGetBase ( - - Fdt = (VOID *)(UINTN) PcdGet32 (PcdFdtBaseAddress); - -- FdtError = fdt_check_header (Fdt); -+ FdtError = FdtCheckHeader (Fdt); - if (FdtError != 0) { - DEBUG ((DEBUG_ERROR, "%a: Bad/missing FDT at 0x%p! Ret=%a\n", -- __func__, Fdt, fdt_strerror (FdtError))); -+ __func__, Fdt, FdtStrerror (FdtError))); - ASSERT (FALSE); - return NULL; - } -diff --git a/Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf b/Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf -index d39210c7..ecb03d8c 100644 ---- a/Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf -+++ b/Platform/RaspberryPi/Library/MemoryInitPeiLib/MemoryInitPeiLib.inf -@@ -25,6 +25,7 @@ - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - Platform/RaspberryPi/RaspberryPi.dec -+ UefiCpuPkg/UefiCpuPkg.dec - - [LibraryClasses] - DebugLib -diff --git a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf -index 9e26828b..57280db9 100644 ---- a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf -+++ b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf -@@ -52,7 +52,6 @@ - UefiLib - - [FeaturePcd] -- gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport - - [FixedPcd] - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 1cd72681..9b8a09f1 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -274,8 +274,6 @@ - ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe. - # It could be set FALSE to save size. - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE -- gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE -- gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|FALSE - - [PcdsFixedAtBuild.common] - gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 -@@ -384,7 +382,6 @@ - - [PcdsFeatureFlag.common] - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE -- gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE - gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE - - [PcdsFixedAtBuild.common] -@@ -574,10 +571,7 @@ - ArmPkg/Drivers/ArmGicDxe/ArmGicV2Dxe.inf - Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.inf - Platform/RaspberryPi/RPi5/Drivers/RpiPlatformDxe/RpiPlatformDxe.inf -- Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf { -- -- FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf # Map to deprecated library for this module only -- } -+ Platform/RaspberryPi/Drivers/FdtDxe/FdtDxe.inf - ArmPkg/Drivers/TimerDxe/TimerDxe.inf - MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - MdeModulePkg/Universal/EbcDxe/EbcDxe.inf --- -2.51.2 - diff --git a/packages/edk2/patches/platforms/0029-add-ArmTransferListLib-for-PeilessSec.patch b/packages/edk2/patches/platforms/0029-add-ArmTransferListLib-for-PeilessSec.patch deleted file mode 100644 index 77ceb83..0000000 --- a/packages/edk2/patches/platforms/0029-add-ArmTransferListLib-for-PeilessSec.patch +++ /dev/null @@ -1,24 +0,0 @@ -From fae92c2a574f4e3eeb31fdf37898eaa4720141f7 Mon Sep 17 00:00:00 2001 -From: Matt P -Date: Fri, 1 Aug 2025 13:27:32 +0100 -Subject: [PATCH 29/29] add ArmTransferListLib for PeilessSec - ---- - Platform/RaspberryPi/RPi5/RPi5.dsc | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/Platform/RaspberryPi/RPi5/RPi5.dsc b/Platform/RaspberryPi/RPi5/RPi5.dsc -index 9b8a09f1..519eb46c 100644 ---- a/Platform/RaspberryPi/RPi5/RPi5.dsc -+++ b/Platform/RaspberryPi/RPi5/RPi5.dsc -@@ -127,6 +127,7 @@ - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf - TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf - ArmSmcLib|MdePkg/Library/ArmSmcLib/ArmSmcLib.inf -+ ArmTransferListLib|ArmPkg/Library/ArmTransferListLib/ArmTransferListLib.inf - ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf - - # Dual serial port library --- -2.51.2 - diff --git a/systems/aarch64-linux/pi5/default.nix b/systems/aarch64-linux/pi5/default.nix index 5c6888d..3a03ce2 100644 --- a/systems/aarch64-linux/pi5/default.nix +++ b/systems/aarch64-linux/pi5/default.nix @@ -40,7 +40,6 @@ enable = true; firmware = { enableFirmware = true; - firmwareDisk = "/dev/mmcblk1"; }; }; raspberry-pi = {